GB2119207A - Computer input/output circuit - Google Patents
Computer input/output circuit Download PDFInfo
- Publication number
- GB2119207A GB2119207A GB08310898A GB8310898A GB2119207A GB 2119207 A GB2119207 A GB 2119207A GB 08310898 A GB08310898 A GB 08310898A GB 8310898 A GB8310898 A GB 8310898A GB 2119207 A GB2119207 A GB 2119207A
- Authority
- GB
- United Kingdom
- Prior art keywords
- circuit
- connection
- single terminal
- computer
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0682—Tape device
Abstract
A serial input and output circuit arrangement for a computer comprises a single terminal 10 arranged for connection to a number of input and output terminals, a conditioning circuit 11, 12, 13 including a circuit connection A connected to said single terminal 10, the conditioning circuit causing a balance potential to exist in use at said circuit connection A, a receiving circuit 25 connected to the circuit connection for receiving signals from the single terminal, and a transmitting circuit including switching means 15, 20 connected to the conditioning circuit and responsive to signals from the computer to cause a respective balance potential to exist at said circuit connection A dependent on whether the circuit arrangement is to be an input circuit or an output circuit. As shown a loudspeaker 16 and tape recorder inputs and outputs are connected to the single terminal 10 and the switching means 15, 20 alter the balance potential between three different values to allow audio signals to be supplied to the loudspeaker 16 and data and program signals to be sent to and received from the tape recorder repectively. <IMAGE>
Description
SPECIFICATION
Computer input/output circuit
The present invention relates to computers and more particularly to computers which utilise a microprocessor. Specifically, the invention resides in an input/output circuit which is used as an interface between the computer and ancillary equipment such as a tape recorder.
It has already been proposed to store data and programmes on a magnetic recording medium such as magnetic tape and to transfer the data or programme between the processor and the tape. Further, it has also been proposed to provide a computer with a sound facility so that the computer can generate sounds which can, for example, accompany a computer game or can be used to simulate speech.
A difficulty is that while these facilities can easily be provided, a substantial number of input/output terminals are usually required.
It is an object of the present invention to provide a circuit which enables data and/or programmes to be transferred between a computer and ancilliary equipment using a single input/output terminal. Preferably, the circuit is arranged to provide a further output signal at the single terminal for driving an audio output device.
Features and advantages of the present invention will become apparent from the following description of an embodiment thereof when taken in conjunction with the accompanying single figure which shows a cicuit diagram of an input/output circuit in accordance with the present invention.
The drawing shows a circuit arrangement for transferring data and/or programme between a computer and a tape recorder and for providing a sound facility for the computer.
The circuit comprises at least one switching circuit which alters the balance voltage of a junction in the circuit which junction is connected to a terminal whereby the terminal can be used for both input and output signals. If two switching circuits are provided the same terminal can be used to output signals at two different voltage levels.
In more detail, and with specification reference to the drawing, a terminal 10 is connected to the junction A of a voltage dividing network comprising a first resistor 11 and the series combination of two resistors 1 2 and 13 which network is connected across voltage supply rails.
A first switching network 15 is shown in broken lines and is arranged to short circuit the resistor 11 whereby to bring the voltage of the junction A to approximately the same level as the voltage rail Vcc. This switching circuit is operated under the control of a signal from the processor such that when an audio output is required, the signals are fed to an input 1 5a to the circuit 15 so as to switch the resistor 11 in and out of circuit whereby to produce large signals for driving a loudspeaker 16. The loudspeaker is advantageously a low impedance loudspeaker with an input resistance 17 in the form of two diodes.
In this case, it is thus apparent that the signal from the junction A has to be greater than the voltage drop across the two diodes.
A second switching circuit 20 is also provided and again is shown in broken lines. The second switching circuit again is arranged to short out one of the resistors of the voltage of the junction A to a level which is intermediate the normal level of the junction A with all resistors of the network in series and the level of the rail Vcc.
The number and values of the resistors in the voltage dividing network are chosen such that when the switching circuit 20 is operated under the control of the processor by signals applied to an input 20a, a voltage signal appears at the junction A whose amplitude is less than the voltage drop across the input resistance 1 7 and hence the loudspeaker does not react to such signals. They are, however, sufficient to be supplied through a filter consisting of a series connected capacitance 18 and resistance 1 9 to the "microphone" input of a conventional tape recorder for recording the signals on magnatic tape.
Thus, by activating one or other of the switching circuits 1 5 and 20, either a loudspeaker may be driven or else material in the form of data or a programme can be recorded on magnetic tape using a single terminal 10.
In addition, in the absence of a switching signal at both inputs 1 5a and 20a, the terminal 10 can be used as an input terminal to allow data or a programme stored on tape to be loaded into the computer via the "earpiece" input of a conventional tape recorder.
With both switching circuits 15 and 20 off, the junction A is at a level determined by the voltage dividing network. The junction A is connected through an input resistance 23 to an amplifying and wave shaping circuit 25 shown in broken lines. The output from the circuit 25 is fed to a transistor 26 connected as an emitter follower whose output constitutes a data input 27 to the processor.
It will thus be seen that depending on the condition of the inputs to the swithcing circuits 15 and 20, the single terminal 10 can be used as an output terminal for driving a loudspeaker, as an output terminal to enable data and/or programme to be recorded on ancilliary equipment, or as an input to enable previously recorded data to be input to the computer. The low impedance speaker does not load the signals to and from the recording medium and the sending of signals to one from the recording medium does not activate the loudspeaker.
A further advantage of the above arrangement is that a peripheral device such as a loudspeaker may be permanently connected and can be supplied with signals from the same output terminal as other peripheral devices without the need for an isolating switch or disconnection of the device.
Claims (7)
1. A circuit arrangement for serial inputand output signals for a computer comprising a single terminal arranged for connection to a peripheral device, a conditioning circuit including a circuit connection connected to said single terminal, the conditioning circuit causing a balance potential to exist in use at said circuit connection, a receiving circuit connected to the circuit connection for receiving signals from the single terminal, and a transmitting circuit including switching means connected to the conditioning circuit and responsive to a signal from the computer causing a balance'potential to exist at said circuit connection which is dependent on whether the circuit arrangement is to be an input circuit or an output circuit for the computer.
2. A circuit arrangement according to claim 1, wherein the conditioning circuit comprises a plurality of resistors connected across a source of potential, and the circuit connection is a junction between two of the resistors, the switching means being arranged to alter the effective total resistance between first and second values depending on its switching condition whereby to transmit a signal to the single terminal.
3. A circuit arrangement according to claim 2, wherein the switching means comprises first and second switching devices each being arranged to alter the effective total resistance between a common value and one or other respective values.
4. A circuit arrangement for serial input and output signals for a computer comprising a a single terminal arranged for connection to a plurality of peripheral devices, a conditioning circuit including a circuit connection connected to said single terminal, the conditioning circuit causing a balance potential to exist in use at said circuit connection, and first and second switching means altering the balance potential between different respective values and responsive to one of a first and second signal from the computer whereby to output a signal indicative of one of the first and second signals to said single terminal.
5. A circuit arrangement according to claim 4, and including an input circuit for
each peripheral device, each input circuit being responsive to a signal at a different balance potential.
6. A circuit arrangement according to claim 4, wherein the conditioning circuit com
prises a plurality of resistors connected across
a a soruce of potential and each switching device is arranged to alter the effective total resistance whereby to alter the balance potential at said circuit connection.
7. A circuit arrangement according to claim 6, wherein the circuit connection is the junction between two resistors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08310898A GB2119207B (en) | 1982-04-22 | 1983-04-21 | Computer input/output circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8211724 | 1982-04-22 | ||
GB08310898A GB2119207B (en) | 1982-04-22 | 1983-04-21 | Computer input/output circuit |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8310898D0 GB8310898D0 (en) | 1983-05-25 |
GB2119207A true GB2119207A (en) | 1983-11-09 |
GB2119207B GB2119207B (en) | 1986-03-26 |
Family
ID=26282623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08310898A Expired GB2119207B (en) | 1982-04-22 | 1983-04-21 | Computer input/output circuit |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2119207B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1986005014A1 (en) * | 1985-02-22 | 1986-08-28 | Ncr Corporation | Circuit device for use with a computer |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1382171A (en) * | 1971-08-03 | 1975-01-29 | Honeywell Inf Systems | Data-communications systems |
GB2097622A (en) * | 1981-04-03 | 1982-11-03 | Babcock Bristol Ltd | Data signal transmission to communication lines |
-
1983
- 1983-04-21 GB GB08310898A patent/GB2119207B/en not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1382171A (en) * | 1971-08-03 | 1975-01-29 | Honeywell Inf Systems | Data-communications systems |
GB2097622A (en) * | 1981-04-03 | 1982-11-03 | Babcock Bristol Ltd | Data signal transmission to communication lines |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1986005014A1 (en) * | 1985-02-22 | 1986-08-28 | Ncr Corporation | Circuit device for use with a computer |
Also Published As
Publication number | Publication date |
---|---|
GB2119207B (en) | 1986-03-26 |
GB8310898D0 (en) | 1983-05-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19980421 |