GB2118775B - Programmable read-only memory and associated method of manufacture - Google Patents

Programmable read-only memory and associated method of manufacture

Info

Publication number
GB2118775B
GB2118775B GB08309555A GB8309555A GB2118775B GB 2118775 B GB2118775 B GB 2118775B GB 08309555 A GB08309555 A GB 08309555A GB 8309555 A GB8309555 A GB 8309555A GB 2118775 B GB2118775 B GB 2118775B
Authority
GB
United Kingdom
Prior art keywords
manufacture
memory
programmable read
associated method
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB08309555A
Other versions
GB2118775A (en
Inventor
George William Conner
Raymond George Donald
Ronald Lee Cline
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of GB2118775A publication Critical patent/GB2118775A/en
Application granted granted Critical
Publication of GB2118775B publication Critical patent/GB2118775B/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
    • H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
GB08309555A 1982-04-12 1983-04-08 Programmable read-only memory and associated method of manufacture Expired GB2118775B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US36749282A 1982-04-12 1982-04-12

Publications (2)

Publication Number Publication Date
GB2118775A GB2118775A (en) 1983-11-02
GB2118775B true GB2118775B (en) 1985-11-06

Family

ID=23447392

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08309555A Expired GB2118775B (en) 1982-04-12 1983-04-08 Programmable read-only memory and associated method of manufacture

Country Status (5)

Country Link
JP (1) JPH0618256B2 (en)
DE (1) DE3312648A1 (en)
FR (1) FR2525011B1 (en)
GB (1) GB2118775B (en)
NL (1) NL8301234A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0644609B2 (en) * 1984-12-25 1994-06-08 日本電気株式会社 Junction break type PROM
JPS61154163A (en) * 1984-12-27 1986-07-12 Nec Corp Junction breakdown type prom
DE3650638T2 (en) * 1985-03-22 1998-02-12 Nec Corp Integrated semiconductor circuit with isolation zone
JPH0995344A (en) * 1995-09-28 1997-04-08 Fujita Kimura Tube-content extruding device
JPH09301390A (en) * 1996-05-08 1997-11-25 Kashin Rin Automatic squeezing device
DE102004006374A1 (en) 2004-02-09 2005-08-25 Volkswagen Ag Method and device for activating an electric parking brake

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2369652A1 (en) * 1976-10-29 1978-05-26 Radiotechnique Compelec Programmable transistor read only memory - has integrated matrix structure operating with low voltage pulses
JPS55127061A (en) * 1979-03-26 1980-10-01 Hitachi Ltd Manufacture of semiconductor memory
JPS57194566A (en) * 1981-05-27 1982-11-30 Hitachi Ltd Semiconductor device and manufacture thereof
CA1188418A (en) * 1982-01-04 1985-06-04 Jay A. Shideler Oxide isolation process for standard ram/prom and lateral pnp cell ram

Also Published As

Publication number Publication date
NL8301234A (en) 1983-11-01
JPH0618256B2 (en) 1994-03-09
FR2525011B1 (en) 1988-11-18
FR2525011A1 (en) 1983-10-14
DE3312648A1 (en) 1983-10-27
JPS58186963A (en) 1983-11-01
GB2118775A (en) 1983-11-02

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19980408