GB2099619B - Data processing arrangements - Google Patents

Data processing arrangements

Info

Publication number
GB2099619B
GB2099619B GB8214301A GB8214301A GB2099619B GB 2099619 B GB2099619 B GB 2099619B GB 8214301 A GB8214301 A GB 8214301A GB 8214301 A GB8214301 A GB 8214301A GB 2099619 B GB2099619 B GB 2099619B
Authority
GB
United Kingdom
Prior art keywords
data processing
processing arrangements
arrangements
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8214301A
Other versions
GB2099619A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co PLC
Original Assignee
General Electric Co PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co PLC filed Critical General Electric Co PLC
Priority to GB8214301A priority Critical patent/GB2099619B/en
Publication of GB2099619A publication Critical patent/GB2099619A/en
Application granted granted Critical
Publication of GB2099619B publication Critical patent/GB2099619B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/17Interprocessor communication using an input/output type connection, e.g. channel, I/O port
GB8214301A 1981-05-29 1982-05-17 Data processing arrangements Expired GB2099619B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8214301A GB2099619B (en) 1981-05-29 1982-05-17 Data processing arrangements

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8116449 1981-05-29
GB8214301A GB2099619B (en) 1981-05-29 1982-05-17 Data processing arrangements

Publications (2)

Publication Number Publication Date
GB2099619A GB2099619A (en) 1982-12-08
GB2099619B true GB2099619B (en) 1985-09-18

Family

ID=26279635

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8214301A Expired GB2099619B (en) 1981-05-29 1982-05-17 Data processing arrangements

Country Status (1)

Country Link
GB (1) GB2099619B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1161467B (en) * 1983-01-21 1987-03-18 Cselt Centro Studi Lab Telecom PARALLEL INTERFACE FOR INTERVIEW MANAGEMENT BETWEEN AN ASYNCHRONOUS BUS AND A SYNCHRONOUS BUS CONNECTED TO MULTIPLE TERMINALS EQUIPPED EACH WITH ITS OWN SYNCHRONIZATION SIGNAL
GB8803926D0 (en) * 1988-02-19 1988-03-23 Gen Electric Co Plc Memory addressing system
ATE128777T1 (en) * 1991-03-28 1995-10-15 Cray Research Inc REAL-TIME INPUT/OUTPUT METHOD FOR A VECTOR PROCESSOR SYSTEM.

Also Published As

Publication number Publication date
GB2099619A (en) 1982-12-08

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19970517