GB2097138A - Control arrangement for automatic focusing and exposure camera - Google Patents

Abstract

A camera having an automatic focussing device and an automatic exposure control device operated in turn by a single electromagnet 2. Operation of the camera release causes current to flow through electromagnet 2, which releases plate 22 to allow auto focussing. Detection of a peak in received radiation causes a signal to be generated, which de-energises electromagnet 2. Plate 22 is locked by latch 19 at the in-focus position. If 96 ms after camera release the signal has not been generated, electromagnet 2 is de- energised, to release plate 7 and lock plate 22. 122ms after camera release, electromagnet 2 is re-energised, releasing plate 7 again to effect opening of the shutter blades 13. Completion of an exposure which releases electromagnet 2, to close the shutter. <IMAGE>

Description

SPECIFICATION Control arrangement for automatic focusing and exposure camera This invention relates to a control arrangement for a camera equipped with an automatic focus adjusting device and an automatic exposure control device, and also to such a camera incorporating the control arrangement.

Awide variety of camera mechanisms are known for automatically focusing the objective lens of a camera by a range finding device which is responsive to the actuation of a shutter release, the objective lens being moved until set to an in-focus position at which point an in-focus signal is yielded.

Furthermore, it is customary in an automatic focusing camera to have the exposure control also effected automatically. When wanting to shoot, therefore, the photographer needs only to match the range finding area in the field of view of the finder with that part of a scene to be photographed which is intended to be in sharp focus before actuating the camera shutter release; in this way, it is possible to take photographs in sharp focus and having a proper exposure.

In such cameras, however, to ensure that the imaging performance is optimised, it is essential that the shutter operation be initiated after the objective lens has been stopped perfectly in the in-focus position. According to the prior art, this problem has been solved by providing a timer circuit which produces a signal a predetermined time from the start of the automatic focus adjusting operation (hereinafter referred to as "AF" operation), and by permitting the shutter release to be effected by this signal from the timer circuit and by a signal representative of the termination of the AF operation. This is disclosed in Japanese Laid-Open Patent Publication Sho 55-40438, corresponding to which is U.S.

Patent Application Serial No. 74313 dated September 11th, 1979. However, since in this method current is supplied to a shutter release actuator or electromagnetic means when the signal from the timer circuit and the AF termination signal simultaneously occur, it follows that should the AF operation for some reason take a long time exceeding the time set in the timer circuit, the shutter operation is initiated at the same time as the AF operation is terminated. In other words, in such a case as has been described above, this method gives rise to the possibility of the simultaneous occurrence of the termination of current supply to an electromagnetic means which controls the AF operation and the initiation of current supply to another electromagnetic means which controls the shutter operation.Therefore, when this method is used with a control system for AF and shutter operations having only one electromagnetic means, faulty operation will result.

When controlling the AF operation and the shutter operation by a common electromagnetic means, it is considered that the initiation and termination of the AF operation are controlled by an initiation of a current supply to the electromagnetic means and a termination of the current supply in a first time band, and the initiation and termination of the shutter operation are controlled by an initiation of a current supply to the electromagnetic means and a termination of the current supply in a second time band.

With such a camera, however, when it happens that the termination of the current supply for the AF operation control is followed without delay by the initiation of the current supply for the shutter operation control, the electromagnetic means cannot take the necessary action to terminate the AF operation, and the AF device will not therefore operate accurately and reliably.

In another system where the AF operation and the shutter operation are controlled in time-sharing relation to each other as a drive plate is moved stepwise by controlling the current supply to the electromagnetic means, should such a situation as has been described above be encountered, the problems arises that the AF operation cannot be completed properly and furthermore the subsequent operation does not proceed at all.

With the foregoing in mind, it is an object of the present invention to provide a control arrangement for a camera having an automatic focus adjusting device and an automatic exposure control device, which control arrangement makes it possible for one electromagnetic means properly to control the AF operation and the shutter operation, while still permitting highly reliable and accurate automatic focus adjustment and exposure control.

Accordingly, one aspect of this invention provides a control arrangement for a camera equipped with an automatic focus adjusting device and an automatic exposure control device, which control arrangement includes: (a) an electromagnetic means for actuating the automatic focus adjusting device in a first time band and for actuating the automatic exposure control device in a second time band; (b) a first current supply means for controlling the supply of current to the electromagnetic means in the first time band; and (c) a second current supply means for controlling the supply of current to the electromagnetic means in the second time band, the second current supply means effecting control of the supply of current after the lapse of at least a predetermined time from the completions of the control of current supply by the first current supply means.

One preferred arrangement is provided with timer means for producing a first signal followed after a predetermined time by second signal, the first current supply means stopping the supply of current to the electromagnetic means in response to either one of an in-focus signal from the automatic focus adjusting device or the first signal from the timer, and the second current supply means initiating the supply of current to the electromagnetic means in response to the second signal from the timer.

Alternatively, the arrangement may be provided with timer means for producing a signal after the lapse of a predetermined time from the reception of an in-focus signal from the automatic focus adjusting device, the first current supply means terminat ing the supply of current to the electromagnetic means in response to the in-focus signal from the automatic focus adjusting device, and the second current supply means initiating the supply of current to the electromagnetic means in response to the signal from the timer means.

According to another aspect of this invention, there is provided a control arrangement for a camera equipped with an automatic focus adjusting device and an automatic exposure control device, which control arrangement includes a current supply means, an electromagnetic means responsive to first and second current supply controls by the current supply means, respectively to actuate the automatic focus adjusting device and the automatic exposure control device, and delay means for controlling the current supply means in such a mannerthatthe completion of the first current supply control is followed after the lapse of at least a predetermined time by the initiation of the second current supply control.

This invention extends to a camera whenever equipped with an automatic focus adjusting device, an automatic exposure control device and a control arrangement therefor as described above according to the invention.

By way of example only, one specific embodiment of this invention will now be described in detail, reference being made to the accompanying drawings, in which: Figure 1 is a schematic view of one embodiment of a camera mechanism arranged for performing auto maticfocussing and automatic exposure control, according to the present invention, the mechanism being in a re-set condition, ready to shoot; Figure 2 is a similar view to Figure 1, but where a range-finding operation has been initiated; Figure 3 is a similar view to Figure 1, but where an in-focus condition has been detected; Figure 4 is a similar view to Figure 1, but where an exposure operation has been initiated; Figure 5 is a similar view to Figure 1, but where the exposure operation has been terminated;; Figure 6 is an electrical circuit diagram of a practical example of a control circuit for a camera incorporating the mechanism of Figures 1 to 5; Figure 7 is a timing chart illustrating the manner in which the circuit of Figure 6 operates; Figure 8 is an electrical circuit diagram of another practical example of a control circuit for a camera incorporating the mechanism of Figures 1 to 5; and Figure 9 is a timing chart illustrating the manner in which the circuit of Figure 8 operates.

In Figures 1 to 5, there is shown a magnet yoke 1 which is fixed to a shutter base plate (not shown) or the like, a solenoid coil 2 being formed on the yoke so that when energised by a control circuit to be described later, a magnetic field is generated, the magnet yoke 1 and solenoid 2 constituting a drive magnet. An armature 3 is attracted to the yoke 1 when current flows through the solenoid 2, the armature 3 being fixed to and operating as a unit with a control lever 5 which is pivotally mounted on a shaft 4 fixed to the shutter base plate. A spring 6 urges the control lever 5 in a counterclockwise direction as viewed in the drawings. A drive plate 7 is slidably supported by the pin 4 and a pin 8, and is urged by a spring 9 in a rightward direction, as viewed in the drawings.An opening lever 10 is pivotally mounted on a pin 11 mounted on the drive plate 7 and is urged buy a spring 12 in a counterclockwise direction, as viewed in the drawings. A shutter blade 13 is pivotally mounted on a pin 14 fixed to the shutter base plate. It is to be noted that in actual practice there is another shutter blade symmetrically movable with respect to the shown blade 13, but the other blade is omitted here for the purpose of clarity.

The shutter blade 13 has a slotted portion in which is engaged a pin 16 mounted on an opening and closing lever 15 and which is formed so that the shutter blade 13 co-operates with the opening and closing lever 15. The opening and closing lever 15 is pivotally mounted on a pin 17 fixed to the base plate (not shown) and is urged by a spring 18 in a counterclockwise direction, as viewed in the drawings. A light sensor diaphragm 13a operates as a unit with the shutter blade 13.

A latch lever 19 is pivotally mounted on a shaft 20 fixed to the base plate and is urged by a spring 21 in a counterclockwise direction, as viewed in the drawings. An AF control plate 22 guided by pins 23 and 24 fixed to the base plate is urged buy a spring 25 in a leftward direction as viewed in the drawings, and is formed to co-operate with a speed regulating means of known construction, including an escape wheel 26 rotatably mounted on a fixed shaft 27. An anchor 28 is pivotally mounted on a fixed shaft 29 and co-operates with the escape wheel 26.

A light projection element lever 30 is pivotally mounted on a shaft 31 fixed to a camera housing (not shown) orthe like, and is urged by a spring 32 in a clockwise direction as viewed in the drawings, one end of the lever sliding on a cam portion 22a of the aforesaid AF control plate 22 and the opposite end fixedly carrying a light projection element 33. A projection lens 34, a light collection lens 35 and a photosensitive element 36 constitute parts of an automatic focus detecting device of the active type.

The details of the automatic focus detecting device are described in the above-cited Japanese Laid Open Patent Publication Sho 55-40438, and, therefore, are not described in detail here. Also, a focusing control mechanism for an objective lens, responsive to movement of the AF control plate 22 is well known to those skilled in the art, and is therefore not described in detail here.

The operation of the co-ordinating system of Figures 1 to 5 will now be explained with reference to the successive steps of a camera operation.

At first, when a shutter button (not shown) is depressed, a control circuit (to be described later) energises the solenoid 2 with a PULL current (for example, 200mA) for a predetermined time (1 Oms) and the concurrent magnetic force causes the yoke 1 to attract the armature 3; control lever 5 moves as a unit with the armature 3, thereby disengaging a turned portion 5a of the lever 5 from an abutment 7a of the drive plate 7. Then, the drive plate 7 moves to the right under the action of the spring 9. Shortly, an extension 7b of the drive plate 7 abuts on a lug 5b on the opposite end of control leverS, thus stopping the drive plate 7 in that position. This state is illustrated in Figure 2.At this time, a lobe 7c on drive plate 7 lifts up the tail of latch lever 19, thereby turning the latch lever 19 in the clockwise direction against the bias force of the spring 25, disengaging the AF control plate 22.'Then, the AF control plate 22 starts to move to the left as viewed in Figure 2 by the force of spring 21. As, at this time, the speed regulating mechanism of the escape wheel 26 and the anchor 28 works, the AF control plate 22 moves at a predetermined speed.

The light projection element carrying lever 30 is moved by a cam portion 22a of the AF control plate 7, thus initiating a range finding operation.

After that, when a signal representing detection of an in-focus condition is produced from the photosensitive element 36, the control circuit (to be described later) acts to cut off the supply of a HOLD current to solenoid 2. As the force attracting the armature 3 disappears, the control lever 5 is turned in the counterclockwise direction by the bias force of spring 6 to disengage the lug 5b from the extension 7b of the drive plate 7. Then, drive plate 7 moves to the right as viewed in the figure under the action of spring 9 until a second abutment 7d of drive plate 7 abuts on the turned portion 5a of control leverS.

Such movement of drive plate 7 causes its lobe 7c to move away from the tail of the latch lever 19, which in turn allows the latch lever 19 to turn in the counterclockwise direction under the bias force of spring 21 to engage one of the teeth 22b of the AF control plate 22, thus arresting movement of the AF control plate 22. This state is illustrated in Figure 3.

It should be pointed out in this connection that if, at this time, an initiation of a shutter operation were controlled to be art a predeterined time from the initiation of the AF operation by a signal produced from a timer circuit and the signal representing the termination of the AF operation, the subsequent operation would proceed as follows. Now assuming that the AF operation takes a shorter time to complete than the timed interval of the aforesaid timer circuit, then there will be a time lapse between the release of the control lever 5 from the yoke 1 at the termination of the AF operation and the initiation of the shutter operation, as has been mentioned above.Thus, a cycle of operation beginning with the disengagement of the lug 5b of control lever 5 from the extension 7b of drive plate 7, including rightward movement of drive plate 7 under the action of spring 9 and terminating at the engagement of the turned portion 5a of control lever 5 with the second lug 7d of control plate 7 may be accomplished without hinderance.

Alternatively, assuming that the termination of the AF operation occurs close to completion of the timed interval of the timer circuit, then the time between the moment at which the current supply to solenoid 2 is cut off to release the control lever 5 from the yoke 1 as the AF operation has been completed and the moment at which the solenoid 2 is energised again for the initiation of the shutter operation will become extremely short.In such a case, as has been stated above, before the turned portion 5a of control lever 5 would engage the second lug 7d of the drive plate 7, current supplied to solenoid 2 for the initiation of the shutter operation takes place, and control lever 5 is again attracted to yoke 1, the lever turning in the clockwise direction as viewed in the figure, with the result that the camera mechanism automatically shifts to the shutter operation mode, despite the fact that the position at which the drive plate 7 starts this action is different from the position at which it would otherwise normally lie when the turned portion 5a engages the second abutment 7d of drive plate 7.Therefore, the speed of movement of the drive plate 7 is changed to give a debasing influence on the accuracy of control of an automatic exposure operation (hereinafter described as "AE" operation).

Assuming again that the termination of the AF operation occurs after the termination of the timed interval of the timer circuit, and therefore that just after the current supply to the solenoid 2 has been cut off in response to the signal representing the termination of the AF operation, current for actuation of a shutter release flows to the solenoid 2, then it will often happen that whilst the engagement of the lug 5b of control lever 5 has not been released from the extension 7b of drive plate 7, the circuit shifts to the shutter operation mode. In this case, even when the control circuit to be described later yields a signal representing the termination of the AF operation, the drive plate 7 does not move. Therefore, the latch lever 19 cannot arrest the AF control plate 22 and thus the AF opertion fails to take proper effect.Further, even though the control circuit has produced an actuating signal for shutter operation, because the shutter is mechanically prohibited from operating, there will obtain the result that an exposure will not be made.

It is to be noted in connection with the present embodiment that the time lapse from the deenergisation of the solenoid 2 by a signal representing the termination of the AF operation through the disengagement of the lug 5b of control lever 5 from the extension 7b of drive plate 7, the movement of drive plate 7 under the bias force of spring 9, and the engagement of the turned portion 5a of the control lever 5 with the second lug 7d of drive plate 7 to the complete arrestment of the drive plate 7 with sufficient mechanical stability is found by experiment to be necessarily more than about 10 ms.

Turning to the subsequent operation after the termination of the AF operation, when the armature 3 is attracted again to yoke 1, the portion 5a of control lever 5 is disengaged from the second abutment 7d of the drive plate, and the drive plate 7 starts to move again to the right, as viewed in the drawings, by the action of spring 9. This state is illustrated in Figure 4.

At this point, a hooked portion 10a of the opening lever 10 engages an end 15a of the opening and closing lever 15. As the drive plate 7 moves, therefore, the opening and closing lever 15 is turned in a clockwise direction, as viewed in the drawings.

Also since the pin 16 mounted on the opening and closing lever 15 is engaged in the elongated slot of the shutter blade 13, the latter turns about the shaft 14 in a counterclockwise direction as viewed in the drawings, thus initiating an exposure. This exposure continues for as long as armature 3 is attracted to yoke 1, and during the exposure, light from an object to be photographed passes through the auxiliary diaphragm aperture opening 13a to impinge on a photo-voltaic cell, to be described later. By this a so-called'auxiliary aperture light metering is carried out. Then, when the control circuit to be described later produces a signal representative of the termination of the exposure, the current supply to the solenoid 2 is cut off, thereby the force attracting the armature 3 is lost.The control lever 5 turns in a counterclockwise direction under the action of spring 6 so that its one end Sc strikes the opening lever 10 at the tail lOb thereof, the opposite end 1 Oa of which thus being disengaged from the end 15a of the opening and closing lever 15. Then, the opening and closing lever 15 turns in a counterclockwise direction under the bias force of spring 18, while turning the shutter blade 13 in a direction to close the exposure aperture. This state is illustrated in Figure 5.

It will be understood that the foregoing procedure has completed a series of operations from the depression of the shutter button through the actuation of AF to the opening and closing of the shutter.

After that, a charging mechanism (not shown) when actuated returns the AF control plate 22 and drive plate 7 to their initial positions.

Next, an explanation will be given of a control circuit for a camera incorporating the abovedescribed mechanism. The examples of Figures 6 and 8 are somewhat different from each other only in the portion thereof controlling current supply to the solenoid 2, but otherwise are similar to each other.

The explanation first begins with the example of Figure 6. In this Figure, block A is a light metering circuit, and, in this light metering circuit, 38 is an operational amplifier (hereinafter abbreviated as "OP-amp") constituting an SPC (photovoltaic cell) head amp, a SPC being connected across the two input terminals of the OP-amp 38, and a compression diode 40 being connected in the feedback network of the OP-amp. Also the non-inverting input of the OP-amp 38 has impressed thereon a reference voltage VREF of a magnitude proportional to the absolute temperature. An expansion transistor 41 is connected to the output of the OP-amp 38, a timing capacitor 42 being connected to the transistor collector. A count-start switch 43 is connected in parallel with the capacitor 42, and is arranged to move from a normally-closed position to an open position when the aforesaid shutter opens.A comparator 45 has its non-inverting input connected to the collector of the expansion transistor 41 and its inverting input has impressed thereon a reference voltage VTH from an electrical power source Vcc, the comparator producing an output signal AECUP when the timing capacitor 42 completes its time count. 1 3a represents the aforesaid auxiliary diaphragm, and 37 is an ND filter for use in setting ASA sensitivity information of the film being used.

Block B is an active type of AF circuit known in the art and using infrared rays. In this AF circuit, two-input NAND gates 50 and 51 constitute a reset-set flip-flop circuit (hereinafter abbreviated as "RS-FF"). Athree-input NAND gate 52 has one input connected to the output of the aforesaid NAND gate 50, and its other two inputs respectively connected to a CLOCK signal and an AFEND signal, which will be described more fully later. A switching transistor 53 is connected to the output of the NAND gate 52.

Resistors 54 and 55, an OP-amp 57 and a transistor 58 constitute a constant voltage circuit. The OP-amp 57 has its non-inverting input connected through a resistor 56 to a temperature-independent reference voltage KUC and its inverting input connected to the common point of connection of resistors 54 and 55.

An infrared emitting diode 33 (hereinafter abbreviated as "iRED") is connected to the emitter of transistor 58. A projection lens 34 is provided for iRED 33, to direct the infra-red to an object 59 to be photographed, and a collector lens 35 is arranged for collecting the reflected light from the object. An SPC (photovoltaic cell) for receiving said reflected light is connected across the input terminals of an amplifier 60, the output of which is fed to a circuit 61 of known construction which detects the peak value of the output of the SPC 36. A circuit 62 produces a signal representing the detection of an in-focus condition (hereinafter abbreviated as an "AFEND" signal). An inverting circuit 63 is connected to the output of the signal forming circuit 62 and produces and AFEND signal.

A switch SW2 is arranged to be closed by a second pressure of release actuation of the camera, and is connected through a resistor 47 to the electrical power source Vcc. NAND gates 46 and 48 constitute an RS-FF, an inverting circuit 49 being connected to the output of NAND gate 46. In this way there are produced at the outputs of NAND gates 46 and inverting circuit 49 an SW2 signal and an SW2 signal respectively. Reference voltage generating circuits 64 and 64 produce respectively a temperatureindependent reference voltage KUC and an absolute temperature-dependent reference voltage VREF.

66 is an electrical power source or battery and a switch SW1 is arranged to be closed by a first pressure of release actuation of the camera. A resistor 67 and a capacitor 68 are connected in series across the power source 66 and switch SW1,their common point being connected to an inverting circuit 69 which drives another inverting circuit 70, so as to produce PUC and a PUC signals respectively, on closing switch SW1.

71 and 72 are NAND gates constituting an RS-FF with one input of NAND gate 71 receiving a 10M signal (to be described later) through an inverting circuit 74, and one input of NAND gate 72 receiving the SW2 signal. Atwo-inputAND gate 72 receives on one input the SW2 signal and on the other input the output S11 of the NAND gate 72.

75 and 76 also are NAND gates constituting an RS-FF with one input of NAND gate 75 receiving a 122M signal (to be described later) through an inverting circuit 78 and one input of NAND gate 76 receiving a 11 2M signal. A two-input AND gate 77 receives an output S21 of NAND gate 76 and the 1 12M signal. A two-input OR gate 79 receives the outputs S12 and 822 of the aforesaid AND gates 73 and 77.

84 and 85 also are NAND gates constituting an RS-FFwith one input of NAND gate 84 receiving the AFEND signal and a 96M signal combined through a NOR gate 83, and one input of NAND gate 85 receivingthe SW2 signal. A two-input AN D gate has its inputs arranged to receive the output S31 of NAND gate 85 and the SW2 signal.

88 and 89 also are NAND gates constituting an RS-FF with one input of NAND gate 89 receiving the PUC signal and one input of NAND gate 88 receiving the 11 2M signal through an inverting circuit 87. 91 and 92 also are NAND gates constituting an RS-FF with one input of NAND gate 91 receiving the AECUP signal and one input of NAND gate 92 receiving the inverted output of the aforesaid NAND gate 89, as signal S43 from an inverting circuit 90.

93 is a two-input AND gate with its inputs receiving the output SW1 of NAND gate 92 and the output S43 of the inverting circuit 90. 94 is a two-input OR gate with its inputs receiving the outputs S32 and S42 of NAND gates 86 and 93 respectively. Switch ing transistors 80 and 81 are connected to the outputs of OR gates 79 and 94 respectively and control supply of a PULL current and a HOLD current to the solenoid 2. 82 is a HOLD current to the solenoid 2.

An oscillator circuit 100 drives a frequency dividing circuit 101 for dividing the frequency of the output pulses of the oscillator circuit 100, a pulse train at a frequency of about 10 kHz appearing at the CLOCK output of the divider.

102 to 107 are D-FFs connected to one another as illustrated and constituting a frequency dividing circuit. Applied to the CLEAR terminals of the frequency dividing circuit 101 and the D-FFs 102 to 107 is the aforesaid 8W2 signal. An AND gate 108 has two inputs to which the Q outputs 2M and 8M of D-FFs 102 and 104 are applied. An AND gate 109 has three inputs to which are applied the Q outputs 1 6M, 32M and 64M of D-FFs 105, 106 and 107. An AND gate 110 has two inputs to which are applied the Q outputs 32M and 64M of D-FFs 106 and 107. An output from the AND gate 110 is labelled 96M.

An AND gate 111 has applied thereto the outputs 1OM and 112M of the aforesaid AND gates 108 and 109, and the output of gate 111 is labelled 122M.

Here it should be explained that the signal names such as 1 0M and 11 2M imply that the respective signal is inverted to a high level afterthe lapse of 1 0msec. and 11 2msec. respectively, from the start of the SW2 signal.

The operation of the circuit of Figure 6 will now be described, referring to the timing chart of Figure 7.

When the release button on the camera is depressed to the first pressure, the switch SW1 is closed, thereby charging capacitor 68 through the resistor 67. During the short time until the charging is completed, the outputs of inverting circuits 69 and 70 are respectively at high and low levels, thus producing the PUC signal and the PUC signal.

The PUC signal sets the output of NAND gate 51 to a high level, and since at this time the SW2 signal also is at a high level, the output of NAND gate 50 goes low. Likewise, the outputs of NAND gates 48 and 46 are set to high and low levels respectively, and the outputs of NAND gates 89 and 88 are set to high and low levels respectively.

Also, the PUC signal initialises the PEAK detecting circuit 61 and the in-focus signal forming circuit 62.

Since, in this position (an at-rest position where only the switch SW1 is ON) the output of NAND gate 46 is low, there is no SW2 signal nor a SW2 signal.

That is, because the SW2 signal remains low, and the SW2 signal remain high, the D-FFs 102 to 107 are all cleared by the SW2 signal, so that their Q outputs are all low. Therefore, the AND gates 108 to 111 all have outputs at a low level. At this time, therefore, the AND gates 73,77,86 and 93 all have their one inputs low so that their outputs and the outputs of OR gates 79 and 94 remain at a low level, and the switching transistors 80 and 81 are non-conducting.

Thus, the solenoid 2 of the drive magnet is no yet supplied with current. Also in this position, because the SW2 signal, 1 12M signal and the output S43 of inverting circuit 90 are low, the NAND gates 72,76, 85 and 92 are all set to produce high level outputs S11,S21,S31 and S41.

Upon further depression of the release button to the second pressure, the switch SW2 is closed, and one of the inputs of NAND gate 46 is inverted to a low level, so that its output is changed to high level producing the SW2 signal. Also at this time, the output of the inverting circuit 49 goes low, producing the SW2 signal.

Therefore, the AND gates 73 and 86 are enabled to latch the output S11 of NAND gate 72 and the output S31 of NAND gate 85 respectively, the outputs S12 and S32 then going high. This inverts the outputs of OR gates 79 and 94, which go high, causing the drive transistors 80 and 81 to become conducting. Thus, a current supply to the solenoid 2 of the drive magnet is established. This leads to the above-described initiation of the AF operation, as the armature 3 is attracted to the yoke 1 (Figures 1 and 2) to disengage the turned portion 5a of the control lever 5 from the abutment 7a of the drive plate 7.

The change of the 8W2 signal to a low level also releases the D-FFs 102 to 107 from their cleared state. Then, dividing of the frequency of the output pulses from the frequency dividing circuit 101 by said D-FFs 102-107 may commence. In more detail, the D-FFs 102 to 107 change their Q outputs 2M to 64M to a high level in 2msec., 4msec., 8msec., 16msec.,32msec., and 64msec. from the appearance of the SW2 signal, respectively. Further, the AND gates 108 to 111 change their outputs 1 0M, 1 12M, 96M and 122M to a high level in l0msec., ll2msec., 96msec. and 122msec. respectively (see Figure 7).

As the AND gate 108 produces the 1 0M signal, the output of the inverting circuit 74 goes low, causing the output of the NAND gate 71 to go high, and the output S11 of NAND gate 72 thus goes low. Therefore, the output 812 of the AND gate 73 is changed to a low level, thus rendering the transistor 70 nonconducting, to terminate the supply of PULL current to the drive magnet solenoid 2. In short, the supply of the PULL current to the solenoid 2 takes place for 10msec, depending upon the signal S12, as illus trated in Figure 7. It is to be noted here that the signal S32 controlling the supply of HOLD current to the solenoid 2 continues to exist after that time, as can be seen from Figure 7, so that the armature 3 is held attracted to the yoke 1.

At the above-described time of production of the SW2 signal, the output of the NAND gate 50 goes high. Since, at this time, the AFEND signal is not present, the NAND gate 52 produces an output signal which is in the form of an inverted CLOCK signal. Responsive to this signal, the switching transistor 53 turns on and off. Therefore, the infrared light projection element (IRKED) 33 is fed with a constant voltage determined by the reference voltage KUC and the ratio of the resistors 54 and 55, in synchronism with the CLOCK signal. Thus, the iRED 33 is lit and turned off, alternately. In effect, therefore, the closure of the switch SW2 causes a first current supply to the solenoid 2 which in turn allows the movement of the AF control plate 22 to start.As the AF control plate 22 moves, the projected light from the energised RED 33 scans the field of view, and the reflected light from the object 59 falls on the photosensitive element 36. The output of the photosensitive element 36 is amplified by the amplifier 60, the amplified signal from which is then synchronously detected by the CLOCK signal in the next stage PEAK detecting circuit 61; at the time of the production of a peak of the synchronously detected output, the PEAK signal goes high. A predetermined period after the production of the peak signal, the next stage in-focus signal forming circuit 62 produces an AFEND signal. The production of this AFEND signal causes the output of the NOR gate 83 to go low, and therefore the output of NAND gate 84 changes to a low level (see Figure 7, S31).Therefore, at this time, the output S32 of the AND gate 86 goes low so that the drive transistor 81 is turned off and the supply of HOLD current to the solenoid 2 is terminated. Thus, the armature 3 is released from the yoke 1, and the latch lever 19 engages in the toothed portion 22b of the AF control plate 22, so as to stop the objective lens from further axial movement. The range finding operation is thus terminated.

After that, as counting by the D-FFs 102-107 proceeds, when the Q outputs of the D-FFs 105,106 and 107 all are at a high level, the output 1 12M of the AND gate 109 changes to a high level. Since, at this time, the output S21 of the NAND gate 76 is at a high level, the output S22 of the AND gate 77 becomes high, and the output of the OR gate 79 also becomes high, thereby turning on the drive transistor 70.

Therefore, for a second time a PULL current is supplied to the solenoid 2, so that the armature 3 is attracted again to the yoke 1. In this way, as has been described above, an opening operation of the shutter is initiated. After the lapse of 1 Omsec. from the start of the PULL current supply, the output 1 22M of AND gate 111 goes high (see Figure 7, 122M) so that, at this time, the output of the inverting circuit 78 changes to a low level, and the output of the NAND gate 75 is changed to a high level. Therefore, the NAND gate 76 and the AND gate 77 outputs S21 and S22 both change to a low level, thereby turning off the drive transistor 80 to terminate the supply of PULL current.On the other hand, at a time when the above-described output 1 12M of the AND gate 109 goes high, the output of the inverting circuit 87 goes low, and the outputs of the NAND gates 88 and 89 are set to high and low levels respectively. Therefore, the output S43 of the inverting circuit 90 is inverted to a high level at this time, causing the output of the AND gate 93 and the output S42 of the OR gate 94 to be changed to high levels. Therefore, the drive transistor 81 is also turned on when the output 1 12M of AND gate 109 goes high. It is to be understood that even after the PULL current supply has been cut off, the HOLD current continues to flow through the solenoid 2 (see Figure 7, S42, S43).

In the above-described embodiment, as the shutter opening operation proceeds, the auxiliary diaphragm 13a after having once closed is opened again, and the output of the OP-amp 38 changes as a logarithmic function of the amount of light incident upon the SPC 39. A current proportional to the incident light amount thus flows to the collector of the expansion transistor 41, and the timing capacitor 42 is charged by this current. When the voltage across the capacitor 42 reaches the threshold voltage VTH, the output comparator 45 is inverted to yield the AECUP signal. Therefore, the NAND gates 91 and 92 are set to produce outputs of high and low levels respectively. Then, the output S42 of the AND gate 93 changes to a low level, so that the output of the OR gate 94 also changes to low level, thereby turning off the drive transistor 71.At this time, therefore, the supply of HOLD current to the solenoid 2 is cut off, and, as has been described above, the armature 3 is released to disengage the opening lever 10 from the opening and closing lever 15, thus initiating a closing operation of the shutter.

It should be pointed out that in this example the 96M signal from the AND gate 110 and the AFEND signal are combined by the NOR gate 83 so that even when the AFEND signal is hindered from appearing, 96msec. from the production of the SW2 signal the output of the NOR gate 83 is changed to a low level, thus without fail cutting off the HOLD current for the AF, to stop the AF operation. Also in this case, after 1 12msec. from the production of the SW2 signal, a PULL current from the shutter actuation starts to flow. In other words, in this example, the time interval from the termination of the AF operation to the initiation of the shutter operation is about 16msec. (but by due consideration of the inertia of the mechanism, it might be shorter) even in the worst case, for the purpose of avoiding the abovedescribed drawback of the lack of co-ordination of the mechanisms.

Now an explanation will be given of another example of electronic circuit, as shown in Figure 8, where the same reference characters have been employed to denote parts similar to those shown in FigureS.

A NAND gate 78' receives both the AFEND signal and a 26M signal to be described later, the gate output being applied to one input of NAND gate 75 constituting part of an RS-FF. Also, the NAND gate 76 and AND gate 77 receive at one of their inputs the output S43 of the inverting circuit 90. The NAND gate 84 constituting part of an RS-FF receives at one of its inputs the AFEND signal, through an inverting circuit 83'. A NAND gate 87' receives the AFEND signal and a 16M signal on its inputs, and its output is applied to one input of the NAND gate 88 constituting part of an RS-FF. Atwo-input AND gate 122 has the output 10M of the AND gate 108 and the Q output 16M of the D-FF 105 applied to its inputs.A one-shot pulse forming circuit 121 is triggered by the AFEND signal, the output pulse ONSHT and the SW2 signal being gated by a two-input OR gate 120 to the CLEAR terminals of the frequency dividing circuit 101 and D-FFs 102 to 105.

The operation of the circuit of Figure 8 is next described by reference to the pulse timing chart of Figure 9.

The procedure from the second pressure on the release button to the production of the AFEND signal is the same as in the first example, described with reference to Figures 6 and 7; the description is therefore omitted here.

When the AFEND signal is produced, the output of the inverting circuit 83' goes low, causing the AND gate 86 output S32 also to go low, thereby turning off the drive transistor 81. This inhibits the supply of the HOLD current for the AF operation control. By the above-described mechanisms, therefore, the objective lens is held against further axial movement, and at the same time the one shot pulse forming circuit 121 produces one pulse (see Figure 9, ONSHT). This one pulse passes through the OR gate 120 to reset the D-FFs 102 to 105 and the frequency dividing circuit 101. Then, the D-FFs 102 to 105 again start to count from the initial state.As their counting operation proceeds, when the O output 1 6M of the D-FF 105 is inverted to a high level, the two inputs of the NAND gate 87' both go high at the same time, and the gate output thus goes low. Therefore, the NAND gates 88 and 89 are set to produce outputs of high and low levels respectively, and the output S43 of the inverting circuit 90 is inverted to a high level (see Figure 9, S43). On the other hand, since the output S41 of the NAND gate 92 is first set to a high level, the change of the output S43 to a high level causes the output S42 of the AND gate 93 also to be changed to a high level.

Also, since the output S21 ofthe NAND gate 76 is first set to a high level, the inversion of the output S43 of the inverter circuit 90 to a high level causes the output S22 of the AND gate 77 to be changed to a high level (see Figure 9, S22).

Thus, the drive transistors 80 and 81 are both turned on, to supply the solenoid 2 with PULL current and HOLD current for shutter operation control, and an opening operation of the shutter starts. As the counting operation of the frequency dividing circuits 102 to 105 goes on, when the two inputs of the AND gate 122 go high, its output 26M is changed to a high level, Therefore, the two inputs of the NAND gate 78' become high at the same time, and its output goes low. Then the NAND gates 75 and 76 are reset to produce outputs of high and low levels respectively. Then the output S22 of the AND gate 77 is changed to a low level, thereby turning off the drive transistor 80 to stop the supply of the PULL current to the solenoid 2.

As the opening operation of the shutter proceeds along with the shutter timing operation as described in connection with the first example (Figures 6 and 7), when the output AECUP of the comparator circuit 45 is inverted to a low level, the outputs of the NAND gates 91 and 92 take high and low levels respectively, and the output S42 of the AND gate 93 also takes a low level. Therefore, the drive transistor 81 is turned off to stop the HOLD current supply to the solenoid 2. Then, the above-described mechanism causes the shutter to start its closing operation.

That is, in this example, the initiation of a shutter drive PULL current supply is made to occur 16msec.

from the appearance of the AFEND signal, and no means are provided for setting a waiting time for the AFEND signal, as in the first example. Therefore, in the circuit of Figure 8, the termination of the AF operation is followed always after 16msec. by the initiation of the shutter operation with the advantage that the time from the actuation of a camera release to the initiation of an exposure operation can be made shorter. This reduces the liklihood of a photographer missing an exposure opportunity. However, this example has an unfavourable aspect, too, in that the time lag before the initiation of the shutter operation differs for near and far object distances.

On this point, by contrast, the example of Figure 6 is more advantageous as the time lag before the initiation of the shutter operation is maintained virtually constant.

The described examples of this invention have a single electromagnetic means for controlling the AF operation and the shutter operation in time-sharing relation to each other, wherein it is after the lapse of at least a predetermined time from the termination of the AF operation that a current supply is established to the electromagnetic means, for carrying out the shutter operation. It is in this way made possible to avoid faulty operation of the armature and the like under the control of the electromagnetic means, and to fulfil the very rigorous requirement for accuracy and relaibility of control in the camera operation.

Claims (9)

1. A control arrangement for a camera equipped with an automatic focus adjusting device and an automatic exposure control device, which control arrangement includes: (a) an electromagnetic means for actuating the automatic focus adjusting device in a first time band and for actuating the automatic exposure control device in a second time band; (b) a first current supply means for controlling the supply of current to the electromagnetic means in the first time band; and (c) a second current supply means for controlling the supply of current to the electromagnetic means in the second time band, the second current supply means effecting control of the supply of current after the lapse of at least a predetermined time from the completion of the control of current supply by the first current supply means.

2. A control arrangement according to claim 1, and further comprising a latch member arranged to be actuated by the electromagnetic means, and a movable member co-operable with the latch member and arranged to move stepwise each time the latch member is actuated, whereby the operation of the automatic focus adjusting device and the automatic exposure control device are actuated through said moving member.

3. A control arrangement according to claim 1 or claim 2, wherein there is provided timer means for producing a first signal followed after a predetermined time by a second signal, the first current supply means stopping the supply of current to the electromagnetic means in response to either one of an in-focus signal from the automatic focus adjusting device or the first signal from the timer, and the second current supply means initiating the supply of current to the electromagnetic means in response to the second signal from the timer.

4. A control arrangement according to claim 1 or claim 2, wherein there is provided timer means for producing a signal after the lapse of a predetermined time from the reception of an in-focus signal from the automatic focus adjusting device, the first current supply means terminating the supply of current to the electromagnetic means in response to the in-focus signal from the automatic focus adjusting device; and the second current supply means initiating the supply of current to the electromagnetic means in response to the signal from the timer means.

5. A control arrangement according to any of the preceding claims, wherein the first current supply means initiates the suply of current to the electromagnetic means in response to actuation of a camera release, and the current supply means terminates the supply of current to the electromagnetic means in response to an exposure completion signal received from the automatic exposure control device.

6. A control arrangement according to any of the preceding claims, wherein the electromagnetic means comprises an electromagnet arranged so that upon initiation of the supply of current thereto an armature is attracted thereby and upon termination of the supply of current the armature is released.

7. A control arrangementfora camera equipped with an automatic focus adjusting device and an automatic exposure control device, which control arrangement includes a current supply means, an electromagnetic means responsive to first and second current supply controls by the current supply means, respectively to actuate the automatic focus adjusting device and the automatic exposure control device, and delay means for controlling the current supply means in such a manner that the completion of the first current supply control is followed after the lapse of at least a predetermined time by the initiation of the second current supply control.

8. A control arrangement for a camera and substantially as hereinbefore described, with reference to and as illustrated in Figures 1 to 5 in conjunction with Figures 6 and 7 or with Figures 8 and 9 of the accompanying drawings.

9. A camera whenever incorporating an automa tic focus adjusting device, an automatic exposure control device and control arrangement therefor, according to any of the preceding claims.