GB2061523A

GB2061523A - Measuring an Incrementally Subdivided Path or Angle Digitally

Info

Publication number: GB2061523A
Application number: GB8033640A
Authority: GB
Original assignee: Hottinger Baldwin Messtechnik GmbH
Current assignee: Hottinger Bruel and Kjaer GmbH
Priority date: 1979-10-18
Filing date: 1980-10-17
Publication date: 1981-05-13
Also published as: GB2061523B; DE2942080C2; DE2942080A1; CH650334A5; NL8005745A

Abstract

A method of measuring an incrementally subdivided path or subdivided angle of rotation digitally comprises scanning the path or angle using two pick-ups whose output signals are sinusoidal and of 90 DEG phase difference, producing two alternating voltages of 90 DEG phase difference from a clock pulse generator (1) via a predetermined step-down ratio device (2), using them to modulate the pick-up output signals in devices (4, 5) whose outputs are added (6) to form a voltage vector having the same frequency as the stepped down alternating voltages, demodulating the vector in a phase sensitive demodulator (7) with a reference signal obtained by converting the demodulated vector in a pulse generator (9) these pulses being added or subtracted from the clock pulse in dependence on the vector sign and stepped down in the predetermined ratio in device (12), and counting in a counter (10) the pulses from generator (9), either up or down in dependence on the sign. <IMAGE>

Description

SPECIFICATION Method and Circuit Arrangement for Measuring an Incrementally Subdivided Path or Angle of Rotation Digitally The invention relates to a method of measuring an incrementally subdivided path or angle of rotation digitally, which path or angle is scanned by two pick-ups offset with respect to each other by a quarter of a cycle, the output signals of these pick-ups being somewhat like a sine wave or cosine wave. The invention also includes a circuit arrangement for carrying out the method.

Such a method is known, for example, from German Auslegesschrift No. 25 10 113. In this specification the signals obtained according to this method are designed to be processed by special circuitry, which makes it possible to implement the method as an integrated circuit of the MOS type.

Furthermore this method is known for example, from German Offenlegungsschrift No. 27 29 697.

Herean an incrementally subdivided distance is scanned so that the output signals are either like a sine wave or a cosine wave depending on the path.

These output signals are converted into squarewave signals and supplied to a counter which counts the squarewave signals in accordance with the direction of counting, the count of the counter corresponding to the distance scanned.

This method in accordance with the prior art is quite simple even in the construction of a circuit suitable for carrying out the method. The circuitry required does however increase very considerably as the resolution increases so that in practice, a resolution greater than 1:20 can no longer be implemented by this method.

The present invention seeks to make possible very high definition of an incrementally subdivided path while having only a small requirement in terms of circuitry.

According to a first aspect of the invention, there is provided a method of measuring an incrementally subdivided path or subdivided angle of rotation digitally, the said angle of rotation or path being scanned by two pick-ups which are phase shifted with respect to each other by 900, the output signals of these pick-ups being approximately of sine or cosine form wherein two alternating voltages shifted in phase by 900 with respect to each other are produced from a system clock pulse via a predetermined step down ratio, these alternating voltage modulating the pick-up output signals, and the results are then added to form a voltage vector; this voltage vector having the same frequency as the stepped-down alternating voltage is demodulated in phase sensitive manner with a reference signal obtained by converting the demodulated voltage into a series of pulses, which pulses are added to or subtracted from the system clock pulse depending on the sign of the demodulated voltage and are converted in the predetermined step-down ratio; and the number of pulses of the pulse series is counted up or down in dependence on the sign of the demodulated voltage.

If the predetermined step down ratio is set in stages, then the resolution may be fixed by simply selecting a suitable division factor.

According to a second aspect of the invention there is provided a circuit arrangement for measuring an incrementally subdivided path or subdivided angle of rotation digitally comprising two pick-ups phase shifted by 900 for scanning the path or angle, the pick-up producing outputs of generally sine or cosine form, wherein means are provided for producing two alternating voltages phase shifted by 900 from a clockpulse generator through a device providing a predetermined step down ratio, modulating means for modulating the voltages with the signals from the pick-ups, adding means for adding the two modulated signals to form a voltage vector having the same frequency as the stepped-down demodulation means for demodulating the voltage vector using a reference signal and means for producing the reference signal comprises means for converting the demodulated voltage into a series of pulses for adding to or subtracting from the pulses from the clock pulse generator in dependence on the sign of the demodulated voltage and means for stepping down the resulting pulses in the predetermined step down ratio, and counting means is provided for counting the pulses produced from the demodulated voltage in dependence on their sign.

A pulse shaper may be connected to a system clock pulse generator via a first divider having a predetermined divider ratio and the pulse shaper may have two outputs emitting signals shifted in phase by 900 and connected to modulation devices, the other inputs of these modulation devices being acted upon by these pick-ups; the outputs of the modulation devices are supplied to an adding device which controls a phase sensitive demodulator via a band pass filter, the output of the demodulator being connected to a pulse generator stage which emits pulses which depend on the direction of counting, to a counter and to a pulse adder/subtractor stage, the second input of this stage being connected to the system clock pulse generator and the output of the pulse adder/subtractor stage being supplied via a further divider having the same divider ratio as the first divider to the reference input of the phase sensitive demodulator.

Important advantages of the continuous method in accordance with the invention and of the related circuit are as follows: Very high resolution may be achieved simply and with good stability of display; several switchable division factors may be made possible simply; and the value may be set to zero without difficulty in any desired pick-up position.

The invention will now be described in greater detail, by way of example, with reference to the drawing, the single figure of which shows one form of circuit arrangement according to the invention.

A system clock pulse generator 1 operating at a high clock pulse frequency passes its pulses to a first divider 2 which reduces them in a predetermined step down ratio (for example 1000:1). The reduced pulses are supplied to a pulse shaper 3 for example a sinusoidal shaper, and each of its outputs are supplied to an input of a modulation device 4 or 5 which, for example, are multiplier devices. The other inputs of the modulation devices are connected respectively to the sine wave like or cosine wave like output signals or the two pickups which are offset with respect to each other by 900. The output signals of the modulation devices 4 and 5 are supplied to an adding device 6, the output signal of which is a modulated voltage, e.g. a sine voltage, at the frequency of the output voltage of the pulse shaper but at a different phase angle.This phase angle is a measure of the path within a rester portion of the incrementally subdivided path length.

If the pulse shaper does not emit any sinusoidal pulses but, instead produces square wave pulses, for example, then a band filter, not shown in the drawing, is connected between the adding device 6 and the demodulator 7 and allows the passage of largely the modulation products of the first harmonic of the reduced pulse frequency. The higher frequency modulation products emanating from the square wave pulses are filtered out so that a modulated sine voltage is in turn present having approximately the frequency of the reduced pulses.

The modulated sine voltage is supplied to a phase sensitive demodulator 7 whose reference voltage is obtained from the system clock pulse generator via a pulse adder/subtractor stage 11 and a second divider 12, the predetermined step down ratio of this divider 12 being identical to the step down ratio of the first divider 2 (e.g. 1000:1).

The output voltage of the demodulator 7 is supplied to a low pass filter 8. An integrator may be used instead of the low pass filter 8. The voltage smoothed in this way then arrives at a pulse generator stage 9 which may be a voltage/frequency converter (in future referred to as: VFC). Other possible embodiments of the pulse generator stage 9 are provided by a generator of fixed frequency in which the output may be switched in dependence on the input signal.

According to the polarity of the input signals, the VFC produces a directional counting signal for a counter 10 connected thereafter which counts the output signals of the pulse generator stage 9 in dependence on the direction of counting. In addition, the output pulses of the pulse generator stage 9 are supplied to the pulse adder/subtractor stage 11, the other input of which is connected to the system clock pulse generator 1-as already mentioned.

The circuit described operates as follows:- When the circuit is at rest the deplacement pick-up is stationary i.e. its output signals do not change. Of course any other pick-up may be used instead of the displacement pick-up if it has an incrementally subdivided path length, for example an angle of rotation pick-up. If the phase position of the modulated voltage is rotated exactly by 900 as compared to the phase position of the reference voltage, then the output voltage of the demodulator 7 is equal to zero, the VFC 9 does not emit any pulses and the circuit is in equilibrium. If the phase difference between the modulated voltage and the reference voltage should deviate from 900 however, the demodulator 7 produces a positive or negative output voltage according to the sign of the phase; difference, this output voltage being smoothed in the low pass filter 8.The VFC 9 also emits series of pulses in the case of input voltage different from zero and as appropriate produces a counting direction signal depending on the polarity of the input voltage. These counting pulses are added to or subtracted from the pulses of high clock pulse frequency from the system clock pulse generator 1 depending on the information with regard to the counting direction. The output pulse frequency of this phase is used as the reference voltage of the demodulator 7 after the predetermined step down has take place. The pulses of the VFC 9 are emitted so that the phase position of the reference voltage changes in the same sense as the phase position of the modulated voltage and in fact until the phase shift between the modulated voltage and the reference voltage is again exactly 900.

The output signals of the VFC 9 are supplied to the counter 10 which counts forwards or backwards once for each pulse of the VFC 9 depending on the counting direction signal, i.e.

the pulses of the VFC are registered in the counter 10 depending on the direction of counting. One division of the incrementally subdivided path corresponds to a shift in the phase angle of 27r.

Just as many pulses from the VFC 9 are required for the phase shift as are required by the division factor of the dividers 2 and 1 2, in the case of this example therefore, 1 ,000 pulses. If the counter 10 counts a pulse, then the incrementally subdivided path has been shifted by a thousandth of one division; the sign of the counter 10 then states the direction of the shift.

Since the resolution of a division of the incrementally subdivided path may be fixed simply by selecting a suitable division factor for the dividers 2 and 12, it is very easy to switch over to a different resolution.

Claims

1. A method of measuring an incrementally subdivided path or subdivided angle of rotation digitally, the said angle of rotation or path being scanned by two pick-ups which are phase shifted with respect to each other by 900, the output signals, of these pick-ups being approximately of sine or cosine form wherein two alternating voltage shifted in phase by 900 with respect to each other are produced from a system clock pulse via a predetermined step down ratio, these alternating voltage modulating the pick-up output signals, and the results are then added to form a voltage vector; this voltage vector having the same frequency as the stepped-down alternating voltages is demodulated in phase sensitive manner with a reference signal obtained by converting the demodulated voltage into a series of pulses which pulses are added to or subtracted from the system clock pulse depending on the sign of the demodulated voltage and are converted in the predetermined step-down ratio; and the number of pulses of the pulse series is counted up or down in dependence on the sign of the. demodulated voltage.

2. A method according to claim 1 wherein the alternating voltages which are phase shifted by 900 are sinusoidal and the modulation is a multiplication.

3. A method according to claim 1, wherein the alternating voltages which are shifted in phase by 900 are square waves.

4. A method according to any one of the preceding claims, wherein the predetermined step down ratio is set in stages.

5. A circuit arrangement for measuring an incrementally subdivided path or subdivided angle of rotation digitally comprising two pick-ups phase shifted by 900 for scanning the path or angle the pick-ups producing outputs of generally sine or cosine form, wherein means are provided for producing two alternating voltages phase shifted by 900 from a clock pulse generator through a device providing a predetermined stepdown ratio, modulating means for modulating the voltages with the signals from the pick-ups, adding means for adding the two modulated signals to form a voltage vector having the same frequency as the stepped down, demodulation means for demodulating the voltage vector using a reference signal and means for producing the reference signal comprises means for converting the demodulated voltage into a series of pulses for adding to or subtracting from the pulses from the clock pulse generator in dependence on the sign of the demodulated voltage and means for stepping down the resulting pulses in the predetermined step-down ratio and counting means is provided for counting the pulses produced from the demodulated voltage in dependence on their sign.

6. A circuit arrangement according to Claim 5, wherein a pulse shaper is connected to a system clock pulse generator via a first divider having a predetermined divider ratio, the two outputs of the pulse shaper, which emits signals phase shifted by 900 with respect to each other, are connected to modulation devices whose other inputs are acted upon by the pick-ups; the outputs of the modulation devices are supplied to an adding device which controls a phase sensitive demodulator via a band pass filter, the output of the demodulator being connected to a pulse generator stage which emits the pulses, which depend on the direction of counting to the counter and to a pulse adder/subtractor stage, the second input of this pulse adder or subtractor stage being connected to the system clock pulse generator; and the output of the pulse adder/subtractor stage is supplied, via a further divider having the same divider ratio as the first divider to the reference input of the phase sensitive demodulator.

7. A circuit arrangement according to claim 6 wherein, the pulse shaper is a sinusoidal shaper and the demodulation devices are multiplier devices.

8. A circuit arrangement according to claim 6, 7 or 8, wherein the pulse shaper (3) is a square wave shaper.

9. A circuit arrangement according to claim 6, 7 or 8, wherein the pulse generator stage is a voltage/frequency converter.

10 A circuit arrangement according to claim 6, 7 or 8 wherein the pulse generator stage is a generator of fixed frequency the output of which can be switched depending on the input signal.

11. A circuit arrangement according to any one of claims 6 to 10 wherein a low pass filter is connected between the phase dependent demodulator and the pulse generator stage.

12. A circuit arrangement according to any one of claims 6 to 10, wherein an integrator is connected between the phase dependent demodulator and the pulse generator stage.

13. A circuit arrangement according to any one of claims 6 to 12 wherein the divider ratio of the dividers may be set in stages.

14. A circuit arrangement according to any one of claims 6 to 13 wherein the counter may be set to a predetermined preselected value.

1 5. A method of measuring an incrementally subdivided path or angle of rotation substantially as described herein with reference to the drawings.

16. A circuit arrangement for measuring an incrementally subdivided path or angle of rotation substantially as described herein with reference to the drawings.