GB2030425A

GB2030425A - Transmission method and system for facsimile signal

Info

Publication number: GB2030425A
Application number: GB7926581A
Authority: GB
Original assignee: Kokusai Denshin Denwa KK; Nippon Telegraph and Telephone Corp
Current assignee: Nippon Telegraph and Telephone Corp; KDDI Corp
Priority date: 1978-07-31
Filing date: 1979-07-31
Publication date: 1980-04-02
Also published as: CA1128645A; FR2432807B1; NL7905654A; DE2930903A1; US4245257A; DE2930903C2; FR2432807A1; NL192420B; NL192420C; GB2030425B

Description

1 GB 2 030 425 A 1

SPECIFICATION Transmission method and system for facsimile signal

The present invention relates to a transmission method for efficient transmission of a binary signal, such as a two level facsimile signal.

Heretofore, there have been proposed, as two-level facsimile signal coding systems, (1) a run- 5 length coding system in which a signal obtained by scanning is converted into a time series train and then the magnitudes of the run lengths of white and black are successively coded alternately with each other for transmission and (2) a system in which signals of plural, for example, two scanning lines are simultaneously coded together. The system (1) does not utilize at all the property that facsimile signals have a high correlation in a direction perpendicular (vertical) to the scanning line direction; therefore, the 10 compression efficiency is low. The system (2) makes use of the correlation in the vertical direction with respect to the signa Is of a set of scanning lines to be coded at a time, but does not utilize the correlation to signals ofthis system on other scanning lines; consequently, the compression efficiency is higher than that of the system (1) but no sufficient compression effect is achieved, since this system does not fully use the two dimensional correlation between adjacent scanning lines. 15 An object of this invention is to overcome such defects of the prior art systems and to provide a transmission method using a two-dimensional successive coding system which removes redundancy of a facsimile signal by means of a relatively small number of memories and a simple circuit or means which thereby permit a substantial reduction of the number of bits to be sent out.

An object of an embodiment of this invention is to provide a transmission method using a one- 20 dimensional, two dimensional adaptive coding method in which the two- dimensional successive coding principle and the one-dimensional coding principle, such as a run-length coding system, are adaptively adopted, so that the amount of information or signals to be transmitted is reduced, thereby to shorten the transmission time and to lessen the influence of a transmission error.

A further object of an embodiment of this invention is to provide a decoding system suitable for 25 decoding a facsimile signal coded by the above mentioned coding method.

The present invention as it relates to the first object is based on the principle that when successively coding information (hereinafter referred to as addresses) of a facsimile signal representative of the positions of information changed picture elements (hereinafter referred to simply as change picture elements), each having a binary signal value different from that of an immediately 30 preceding picture element, the number of picture elements (hereinafter referred to as the distance) between each change picture element to be coded and a selected one of the adjoining change picture elements on the same scanning line (hereinafter referred to as a coding line) as the change picture element to be coded or on a scanning line immediately preceding it (which scanning line will hereinafter be referred to as a reference line) is employed to be classified into three modes determined by the 35 combinations of states of the above information change picture elements.

The present invention as it relates to the second object is based on the principle that in the coding of a digital facsimile signal, picture signal information of each line is coded by the one-dimensional system (for example, a run-length coding system) and the two-dimensional system and, for each line, the two coded signals are compared with each other, for example, in the number of coded bits and a 40 favourable one of them is selected as a coded output. Let [one- dimensional] and [two-dimensional] represent the numbers of coded bits obtained by coding a coding line by the one-dimensional and the two-dimensional coding system, respectively. When [one-dimensio nail < [two-dimensional], the two dimensional coding is used as a result of a judgement that the amount of information by the one dimensional coding is larger than that by the two-dimensional coding, whereas when [one dimensional] < [two-dimensional], the one dimensional coding is employed for the line to be coded as a result of a judgement that the amount of information by the one- dimensional coding is smaller than that by the two-dimensional coding.

Thus, according to the present invention there is provided a transmission method for a facsimile signal, in which a two-level facsimile signal obtained by scanning an original picture and successively 50 sampling the scanning output into picture elements is received as an input, and in which the position of an information change picture element having changed from one to the other of two signal levels is coded and sent out, the method comprising:

a first step of setting a starting picture element on a coding scanning line to be coded from which the coding starts; a second step of detecting a first information change picture element lying next to the starting picture element on the coding scanning line; a third step of detecting a first reference picture element, which is a first information change picture element lying after a picture element just above the starting picture element on a reference scanning line immediately preceding the coding scanning line and has a signal level different from that 60 of the starting picture element, and a second reference picture element of an information change picture element next to the first reference picture element.

a fourth step of detecting, as a first mode, the state in which the second reference picture element precedes a picture elementjust above the first information change picture element by more than n (n GB 2 030 425 A 2 2 being 0 or a positive integer) picture elements; a fifth step of detecting, as not the first mode, the state in which the second reference picture element does not precede a picture element just above the first information change picture element by more than n picture elements; a sixth step of comparing a first correlation between the starting picture element and the first 5 information change picture element with a second correlation between the first information change picture element and the first reference picture element when the above said state is detected as not the first mode; a seventh step of coding the presence of the first and second reference picture elements as the first mode and setting the picture element just below the second reference picture element as the starting picture element in the first step when the first mode is detected; an eighth step of coding a distance between the starting picture element and the first information change picture element as a second mode and setting the first information change picture element as the starting picture element in the first step when the first correlation is higher than the second correlation; a ninth step of coding the distance between the first information change picture element and the first reference picture element as a third mode and setting the first information change picture element as the starting picture element in the first step when the first correlation is not higher than the second correlation; and a tenth step of sending out the coded outputs of the seventh, eighth and ninth steps after 20 combining them into a composite signal of two-dimensional codes.

This invention will be further described hereinafter with reference to the accompanying drawings, in which:

Figs. 1, 2,3A, 313, 6, 7, 8A, 813, 8C, 11 and 16 show examples of facsimile signals, explanatory of the principles of this invention; Fig. 4A illustrates in block form an embodiment of this invention; Figs, 4B, 4C and 4D illustrate in block form specific operative examples of circuits for use in the embodiment of Fig. 4A; Fig. 5A shows in block form an example of a decoding device for a facsimile signal encoded by the embodiment of Fig. 4A; Figs. 513, 5C and 5D show in block form specific operative examples of circuits for use in the decoding device of Fig. 5A; Fig. 9 shows in block form another embodiment of this invention; Fig. 1 OA illustrates in block form an example of a decoding device for a facsimile signal encoded by the embodiment of Fig. 9; Fig. 1 OB illustrates in block form a specific operative example of a circuit for use in the decoding device of Fig. 1 OA; Fig. 12 shows in block form another embodiment of this invention; Fig. 13 shows in block form an example of a decoding device for a facsimile signal encoded by the embodiment of Fig. 12; Figs. 14 and 17 are block diagrams each illustrating another embodiment of this invention; and Fig. 15 is a block diagram illustrating an example of a decoding device for a facsimile signal encoded by the embodiment of Fig. 14.

A more detailed description will now be given of specific operative examples of this invention.

Figs. 1, 2, 3A and 313 illustrate examples of facsimile signals, blank blocks representing white 45 picture elements and hatched blocks black picture elements.

follows:

At first, a coding start picture element a. and other change picture elements are defined as a.: a starting picture element on the coding line Lc with which the coding starts along the scanning direction SD; a,: a change picture element next to a. on the coding line; b,: a first change picture element on the reference line Lr occurring after the picture element just above a. and having a binary signal value difterent from that of a.; b2: a changb picture element next to b, on the reference line.

As will hereinbelow be described, the picture elements on the coding line and the reference line are 55 successively collated with each other to detect the change picture elements on the two scanning lines for coding.

(Procedure l): In a case in which the two change picture elements b, and b2 on the reference line are detected prior to the change picture element a, on the coding line (refer to Fig. 2), this state is recognized as---aPass mode- and the change picture elements bland b. are coded with a Pass mode 60 cude, for exampre, '1110- (refer to the column of the Pass mode in Table 1), by which starting picture element for the next coding is set at a picture element aol on the coding line just under the picture element b2.

(Procedure 2): In a case where the change picture element a, is detected on the coding line prior to the change picture element b, on the reference line (refer to Figs. 3A and 313), scanning of the picture65 1 i 3 GB 2 030 425 A 3 elements proceeds until the change picture element b, occurs and the number of coded bits [a.a,l is obtained by adding the coded bits of a distance a,,al to the bits of a Horizontal mode code '1111 ". At the same time, the number of coded bits [bl all for coding a distance b,a, as a Vertical mode is obtained (refer to Table 1).

TABLE 1

Elements Mode to be coded Code Pass mode b, b, 1110 Horizontal mode a,,a, 1111 + M1-1(aaJ b, a, = 0 0 b, a, = +1 100 Vertical mode b, a, = -1 101 b,a, > 2 1100 + D(b, a, - 1) D, a, < 2 1101 + D(Jb,a,l -1) MH (xy) xy xy: white 0 00110101 1 000111 2 0111 3 1000 4 1011 MH (XY) xy: black 0000116111 1 11 011 n d (n) 1 2 3 4 1 01 001 0001 00001 In the column of the "Vertical mode" in Table 1, "-" indicates the case of the picture element a, being detected before the picture element bl and "+" the case of the picture element a, being detected after the picture element bl. These coded bit numbers are compared with each other to select any one of coding modes in accordance with the following conditions:

a) [aoall > [blall In a case where this condition is established, it is judged that a high correlation exists between the change picture element a, to be coded and the reference element b, and the distance b,al is selected as the Vertical mode to shift a new starting picture element to the position of the picture element a,.

For example, in the case of Fig. 3A, [bla,l = '110101 - = 6 bits and [a, all = " 11111 0OW = 8 bits; consequently, the condition [aoall > [b,all is established. Then, the picture element a, is encoded by a Vertical mode so that the coded signal - 110 10 1 " is generated.

b) [aoall: [blall When this condition is set up, it is judged that a high correlation exists between the change picture element a, to be coded and the starting picture element ao and coding of the distance acal is achieved 4 GB 2 030 425 A 4 following the Horizontal mode code---1111",shifting anew starting picture element to the position of the picture element a,.

For example, in the case of Fig, 3 B, [b all =- 6 =---110100001" = 9 bits and [aoall = '11111000---= 8 bits; consequently, the condition [a.all:5 [blall is established and the coded output of the picture element a, becomes "11111000---.

In the above description, the expressions (a) and (b) are mentioned as the conditions for selecting either the Horizontal mode or the Vertical mode but other conditional expressions can be used, such as follows:

(a): [aoall > [blall + m (m being an integer) (b): [a,al:! [blal + m (m being an integer) alternatively, if use is made of the distances aOal and bl all before coding, (a): a.al > bla, + m (m being an integer) (b): a.al 5 bla, + m (m being an integer) More over, in the column of codes in Table 1, a MH code (a modified Huffmann code, for particulars, refer to CCITT Recommendation To 4) and a bit-by-bit code D(n) are used; but it is a matter 15 of course that the present invention is not limited specifically to the use of such codes and can be achieved with ordinary variable length codes.

Besides, in the procedure 1, it is conditioned that the change picture elements just above the picture element a. and a, are not regarded as bl and b,; but the condition can be modified such that the change picture element just above the picture element ao or a, is included in b, and b2, or that the 20 change picture elements are not regarded as bl and b2 unless they are not spaced more than n (n being 0 or a positive integer) picture elements apart from the picture elements ao and a,.

As described in detail above, in the present invention, addresses of change picture elements to be coded are successively coded and, in this case, the addresses are each coded using a relative distance between the change picture element to be coded and a selected one of the change picture elements 25 already coded.

A brief description will be made of an example of boundary conditions which are utilized when this invention is reduced to practice, although it does not define the essence of the invention.

(1) Coding of a starting picture element on each scanning line:

A change picture element from white to black is always used as a first change picture element on 30 each line to be coded. Accordingly, in a case of the first picture element being black, it is made the first change picture element or the first picture element is compulsorily made white.

Further, the first starting picture element ao on each coding line is set up at the position of the first picture element.

(2) Coding of a terminating picture element on each scanning line:

The terminating picture element (in CCITT Recommendation T. 4, one line consists of 1728 picture elements) of each line is coded on the assumption that a change picture element lies next to it.

The following will describe examples of circuits for carrying this invention into practice in accordance with the principles described above.

Fig. 4A illustrates an example of a coding device. Reference numeral 1 indicates an input terminal 40 for a sampled two-level facsimile signal; 2 and 3 designate line memories, each storing signals of one line; 4 identifies a memory for storing the level of starting picture element a,; 5 denotes an address control circuit for controlling addresses of memories 2 and 3 and for generating an end of line signal EOL; 6 represents an exclusive-OR circuit; 11 and 12 show change picture element detectors, each composed of a 1 -bit memory 420 and an exclusive-OR circuit 42 1, as shown in Fig. 4B; 21, 23 and 24 refer 45 to detectors for detecting the change picture elements a,, b, and b2, respectively; 25 indicates a bla, direction detector; 32 and 33 designate counters; 40 identifies a pass mode detector; 52, 53 and 54 denote coders; 60 represents a comparator for comparing the numbers of coded bits with each other; 71, 72, 74 and 75 show gates; 81, 82 and 84 refer to address registers, each formed by a counter; 90 indicates a signal combiner; and 100 identifies an output terminal. For the sake of brevity, a memory 50 shift pulse generator, a counter clock pulse generator, etc. are not shown; but these do not exert influence on an understanding of the essence of the operation of the present invention.

Next, the construction and operation of this embodiment will be described in detail. A facsimile signal to be coded is provided from the input terminal 1 to the coding line memory 2 for storage therein.

Before this time, as a reference line signal, a signal of the preceding line stored in the line memory 2 is 55 transferred to the reference line memory 3 for storage therein. the a, memory 4 has stored therein the level of the starting picture element ao, as will be described later. Reading of the coding line memory 2 and the reference line memory 3 simultaneously starts from the position of the starting picture element ao under the control of the address control circuit 5. The change picture element detector 11 compares GB 2 030 425 A 5 a picture element signal read out of the line memory 2 with an immediately preceding picture element signal, successively, and as a result it generates an output -0- or---1--depending on whether the former signal is of the same level as the latter signal or not. The change picture element detector 12 detects change picture elements on the line memory 3 successively by the same manner as the detector 11.

The bl detector 23 is an AND circuit which provides---1---on an output line bp when a change picture element is detected by the change picture element detector 12 and the detected change picture element level differs from that of the starting picture element a., that is, when the output from the exclusive-OR circuit 6 is "ll ". The b2 detector 24 provides " 1 " on an output line b2p in a case in which a change picture element is detected by the change picture element detector 12 after detection of the change picture element bl by the bl detector 23; this bl detector 24 can be formed with one flip-flop 10 and an AND circuit. The Pass mode detector 40 is an AND circuit which provides "ll---on an output line p, judging that the mode of operation is the Pass mode in a case where the picture element a, has not been detected at the moment of occurrence of---1 " on the output line b 2p (in this case, a ln which is the output Q of a flip-flop in the a, detector 21 is---11 "), as will be described later. With---1 " on the output line p, the Pass mode coding circuit 54 yields a Pass mode code "ll 110", which is applied to the signal 15 combiner 90. Following this, a new starting picture element a, is shifted to the position just below the picture element b2 in the following manner: Upon occurrence of---1 " on the line b,p, the b2 address register 81 stops counting pulses from the address control circuit 5 and stores this status. This information is applied via the gate 74 to the ao address register 84 for addition to its content when the Pass mode detector 40 produces---1 "on the line p. The a, address register 82 stops counting pulses 20 from the address control circuit 5 upon occurrence of---11---on the fine alp and this information is provided via the gate 75 to the a. address register 84 for addition to its content when the comparator 60 produces---1" on aline vorh. The contents of the a. address register 84 are applied to the address control circuit 5 to re-start the coding operation with the new starting picture element. The address control circuit 5 having a construction such as that shown in Fig. 4D, stores the contents of the a, address register 84 in a register of a memory drive circuit 430 and increases a memory read-out address one by one upon each occurrence of a pulse from a pulse generator 431 to read information of the line memories 2 and 3 simultaneously bit by bit from the a. address register of the memory drive circuit 430. Further, upon each reception of the contents of the ao address register 84, the address control circuit applies the new starting picture element level to the a, memory 4 via the coding line memory 2. The contents of the memory drive circuit 430 are compared in a comparator 432 with contents of an address memory 433 of the end picture element of one line to generate an end of line signal EOL.

The first change picture element detector 11, when detecting a change picture element, provides an output "ll---to the a, detector 21 (a flip-flop). As a result of this, the information on the lines alp and 35 aln change from -0- to "ll " and from " 1 " to "0", respectively. The aoal counter 32 starts counting pulses from the moment of setting ao in the address control circuit 5, and stops the counting upon reception of---11 " from the line alp and provides the count value to the a,a, coding circuit 52. The a,a, coding circuit 52 encodes the count value with "1111 " added to its head using a code table such as shown in the column of the Horizontal mode of Table 1. The bla, counter 33 receives the outputs from the lines 40 bl.p and al.p so that it starts pulse counting with a first appearing--- 11---in either one of the lines b,p and alp and stops the counting with a next appearing "ll " in the other. The outputs from the lines blp and alp are also supplied to the bla, direction detector 25 and, with the circuit construction showrin Fig. 4C, comprising the AND circuits 423 and 424 and two flip-flop circuits 425 and 426, this detector outputs "1" on aline+ when---11---on the line blp appears earlier than or simultaneously with "1" on the line alp 45 but, in the opposite case, provides an output "ll " on a line-- The bla, coding circuit 53 encodes bla, with a sign + or - added thereto on the basis of the count value of the bla, counter 33 and the output of the line + or - from the bla, direction detector 25, as shown in the column of the Vertical mode of Table 1. The bit numbers encoded by the coding circuits 52 and 53 compared in magnitude with each other in the comparator 60; when the condition [a,a,l > [b,a 11 is established,---11 is provided on the line V (the Vertical mode), whereas when this condition is not established, "ll is provided on the fine h (Horizontal mode). In a case of the Vertical mode in which---11 " is outputted on the line V of the comparator 60, the coded signal of the bla, coding circuit 53 is provided via the gate 71 to the signal combiner 90. On the other hand, in the Horizontal mode in which---11 "is yielded on the line h, the gate 72 is opened to apply therethrough the coded signal of the aoal coding circuit 52 to the signal combiner 90. The signal combiner 90 combines the coded signals appili-ed thereto from the Pass mode coding circuit 54 an. d the gates 71 and 72 into a composite signal, which is provided on the output line 100 after being converted into an output signal train.

For the sake of brevity, the conditions for resetting the detectors, registers, counters and so forth are neither described in the foregoing nor shown in the drawings; but, required ones of these circuits 60 (the b2 detector 24, the al detector 21, the registers 81 and 82, the bial direction detector 25, the counters 32 and 33 and so forth) are reset for each setting of the picture element aV The interruption of the operation of this coding device is placed under the control of the address control circuit 5. Namely, the ao address is always watched by the address control circuit 5, the coding is stopped at the moment when the ao address becomes a line terminating picture element and the a. 65 6 GB 2 030 425 A 6 address is newly set to a line starting picture element and then coding of the subsequent line is resumed.

The above is the operation of the coding device of Fig. 4A and decoding is achieved by reversing the above said steps. An example of a decoding device is shown in Fig. 5A. Reference numeral 201 indicaies an input terminal; 202 designates an input buffer memory; 203 identifies a mode code identify 5 circuit; 211 and 212 denote line memories; 213 represents a a, memory; 221 and 222 show address control circuits; 231 and 232 refer to decoding circuits; 240 indicates a change picture element detector; 251 and 252 designate a bl detector and a b2 detector, respectively; 261 and 262 identify an adder and a substractor, respectively; 271 and 272 denote counters; 281 to 285 represent gates; 29 1, 292 and 294 show OR circuits; 293 refers to an exclusive-OR circuit; 300 indicates an a. register; and 10 310 designates an output terminal.

The following will describe the construction and the operation of the decoding device of Fig. 5A in detail. A coded signal from the input terminal 201 is first stored in the input buffer memory 202. The mode code identify circuit 203 has a construction such as that shown in Fig. 5B, comprising resistors 15, 441,442,443,444,445,446 and 447 and coincidence circuits 451,452,453 and 454, in which a 15 signal (four bits at most, as shown in Table 1) necessary for mode identification is read out of the input buffer memory 202 to identify the modes of operation, i.e. the Pass mode, the Horizontal mode and the Vertical mode. When the signal is 1110-, it is regarded as indicating the Pass mode and---1---is outputted on aline p; when the signal is---1111",ft is regarded as indicating the Horizontal mode and "1" provided on aline h; when the signal is -0-, "100" or---11OW, it is regarded as indicating that the 20 direction of the distance b,al is plus in the Vertical mode and '1 " is produced on a line V+; and when the signal is---101---or '1101", itis regarded as indicating that the direction of the distance bla, is minus in the Vertical mode and '1 " is yielded on a line V-. The address control circuit 221 has such a construction as depicted in Fig. 5C, in which when any one of the outputs p, V- and V+ from the mode code identify circuit is---1 -, pulses are applied to the memory 211 to shift it bit by bit from the a. address' 25 provided from Sa, When the identify circuit 203 provides " 1 " on the line p (the Pass mode), the address control circuit 221 reads the reference line memory 211 from the address of the picture element a. to start detection of the distance bb2. The reference line memory has stored therein information of the previous line via the coding line memory 212.

The change picture element detector 240 has the construction shown in Fig. 4B and provides an output---11---upon each detection of a picture element, whose level is different from the immediately preceding one in the signal train applied from the line memory 211. At the moment when the change picture element detector 240 provides the output " 1 -, if the detected picture element is different in level from the picture element a., the output---1---isapplied via the exclusive-OR circuit 293 to the bl 35 detector (an AND circuit) 251 to produce dn output '1---on a line blp, The ab, counter 272 receives pulses from the address control circuit 221 and counts the number of pulses occurring in the time interval from the a. address to bl (until " 1---is provided on the line blp). The b2 detector 252 outputs---1-- on a line b2p when another change picture element is detected by the change picture element detector 240 after detection of the picture element bl. This bl detector comprises a flip-flop and an AND circuit. 40 The a,b2 counter 271 received pulses from the address control circuit 221 and counts those occurring in the time interval from the a. address to b2 (until '1- is provided on the line b2P). The contents of the a0b2 counter 2717 are applied to the a, register 300 via the gate 28 1, which is opened by the provision of the output---1---on the line p of themode code identify circuit 203. The contents of the ao register 300 are added to the address control cir.cults 221 and 222, so that the ao address is newly set and the 45 decoding operation is resumed.

In a case where the identify circuit 203 provides---1---on the line V+ or V- (Vertical mode), the output "ll---from the OR circuit 291 is applied to the address control circuit 221 and the bla, decoding circuit 23 1. As a consequence, decoding relating to the above-said bl takes place and the count value of the aobl counter 2-72 indicates the address of the picture element b, relative to the picture element ao, 50 The bla, decoding circuit 231 reads signals of one word from the input buffer memory 202 and decodes them. The decoded value is added by the adder 261 to the value of the abl counter 272 and, at the same time, subtracted by the subtractor 262 from the value of the a,b, counter 272. In a case where the output line V+ of the mode code identify circuit 203 is -1-, the gate 284js opened, so that the information of the adder 261 is provided via the OR circuit 292 to the address control circuit 222 and to 55 the ao register 300 via the gate 282. In contrast thereto, if the output line V- of the mode code identify circuit 203 is---1 -, the gate 285 is opened, passing on the information of the subtractor 262 to the address control circuit 222 via the OR circuit 292 and to the ao register 300 via the gate 282. The address control circuit 222 having a construction such as depicted in Fig. 5D, sets up the address of the picture element a,on the basis of the information transmitted thereto via the OR circuit 292, reproduces 60 the picture element signals on the coding line as the same level as the picture element a. from the picture element a. to a picture element immediately preceding a, and inverts the level of the picture element a, relative to the information of the picture element a. register 300 are applied to the address control circuits 221 and 222, newly setting the address of the picture element a. and resuming decoding.

7 GB 2 030 425 A 7 In a case in which the line h of the mode code identify circuit 203 becomes---1 " (Horizontal mode), the aoal decoding circuit 232 reads signals of one word from the input buffer memory 202 and decodes them The decoded value is added to the address control circuit 222 and the ao register 300 via the gate 283. The address control circuit 222 sets up the address of the picture element a, reproduces the picture element signal on the coding line as the same level as the picture element a, f rom the picture element immediately preceding a, and makes the level of the picture element a, to be different from the level of the picture element a.. The a. address register 300 restores the address of the picture element a, so that the a, address becomes a new ao address. This new address is provided to the address control circuits 221 and 222 to set the a. address and re-start decoding.

Also, in respect of the above decoding device, the resetting conditions for the detectors, the 10 registers, the counters and so forth have been neither described nor shown in the drawings, but the node code identify circuit 203, the b2 detector 252, the address control circuits 221 and 222, the counters 271 and 272, the decoding circuits 231 and 232, etc. are reset for each new setting of the ao address.

The termination of one line is achieved by supervising the a, address with the address control circuit 222 and at the moment of the address of the picture element becoming the address of the last picture element of a scanning line, decoding of that line is completed and decoding of the next line is resumed.

In the above embodiment, when the Horizontal mode is identified, a distance between the starting picture element and the coding change point is encoded and the code--- 1111- indicating the Horizontal mode is added to the encoded value. For further enhancement of the compressiion efficiency, however, it is considered that in the case of the Horizontal mode being identified the following change picture 20 elements are encoded together and added with one Horizontal mode code--- 1111". That is, one Horizontal mode code is shared by two change picture elements; consequently, the compression efficiency is improved. This will hereinbeiow be described in detail.

Fig. 6 illustrates examples of facsimile signals, blank blocks representing white picture elements and hatched blocks black picture elements. At first, a coding start picture element a. and other change 25 picture elements are defined as follows:

ao: a starting picture element on the coding line with which the coding starts; a,: a change picture element next to a. on the coding line; a2: a change picture element next to a, on the coding line; bl: a first change picture element on the reference line occurring after the picture element just 30 above ao annd having a binary signal value different from that of a& b2: a change picture element next to bl on the reference line.

As will hereinbelow be described, the picture elements on the coding line and the reference line are successively collated with each other to detect the change picture elements on the two scan lines forcoding.

(Procedure l): In a case where the two change picture elements bl and b2 on the reference line are detected prior to the change picture element a, on the coding line (refer to Fig. 7). this state is recognized as a Pass mode and the change picture elements bl and b2 are coded with a Pass mode code, for example---1110- (refer to the column of the Pass mode in Table 2), by which a starting picture element for the next coding is set at a picture element a, on the coding fine just under the picture 40 element b.

2 (Procedure 2): In a case where the change picture element a, is detected on the coding fine prior to the change picture element bl on the reference line (refer to Figs. 8A, 8B), scanning of the picture elements proceeds until the change picture element bl occurs and the number of coded bits [aoall is obtained by adding the coded bits of a distance aal to the bits of a Horizontal mode code - 1111 ". At 45 the same time, the number of code bits [bla,Ifor coding distance bla, as a Vertical mode is obtained (refer to Table 2).

8 GB 2 030 425 A 8 TABLE 2

Elements Mode to be coded Code Pass mode b, b, 1110 Hor i zonta I mode a, a,, a, a, 1111 + M1-1(a,,aJ + MH -(a, a,) b,a, - 0 0 b, a, - +1 100 Vertical mode b, a, - -1 101 b,a, > 2 1100 + D(b, a, - 1) b, a, < -2 1101+ D(! b. a, 1 -1 1 MH (XY) MH (XY) XY xy: white xy: black n d (n) 0 00110101 0000110111 1 1 1 000111 010 2 01 2 0111 11 3 001 3 1000 10 4 0001 4 1011 011 5 00001 The signs "-" and---±-- are the same as in Table 1. These coded bit numbers are compared to select any one of coding modes in accordance with the following conditions:

a) [aoall > [blall When this condition is established, it is judged that a high correlation exists between the change picture element a, to be coded and the reference picture element b,, and the value of the distance bla, coded in the Vertical mode is selected to shift a new starting picture element to the position of the picture element a, For example, in the case of Fig. 8A, [blal = '110101 - = 6 bits and [aoall =---11111000- = 8 10 bits; consequently, the condition [aoall > [b,a,l is established. then the picture element a, is encoded by a Vertical mode so that the coded signal '110101 " is generated.

b) [a,,all: [blal When this condition is set up it is judged that a high correlation exists between the change picture element a, to be coded and the starting picture element a. and it is decided to perform coding in the Horizontal mode until a change picture element a2 appears after a,; thus, collation proceeds until the change picture element a2 occurs and code generation of the distances aoal arind ala2 is achieved following the generation of Horizontal mode code, for example, '1111 -, thereby shifting a new starting picture element to the position of the picture element a2.

9 GB 2 030 425 A 9 For example, in the case of Fig. 8 B, [b a l I =- 6 = '110100001" = 9 bits and [aoa,l =---11111000---=8 bits; consequently, the condition [aa 1:5 [bl aj is established and the coded outputs of the picture elements a land a2 become '1111 100W and---0 '11---.

In the above description, the expressions (a) and (b) are mentioned as the conditions for selecting either the Horizontal mode or the Vertical mode but other conditional expressions can be used, such as 5 follows:

(a): [aoall < [blal] + m (m being an integer) (b): [a.all:

[blall + m (m being an integer) Alternatively, if use is made of the distances a.a l and bla, before coding, (a): a,a, > bla, + m (m being an integer) (b): a.al 25 bla, + m (m being an integer) Moreover, in the column of codes in Table 2, a MH code ( a modified Huffrnann code, for particulars, refer to CCITT Recommendation T.4) and a bit-by-bit code D(n) are used; but it is a matter of course that the present invention is not limited specifically to the use of such codes and can be achieved with ordinary variable length codes.

Besides, in the procedure 1, it is conditioned that the change picture elements just above the picture elements ao and a, are not regarded as b, and b.; but the condition can be modified such that the change picture element just above the picture element ao or a, or that the change picture elements are not regarded as b, and b2 unless they are not spaced more than n (n being 0 or a positive integer) picture elements apart from the picture elements a, and a, As described in detail above, in the present invention addresses of change picture elements to be coded are successively coded and, in this case, the addresses are each coded using a relative distance between the change picture element to be coded and a selected one of the change picture elements already coded. Where this selected change picture element is the starting picture element ao on the coding line, the address of the next change picture element a2 to be coded is also coded using the relative distance between it and the picture element a.. As a consequence, the change picture elements whose addresses are coded using the distances between them and the starting picture elements on the coding line, are always in pairs. In a case of using the relative distance between change picture elements to be coded and a change picture element on the immediately preceding reference line, the change picture elements on the coding line are coded individually.

A brief description will be made of an example of boundary conditions which are utilized when this invention is reduced to practice, although it does not defined the essence of the invention.

(1) Coding of a starting picture element on each scanning line:

A change picture element from white to black is always used as a first change picture element on each line to be coded. Accordingly, in a ease of the first picture element being black, it is made the first 35 change picture element or the first pictre element is compulsorily made white.

(2) Coding of a terminating picture element on each scanning line:

The terminating picture element (in CCITT Recommendation To 4. one line consists of 1728 40 picture elements; acordingly, the terminating picture element is the 1728th picture element.) of each line is coded on the assumption that a change picture element lies next to it.

Fig. 9 illustrates an example of a coding device Reference numeral 1 indicates an input terminal for 45 a sampled two-level fascimile signal; 2 and 3 designate line memories, each storing signals of one line; 4 identifies a memory for storing the level of starting picture element ao; 5 denotes an address control circuit for controlling addresses of memories 2 and 3; 6 represents an exclusive-OR circuit; 11 and 12 show change picture element detectors, each composed of a 1 -bit memory and an exclusive-OR circuit, as shown in Fig. 413; 21, 22, 23 and 24 refer to detectors for detecting the change picture elements a, 50 a2, b, and b2, respectively; 25 indicates a blal direction detector; 31, 32 and 33 designate counter; 40 identifies a Pass mode detector; 51, 52, 53 and 54 denote coders; 60 represents a comparator for comparing the numbers of coded bits w4h each other; 71, 72, 73, 74, 75 and 76 show gates; 81, 82, 83 and 84 refer to address registers; 90 indicates a signal combiner; and 100 identifies an output terminal. For the sake of brevity, a memory shift pulse generator, a counter clock pulse generator, etc. 55 are not shown; but these do not exert influence on an understanding of the essence of the operation of the present invention.

GB 2 030 425 A 10 Next, the construction and operation of this embodiment will be described in detail. A facsimile signal to be coded is provided from the input terminal 1 to the coding line memory 2 for storage therein.

Before this time, as a reference line signal, a signal of the preceding line stored in the line memory 2 is transferred to the reference line memory 3 for storage therein. The a, memory 4 has stored therein the level of the starting picture element a., as will be described later. Reading of the coding line memory 2 5 and the reference line memory 3 starts simultaneously from the position of the starting picture element ao under the control of the address control circuit 5. The change picture element detectors 11 and 12 each comprise an exclusive-OR circuit and a 1 -bit memory, as shown in Fig. 4B, and compare the picture element signals read out of each of the line memories 2 and 3 with immediately preceding picture element signals to output "0" or---1---depending on whether the former signals are of the same 10 level as the latter signals or not, respectively. The b, detector 23 is an AND circuit which provides---1 " on an output blp when a change picture element is detected by the second change picture element detector 12 and the detected change picture element level differs from that of the starting picture element a., that is, when the output from the exclusive-OR circuit 6 is--- 1 -. The b2 detector 24 provides ---1 "on an output line b,p in a case where a change picture element is detected by the change picture 15 element detector 12 after detection of the change picture element b, by the b, detector 23; this b2 detector 24 can be made up of One fFip-f lop and an AND circuit. The Pass mode detector 40 is an AND circit which provides '1---on an output line p, judging that the mode of operation is the Pass mode in a case where the picture element a, has not been detected at the moment of occurrence of -1- on the output line b2p (in this case, aln which is the outputU of a flip-flop in the a, detector 21 is '1 ",as will be 20 described later. With '1 "on the output line p, the Pass mode coding circuit 54 yields a Pass mode code 11 OT, which is applied to the signal combiner 90. Following this, a new starting picture element (a.) is shifted to the position just under the picture element b2 in the following manner: Upon occurrence of ---1---on the line blp, the b2 address register 81 stops counting pulses from the address control circuit 5 and stores the count value. These contents are applied via the gate 74 to the a, address register 84 25 when the Pass mode detector 40 produced "ll "on the line p. The contents of the a, address register 84 are applied to the address control circuit 5 to re-start the coding operation with the new starting picture element.

The first change picture element detector 11, when detecting a change picture element, provides an output---1---to the a, detector 21 (a flip-flop). As a result of this, the information on the lines alp and 30 aln change from "0" to---1 " and from '1---to "0", respectively. The a2detector 22 is a flip/f lop which produced '1---on a line a2Pwhen a change picture element is detected by the change picture element detector 11 after the picture element a, is detected by the a, detector 21 C' 1---on the line alp). The aoal counter,12 starts counting pulses from the moment of setting ao in the address control circuit 5, and stops the counting upon reception of "ll " from the line alp and provides the count value to the a,,al coding circuit 52. 35 The aoal coding circuit encodes the count value with '1111 " added to its head, using, for example, a code table such as that shown in the column of the Horizontal mode of Table 1. The ala2counter 31 starts counting with " 1 on the line alp and stops the counting with " 1 on the line a 2p and provides the count value to the ala2 coding circuit 5 1. The a,a2 coding circuit 51 encodes the count value using such a code table, for exampi6-,as- shown in the column MH(xy) of Table 2. The b a, counter 33 receives the outputs 40 from the lines blp and alp so that it starts pulse counting with a first appearing---1 " in either one of the outputs blp and alp and stops the counting with a next appearing---1---in the other. The outputs from the fines blp and alp are also applied to the b,al direction detector 25 and, with the circuit construction shown in Fig. 4C, this dete;ctor outputs---1---on a line + when---1---on the line b,p appears earlier than or simultaneously with '1 "on the line alp but, in the opposite case, provides an output "1 "on aline-.

C Th-e--Zilii-lcodi-ng cir - cuit 53 encodes b a, with a sign + or - added thereto to on the basis of the count value of the bla, counter33 and the output of the line + or- fromthebla, direction detector 25, as shown in the column of the Vertical mode of Table 1. The bit numbers encoded by the coding circuits 52 and 53 are compared in magnitude with each other in the comparator 60; when the condition [a,all > [b,all is established---1---is provided on the line V (Vertical mode), whereas when this condition 50 is not established, " 1 " is provided on the line h (Horizontal mode). In a case of the Vertical mode in which---1 " is outputted on the line V of the comparator 60, the coded signal of the b,a, coding circuit 53 is provided via the gate 71 to the signal combiner 90. On the other hand, in the Horizontal mode in which---1 " is yieldod on the line h, the gates 72 and 73 are opened to apply therethrough the coded signals of the aa, coding circuit 52 and the a,a, coding circuit 51 to the signal combiner 90. The signal 55 combiner 90 combines the coded signals applied thereto from the Pass mode coding circuit 54 and the gates 71, 72 and 73 into a composite signal, which is provided on the output line 100 after being converted into an output signal train.

For the sake of brevity, the conditions for resetting the detectors, registers, counters and so forth are neither described in the foregoing nor shown in the drawings; but, required ones of these circuits 60 (the b. detector 24, the a, detector 2 1, the a2 detector 22, the registers 81, 82 and 83, the b,a 1 direction det----tor 25, the counters 31, 32 and 33 and so forth) are reset for each setting of the picture element ao, The interruption of the operation of this coding device is placed under the control of the address control circuit. Namely, the a. address always watched by the address control circuit 5, the coding is 65 11 GB 2 030 425 A 11 stopped at the moment when the a. address becomes a line terminating picture element and the a.

address is newly set to a line starting picture element and then coding of the subsequent line is resumed.

The above is the operation of the coding device of Fig. 9 and decoding is achieved by reversing the above-said steps. An example of a decoding device is shown in Fig. 1 OA. Reference numberat 201 5 indicates an input terminal; 202 designates an input buffer memory; 203 identifies a mode code identify circuit; 211 and 212 denote line memories; 213 represents an ao memory; 221 and 222 show address control circuits; 231, 232 and 233 refer to decoding circuits; 240 indicates a change picture element detector; 251 and 2 52 designate a kil detector and a b2 detector, respectively; 261 and 262 identify an adder and a subtractor respectively; 271 and 272 denote counters; 2l, 282, 283, 284, 285 and 286 10 represent gates; 291, 292 and 294 show OR circuits 300 indicates an a. register; and 310 designates an output terminal.

The foNowing will describe the construction and the operation of the decoding circuit of Fig. 1 OA in detail. A coded signal from the input terminal 201 is first stored in the input buffer memory 202. The mode code identify circuit 203 has such a construction ash shown in Fig. 5B, in which a signal (for 15 example, four bits at most, as shown in Table 2) necessary for mode identification is read out of the input buffer memory 202 to identify the modes of operation, i.e. the Pass mode, the Horizontal mode and the Vertical mode. When the signa I is- 1110", it is regarded as indicating the Pass mode and "1" is - outputted on a line p; when the signal is " 1111 ", it is regarded as indicating the Horizontal mode and "1" and is provided on aline h; when the signal is "0", "1100---or"1 100-, itis regarded as indicating 20 that the direction of the distance b,al is plus in the Vertical mode and "1---isproduced on aline V+; and when the signal is "1101 "or "ll 101 ",it is regarded as indicating that the direction of the distance b,al is minus in the Vertical mode and "1 " is yielded on a line V-. The address control circuit 221 has such a construction as depicted in Fig. 5C, in which when any one of the outputs p, V- and V+ from the mode code identify circuit is "11 -, pulses are applied to the memory 211 to shift it bit by bit from the ao address 25 provided from Sao, When the identify circuit 203 provides "ll---on the line p (the Pass mode), the address control circuit 221 shifts the reference line memory 211 from the address of the picture element a. to start detection of the distance Lilb.. The reference line memory has stored therein information of the previous line via the decoding line memory 212. The change picture element detector 240 has the construction 30 shown in Fig. 413 and provides an output "11---upon each detection of a picture element different from the immediately preceding one in the signal train applied from the line memory 211. At the moment when the change picture element detector 240 provides the output " 1 ", if the detected picture element is different in level from the picture element a., the output " 1 " is applied via the exclusive-OR circuit 293 to the bl detector (an AND circuit) 251 to produce an output---11 ', on a line blp. The a,b, counter 272 35 receives pulses from the address control circuit 221 and counts the number of pulses occurring in the time interval from the ao addresses to ki, (until " 1 " is provided on the ne bl. The b2 detector 252 outputs---1 " on a line b 2p when another change picture element is detecteJby the change picture element detector 240 after detection of the picture element b, (---1---on the line blp). This b, detector comprises a flip-f lop and an AND circuit. The a.b. counter 271 receives pulses from the address control 40 circuit 221 and counts them occurring in the time interval from the a. address to b2 (until---11 ', is provided on the line b,p). Upon the occurrence of " 1 " on the line b 2Q the address control circuit 221 once stops sending out of shift pulses. The information of the a0L12 counter 271 is applied to the a, register 300 via the gate 28 1, which is opened by the provision of the output "ll--on the line p of the mode code identify circuit 203. The information of the a. register 300 is added to the address control circuits 221 45 and 222, so that the ao address is newly set and the decoding operation is resumed.

In a case where the identify circuit 203 provides " 1 " on the line V+ or V- (the Vertical mode), the output---11---from the OR circuit 291 is applied to the address control circuit 221 and the b,al decoding circuit 23 1. As a consequence, decoding relating to the above-said bl and b2 takes place and the count value of the a.bl counter indicates the address of the picture element kil relative to the picture element 50 ao, The bla, decoding circuit 231 reads signals of one word from the input buffer memory 202 and decodes them. The decoded value is added by the adder 261 to the value of the abl counter 272 and, at the same time, subtracted by the subtractor 262 from the value of the ab, counter 272. In a case where the output line V+ of the mode code identify circuit 203 is '1 -, the gate g84 is opened, so that the contents of the adder 261 provided via the OR circuit 292 to the address control circuit 222 to the 55 ao register 300 via the gate 282. In contrast thereto, if the output line V- of the mode code identify circuit 203 is "1 ", the gate 285 is opened, passing the contents of the subtractor 262 to the address control circuit 222 via the OR circuit 292 and to the ao register 300 via the gate 282.

The address control circuit 222 having a construction such as that depicted in Fig. 1 OB, sets up the address of the picture element alon the basis of the information transmitted thereto via the OR 60 circuit 292, reproduces picture element signals on the decoding line memory 212 from the picture element a. to a picture element immediately preceding a, to be the same level as the picture element a.

and inverts the level of the picture element al relative to the level of the picture element ao The contents of the ao register 300 are applied to the address control circuits 221 and 222, newly setting the address of the picture element a. and resuming decoding.

12 - GB 2 030 425 A 12 In a case where the line h of the mode code identify circuit 203 becomes-- -1---(the Horizontal mode), the a.al and ala2 decoding circuits 232 and 233 successively read signals of two words from the input buffer memory 202 and the a.al decoding circuit 232 decodes the first one word and the ala2 decoding circuit 233 the second one word. The decoded values are added to the address control circuit 222 and the ao register j00 via the gates 283 and 286. The address control circuit 222 sets up the addresses of the picture element a, and a., reproduces picture element signals on the decoding line memory 212 from the picture element a. to a picture element immediately preceding a, to be the same as the level of the picture element ao and inverts the level of the picture element a, arid, thereafter, reproduces picture element signals from the picture element a, to a picture element immediately preceding a2 to be the same as the level of the picture element a, and makes the information of the 10 picture element a2 to be different from the level of the picture element a, The a. address register 300 restores the address of the picture elements a, and a2, so that the a2 becomes a new a. address. This new information is provided to the address control circuits 221 and 222 to set the a. address and restart decoding.

Also in respect of the above decoding device, the resetting conditions for the the detectors, the 15 registers, the counters and so forth have been neither described nor shown in the drawings: but required ones of them (the mode code identify circuit 203, the b2 detector 252, the address control circuits 221 and 222, the counters 271 and 272, the decoding circuit 231, 232 and 233, etc.) are reset for each setting of the ao address. The termination of one line is achieved by supervising the ao address with the address control circuit 222 and at the mement of the address of the picture element a. becoming the address of the last picture element of a scanning line, decoding of that line is completed and decoding of the.next line is resumed.

Next, a description will be given of a system of suppressing degradation of the picture quality of the reproduced picture due to a code error. In the coding system of this invention, a picture signal of the coding line is encoded using picture signal information of a reference line immediately preceding the 25 coding line. Accordingly, on the side of thedecoder, the picture signal of the coding line is also decoded using the picture signal information already decoded. Thus, since coding and decoding are performed successively using the picture signal information of scanning lines immediately preceding the coding lines respectively, if a code error occurs due to the influence of, for example, circuit noises and the like to cause incorrect reproduction of picture signals of a certain line, picture signals of the succeeding lines 30 are not reproduced correctly, resulting in markedly degraded picture quality of the reproduced picture.

Accordingly, it is necessary to detect occurrence of a code error, to suppress degradation of the picture quality of the line, in which the code error has occured and to rapidly recover from the code error state, so that the deterioration of the picture quality due to the code error do not spread to other lines.

According to an embodiment of this invention, these objects are achieved in the following manner: 35 On the coding device side, a detectable, so-called self-synchronized first control code is inserted, from a desired position in a code train, at a predetermined period of a picture signal, for example, immediately before the starting of coding of a line No. 1 every four lines (k = 4) as shown in Fig. 11; picture signal information of line No. 1 is encoded (into, for instance, a run-length code RL) by a one-dimensional method 1 without using picture signal information of a line immediately preceding the line No. 1; 40 scanning lines No. 2, No. 3.... No. K immediately following the line No. 1 are subjected to the two- dimensional successive coding 11 of this invention; and a second control code, different from the first control code for detecting the occurrence of a code error is inserted just before the coded signal of each line.

On the decoding device side, when the self-synchronized first control code is detected, it is 45 decoded as the line No. 1 without using information of the immediately preceding line on the assumption that the directly following code train has been encoded into a run-length code, RL. When the second control code is detected, it is decoded using information of the immediately preceding line on the assumption that it has been encoded according to this invention. Directly after completion of decoding of each line, the presence or absence of the first or second control code is checked to effect 50 checking. When an error is detected, the decoded line, in which the error is detected, is subjected to processing such as replacement by a picture signal of the immediately preceding line to thereby suppress deterioration of the picture quality. Upon detection of the error, the decoding operation is once stopped; but when the self-synchronized first control code is detected, decoding of the run-length code _RL is immediately started to restore it from the error state. - ding device of the present invention based. 55 Fig. 12 illustrates in block form an embodiment of a co on such principles, and Fig. 13 a corresponding decoding device. A facsimile picture signal input line 1 is connected via a switch 101 a to an RL coder 102 every K lines under the control of a switch control circuit 101. At this time, a first control code generator 104 generates a first control code and the RL coder 102 encodes a line (No. 1) into a run-length code. Upon completion of this encoding, the switch 60 101 a is connected to a two-dimensional coder 103 of this invention to achieve two-dimensional coding of lines No. 2 to No. k according to this invention and a second control code is inserted by a second control code inserting circuit 105 just before the coded signal of each scanning line.

On the decoding device side shown in Fig. 13, when the first control code is detected by a first control code detector 106, the run-length code is decoded by a run-length coder decoder 107 for one 65 IR i 13 GB 2 030 425 A 13 fine (no. 1) only and the reproduced picture element information is stored in a line memory 108 and, upon completion of decoding of the line No. 1, the content of the line memory 108 is transferred to a line memory 109. Thereafter, successive decoding of the lines No. 2, No.3---... No. k corresponding to the coding of this invention is effected by such a decoder 110 as shown in Figs. 5A and 1 OA using the content of the line memory 109. Upon completion of decoding of each line, the control codes are detected by the control code detectors 106 and 111, and it is checked by a code error detector 112 for occurrence of a code error. Once a code error has occurred in a scanning line, no decoding takes place until the scanning line No. k. Then, upon detection of the first control code, an ordinary decoding operation is started to restore from the code error state.

As has been described in the foregoing, the embodiment of the present invention has the 10 advantage that highly efficient coding can be achieved without depending on correlation, between adjacent lines of signals, by properly selecting the two kinds of coding systems in which a signal having high correlation between adjacent lines, such as a two-level facsimile signal, is encoded with high efficiency using a distance between a change picture element to be encoded and an adjoining one, and 15. in which in the case of a part having no correlation to a line just above it, just like, for example, a first 15 line of a document, a change picture element is encoded using a distance between it and another picture element of the same line.

This embodiment has another advantage that by inserting a selfsynchronized first control code, for example, every k scanning lines, encoding only one scanning line into run-length codes, encoding the subsequent scanning lines according to this invention and then checking for a code error upon completion of coding of the said one scanning line, degradation of the picture quality due to the code error is prevented from spreading, thereby to enable rapid restoration from the code error state.

In the following, another embodiment of this invention relating to the second object will now be described, in which the two dimensional coding principle as described above and the one dimensional coding principle, such as the run-length coding principle, are adaptively adopted.

Next, an example of the one-dimensional coding will be described. Fig. 8C shows an example of a facsimile signal. In the one-dimensional coding system, a run from a picture element C, to a picture element directly before a picture element C2 Consists of five black picture elements, and hence is coded into M01 1 ", for example, according to the MH code in Table 1; a run from the picture element C, to a picture element immediately before a picture element C, consists of seven white picture elements, and 30 hence is coded into '1111 -; and a run from the picture element C, to a picture element C4 consists of two black picture elements, and hence is coded into---11 -. These coded trains are stored or outputted as a one-dimensional coded line.

The following will describe examples of circuits for putting this embodiment into practice in accordance with-the principles described above.

Fig. 14 is an example of a coding device, in which the part indicated by a dotted enclosure is the same as Fig. 9. A change picture element detector 13 is composed of a 1 - bit memory and an exclusive OR circuit as shown in Fig. 4B. There are further provided a NAND circuit 7, an AND circuit 8, a counter 34, coders 55 and 56, coded signal memories 91 and 92, a comparator 62, gates 77 and 78, a first control code generator 62, gates 77 and 78, a first control code generator 102, and a second control 40 code generator 10 1.

Next, the contruction and operation. of this embodiment will be described in detail. A facsimile signal to be coded is provided from the input terminal 1 to the coding line memory 2 for storage therein.

Before this time, as a reference line signal, a signal of the preceding line stored in the line memory 2 is transferred to the reference line memory 3 for storage therein. The a, memory 4 has stored therein the 45 level of the starting picture element a, as will be described later. Reading of the coding line memory 2 and the reference line memory 3 simultaneously starts f rom the position of the starting picture element a. under the control of the address control circuit 5.

The change picture element detectors 11, 12 and 13 respectively are each constructed, as shown in Fig. 4B, and compare the picture element signals read out of the line memories 2 and 3, respectively, 50 with immediately receding picture element signals of each line to output "0" or " 1---depending on whether the former signals are of the same level as the latter signals or not.

The bl detector 23 is an AND circuit which provides---1 " on the output line b,p when a change picture element is detected by the change picture element detector 12 and level of the detected change picture element differs from that of the starting picture element a, that is, when the output from the 55 exclusive 0 - R circuit 6 is '1 ". The b2 detector 24 provides---1 " on an output line b2,, in a case where a change picture element is detected by the change picture element detector 12 after detection of the change picture element b, by the b, detector 23; this b, detector 24 can be made up of one flip-flop and an AND circuit. The Pass mode detector 40 is an AND circuit which provides '1---on an output line p, judging that the mode of operation is the Pass mode in a case where the picture element a, has not 60 been detected at the moment of occurrence of "1---on the output line b2p (in this case, a, which is the output Qof a flip-flop in the a, detector 21 is "1"), as will be described later. With---V'on the output line p, the Pass mode coder to the coded signal memory 91. Following this, anew starting picture element is shifted to the position just under the picture element b, in the following manner: Upon occurrence of ---1---on the line b2P, the b2 address register 81 stops counting pulses from the address control circuit 565 14 GB 2 030 425 A and stores the count value. This information is applied via the gate 74 to the a. address register 84 at the moment of the Pass mode detector 40 providing---1---on the line p. The contents of the a, address register 84 are applied to the address control circuit 5 to re-start the coding operation with the new starting picture element a..

[he change picture element detector 11, when detecting a change picture element, provides an output---1 " to the a, detector 21 (a flip-flop). As a result of this, the information on the lines alp and aln change from -0to "1---and from '1---to -0-, respectively. The a, detector 22 is a flipflop which outputs---11---on a line a2p when a change picture element is detected by the change picture element detector 11 after the picture element a, is detected by the a, detector 21 C1---on the line alp). The aoal counter 32 starts counting of pulses from the moment of setting a, in the address control circuit 5, but 10 stops the counting upon reception of---1---from the line alp and provides the count to the a.al coder 52. The a.al coding circuit encodes the count value with "ll 111---added to its head, using such a code table as shown in the column of the Horizontal mode of Table 1. The ala, counter 31 starts counting with---1 on the line alp and stops the counting with---11 " on the line a,p and provides the count value to the ala, coder. The ala2 coder 51 encodes the count value using a code table such as that shown in the column 15 MH(xy) of Table 1. The bla, counter 33 receives the outputs from the lines blp and alp and starts pulse counting with a first appearing---11---in either one of the outputs and stops the counting with a next appearing '1---in the other. To the bla, direction detector 25 are also applied the output from the lines blp and a,. and, with the circuit construction shown in Fig. 4C, this detector outputs---1 " on a line bp appears earlier than or simultaneously with '1 "on the line alp but, in the opposite case, provides an 20 output " 1---on a line The bla, coder 53 encodes bla, with a sign + or - added thereto on the basis of the count value of the bla, counter 33 and the output of the line + or - from the bla, direction detector 25, as shown in the column of the Vertical mode of Table 1. The bit numbers encoded by the coders 52 and 53 are compared in magnitude with each other in the comparator 60; when the condition [a,all > [blall is 25 eatablished, "ll---is provided on the line V (Vertical mode), whereas when this condition is not established,---11---is provided on the line h (Horizontal mode). In a case of the Vertical mode in which---11 " is outputted on the line V of the comparator 60, the coded signal of the bal coder 53 is provided via the gate 71 to the coded signal memory 9 1. On the other hand, in the Horizontal mode in which "1 ', is yielded on the line h, the gates 72 and 73 are opened to apply therethrough the coded signals of the 30 a.al and ala2 coders 51, 52 to the coded signal memory 9 1.

The change picture element detector 13 is a detector for the onedimensional coding. Upon detection of a change picture element by this detector, the counter 34 starts counting of clock pulses Pc and, upon detection of the next change picture element, this counting is at once stopped, and the count value atthis moment is coded by the coder 55 or 56 of the next stage.

The output from the counter 34 is coded by the coder 55 or 56 depending on whether the signal is white or black. Namely, a signal from the coding line memory 2 and the output from the change picture element detector 13 are applied to the NAND circuit 7 and the AND circuit 8, and the outputs from the NAND circuit 7 and the AND circuit 8 are applied to the coders 55 and 56 respectively; the coder 55 or 56 operates independence on whether the outputs from the NAND circuit and the AND circuit are each 40 56 and coded therein by the MH code of Table 1, thereafter being provided as a one-dimensional coded train to the coded signal memory 92. The coded output signal thus stored in the coded signal memory 91 is a two-dimensional coded signal, whereas the coded output signal stored in the coded signal memory 92 is a one-dimensional coded signal. These coded signals are applied to comparator 62 and 45 compared with each other, for example, in the number of bits for each line in the outputs from the memories 91 and 92 for selecting a more advantageous one of the two memory output signals.

Where the one-dimensional coding is judged to be advantageous as a result of the comparison in the comparator 62, an output S1 becomes---1 " to open the gate 7 8 for passing on the information of the coded signal memory 92 to the signal combiner 110. At the same time, the first control code generator 50 102 provides a first control code (a first line synchronizing signal I- SS1), for example, "01111111-- indicating that the line is a one-dimensional coded line. This control code is added to the head of the information of the coded signal memory 92.

In the case in which the two-dimensional coding is judged to be advantageous as a result of the comparison in the comparator 62, an Output S2 becomes---11" to open the gate 77 for applying 55 therethrough the information of the coded signal memory 91 to the signal combiner 110. At the same time, the second control code generator 101 provides a second control code (a second line synchronizing signal LSS2), for example "01111110---indicating that the line is a two-dimensional coded line. This control code is added to the head of the information of the coded signal memory 9 1.

The signal combiner 110 combines the control code from the control code generator 101 or 102 and 60 the signal from the gate 77 or 78 into a composite signal, which is sent out from the output terminal after being converted into an output signal train.

In a case of producing the first and second control codes in the form of "01111111---and "0111111 W respectively, as described above, in order to make these control codes distinguishable from other codes, it is necessary, for example to compulsorily insert "0" in the control codes every five 65 ik 1 tt GB 2 030 425 A 15 1 " 's occur ' ing successively in the coded signals, like---11111010---.. . -. Needless to say, the decoding side decodes the coded signals removing the "0" next to "11111---in the codes signal.

For the sake of brevity, the conditions for resetting the detectors, registers, counters and so forth are neither described in the foregoing nor shown in the drawings; but, required ones of these circuits (the b2 detector 24, the a, detector 2 1, the a2 detector 22, the registers 81, 82 and 83, the b la, direction 5 detector 25, the counters 31, 32 and 33 and so forth) are reset for each setting of the picture element a01 The interruption of the operation of this coding device is placed under the control of the address control circuit. Namely, the a. address is always watched by the address control circuit 5, and the coding is stopped at the moment when the ao address becomes aline terminating picture element, and 10 the a. address is newly set to a line starting picture element, and then coding is resumed of the subsequent line.

An example of a decoding device for receiving a facsimile signal encoded by the embodiment of Fig. 14 is shown in Fig. 15, in which circuits enclosed by a dotted enclosure are further added to the decoding device shown in Fig. 10A. The enclosed portion comprises a first control code detector 311, a 15 second control code detector 312, flip-flops 321 and 322, gates 287, 331 and 332, a one-dimensional coder 234, and decoded signal memories 341 and 342.

The following will describe the construction and the operation of the decoding device of Fig. 15 in detail. A coded signal from the input terminal 201 is once stored in the input buffer memory 202. The signal from the input buffer memory 202 is checked first by the first and second control code detectors 20 311 and 312 as to whether the signal is the one-dimensional or two- dimensional coded one.

If the inputted control code is, for example---0 1111110---the signal is judged as the two dimensional coded one, and the second control code detector 312 provides an output ', 1---to set the flip-flop 322, opening the gate 288. When the control code is for example, "0 1111111 ", the signal is judged as the one-dimensional coded signal, and the first control code detector 311 yields an output 25 1 " to set the flip-flop 32 1, opening the gate 287. At this time, the flip-flop 322 is reset; consequently, the gate 288 is cut off.

In a case of the two-dimensional coded signal being applied to open the gate 288, the mode code identify circuit 203, which has such a construction as shown in Fig. 5B, responds to opening of the gate 288 to read a required number of signals (for example, four bits at most, as shown in Table 1) from the 30 input buffer memory 202, identifying the mode of the input signal, i.e. any of the Pass mode, the Horizontal mode and the Vertical mode. When the signal is "111 W, it is regarded as indicating the Pass mode and '1 " is outputted on a line p; when the signal is---1111" it is regarded as indicating the Horizontal mode, and "1 " is provided on a line h; when the signal is "0", '11 00" or 'A 100", it is regarded as indicating that the direction of the distance bla, is plus in the Vertical mode, and---1 "is produced on 35 aline V+; and when the signal is---101" or---1101"it is regarded as indicating that the direction of the distance bla, is minus in the Vertical mode, and '1 "is yielded on aline V-. The address control circuit 221 has such a construction as depicted in Fig. 5C, from which when any one of the outputs p, V- and V+ from the mode code identify circuit is '1 ", pulses provided from Sao are applied to the memory 211 to shift it bit by bit from the ao address.

When the identify circuit 203 provides " 1 " on the line p, the address control circuit 221 shifts the reference line memory 211 from the address of the picture element ao to start detection of the p icture element bl and b2. The reference line memory 211 has pre-stored therein information of the previous line via the decoded line memory 212. The change picture element detector 240 has the construction shown in Fig. 413 and provides an output---1 " upon each detection of a picture element different from the 45 immediately preceding one in the signal train applied from the line memory 211. At the moment when the change picture elementdetector 240 provides the output "1 -, if the detected picture element is different in level from the picture element a., the output '1---is applied via the exclusive-OR circuit 293 to the bl detector (an AND circuit) 251 to produce an output " 1 " on a line blp. The aobl counter 272 receives pulses from the address control circuit 221 and counts the number of pulses occurring in the 50 time interval from the aO address to b, (unit " 1---is provided on the line blp). The b2 detector 252 outputs " 1 " on a line b2p when another change picture element is detected by the change picture element detector 240 after detection of the picture element b2 ("' " on the line b,p). This bl detector comprises a flip-flop and an AND circuit. The ab2 counter 271 receives pulses from the address control circuit 221 and counts those occurring in the time interval from the ao address to b2 (until '1 " is provided on the line 55 b2P). Upon occurrence of '1 " on the line b2P, the address control circuit 221 once stops sending out of the shift pulses. The information of the a02 Counter 271 is applied to the a. register 300 via the gate 28 1, which is opened by the provision output---1 " on the line p of the mode code identify circuit 203.

The contents of the a. register 300 are added to the address control circuits 221 and 222, so that the a.

address is newly set and the decoding operation is resumed. 60 In a case where the identify circuit 203 provides '1 " on the line V+ or V(Vertical mode), the output "1---from the OR circuit 291 is applied to the address control circuit 221 and the bla, decoder 23 1. As a consequence, decoding relating to the above-said bl and b2 takes place, and the count value of the a.bl counter indicates the address of the picture element bl relative to the picture element a.. The 65bla, decoder 231 reads signals of one word from the input buffer memory 202 and decodes them. The 65 16 GB 2 030 425 A 16 decoded value is added by the adder 261 to the value of the a0b, counter 272 and, at the same time, substracted by the subtractor 262 from the value of the a,b, counter 272. In a case where the output line V+ of the mode code identify circuit 203 is " 1 ", the gate 284 is opened, so that the contents of the added 261 is provided via the OR circuit 292 to the address control circuit 222 and to the ao register 300 via the gate 282. In contrast thereto, if the output line V- of the mode code identify circuit 203 is 5 -1 " the gate 285 is opened, passing the contents of the subtractor 262 to the address control circuit 222 via the OR circuit 292 and to the ao register 300 via the gate 282.

The address control circuit 222 having a construction such as that depicted in Fig. 1 OB, sets up the address of the picture element a, on the basis of the contents transmitted thereto via the OR circuit 292, reproduces the picture element signals on the decoded line from the picture element a, to a picture element immediately preceding a, identical with the level of the picture element ao and inverts the level of the picture element a, relative to the level of the picture element ao, The content of the ao register 300 is applied to the address control circuits 221 and 222, newly setting the address of the picture element ao and resuming decoding.

In a case where the line h of the mode code identify circuit 203 becomes 1 " (Horizontal mode), 15 the a0a, and aja2 decoders 232 and 233 successively read signals of the two words from the input -buffer memory 202 and the a0a, decoder 232 decodes the first word and the aja2 decoder 233 the second one word. The decoded values are added to the address control circuit 222 and to the ao register 300 via the gate 283 or 286. The address control circuit 222 sets up the addresses of the picture elements a, and ao, reproduces the picture element signal on the decoded line from the picture element 20 ao to a picture element immediately preceding a, to be the same level as that of the picture element ao and inverts the level of the picture element a, and, thereafter, reproduces the picture element signals from the picture element a, to a picture element immediately preceding a, to be the same level as that of the picture element aland sets the level of the picture element a2 to be different from the level of the picture elementa, The ao address register 300 restores the addresses of the picture elements a, and a2, 25 so that the a. address becomes a new ao address. This new information is provided to the address control circuits 221 and 222 to set the aO address and restart decoding.

The two-dimensional decoded output of the Vertical and Horizontal modes thus applied to the address control circuit 222 is processed therein as described above and then stored in the decoded signal memory 342. In this case, since the flip-flop 322 is in the set state, the gate 332 is opened by its 30 output, so that the two-dimensional decoded signal stored in the decoded signal memory 342 is applied to the decoded line memory 212 and then outputted via the output terminal 350.

Next, when the first control code detector 311 detects the control code indicating the one dimensional coded signal the gate 287 is opened, as mentioned above, and the signal of the line is decoded by the one-dimensional decoder 234, thereafter being stored in the decoded signal memory 35 341. At this time, since the gate 331 is open, the one-dimensional decoded signal is provided to the decoded line memory 212, thereafter being outputted via the output terminal 350.

Also in respect of the above decoding device, the resetting conditions for the detectors, the registers, the counters and so forth have been neither described nor shown in the drawings; but required ones of them (the mode code identify circuit 203, the b2 detector 252, the address control circuits 221 40 and 222, the counters 271 and 272, the decoders 231, 232 and 233, etc.) are resetfor each setting of the ao address. The termination of one line is achieved by supervising the ao address with the address control circuit 222 and, at the moment of the address of the picture element ao becoming the address of the last picture element of a scanning line, decoding of that line is completed and decoding of the next line is resurnmed. 45 In the embodiment described above, the numbers of bits of the one- dimensional and two dimensional coded signals for each line are compared, and the coded signal of a smaller number of coded bits is selected; but this comparison between the amounts of information of the one-dimensional and two-dimensional coded signal is not limited specifically to the abovp. For example, the absolute number and a predetermined reference numer of pictureelement changing points of the line to be coded are compared with each other; if the former is smaller than the latter, the one-dimensional coded line is used, and if the latter is smaller than the former, the two- dimensional coded line is used.

Similarly, a difference between the absolute number of picture element changing points of the line to be coded and the absolute number of picture element changing points of an immediately preceding reference line is compared with a predetermined reference number; if the former is smaller than the 55 latter, the two-dimensional coded line is used, and if the former is larger than the latter, the one dimensional coded line is used.

In the above, the - one-dimensional and two-dimensional coded -lines are selectively employed in accordance with the results of comparison between the amounts of information of the one-dimensional and two-dimensionalcoded -signals at the end of scanning of one line, but it is also possible to perform 60 coding and comparison for each signal of a predetermined length on one scanning line. Moreover, while the above embodiment has been described in connection-with a case of using the two-dimensional sequential coding system, the invention can be carried into practice even if some other two-dimensional coding system is used.

As described in the foregoing, according to this invention, a digital facsimile signal is coded by the 65 i 1; m 17 GB 2 030 425 A 17 onedimensional and the two-dimensional coding system for each line and, in accordance with the amounts of information of the two coded signals, a more favourable one of them is selected as a coded output, for example, as shown in Fig. 16. Accordingly, there is the possibility that two-dimensional coded outputs are successively produced over a number of lines. With the two-dimensional coding system, however, each line is coded and decoded utilizing picture signal information of a reference line 5 immediately preceding it, as described previously, and a code error resulting from, for example, circuit noise or the like is likely to lead to a substantial degradation of the picture quality of reproduced pictures in those lines following that in which the code error has occurred. Therefore, in a case where when a code error is detected, a request repeat system can be used as in a four- wire private circuit or data communication network and a two-wire network circuit like an ordinary telephone circuit is employed, it 10 is necessary to prevent spreading of the error.

Next, a description will be given of a system for limiting degradation of the picture quality of a reproduced picture due to the code error. This is to prevent in the one-dimensional, two-dimensional adaptive coding system described in the foregoing, the number of two-dimensional coded lines being outputted in succession exceeding, for example, k lines (k is selected suitably but is shown to be five), as 15 shown in Fig. 16.

In Fig. 16, in a case where it is judged that a one-dimensional coded line is favourable for a first line and that two-dimensional coded lines are favourable for second to eighth lines, a one-dimensional coded line is compulsorily used for the sixth line instead of the two-dimensional coded line so that k does not exceed five. In Fig. 16, for a ninth line, a one-dimensional code output is produced according to 20 the judgement that it is favourable forthe line. Even if the one-dimensional coded line is selected as a result of comparison between the one-dimensionai and two dimensional coded lines, a onedimensional coded line is thus compulsorily inserted after k-1 successive two-dimensional coded lines counting from the one-dimensional coded line. Accordingly, a one-dimensional line may in some cases be inserted after two-dimensional lines less thank are outputted.

In an embodiment of this invention based on such principles, a scale-of-k counter 130, an inhibit circuit 131 and OR circuit 132 are provided in the coding device as indicated by the broken line in Fig.

17. When the Output S2 from the comparator 62 is produced successively for k lines, the output S, is inhibited by the inhibit circuit 13 1, and the output from the OR circuit 132 is applied to the first control code generator 102 and the gate 78, with the result that the first control code and a one-dimensional 30 coded signal are transferred to the signal combiner 110. For the decoding device, however, no modification is needed.

As has been described in ' detail in the foregoing, the present invention permits a substantial reduction of the amount of information to be transmitted and prevents spreading of degraded picture quality due to, for example, a code error.

Claims

1. A transmission method for a facsimile signal, in which a two-level facsimile signal obtained by scanning an original picture and successively sampling the scanning output into picture elements is received as an input, and in which the position of an information change picture element having changed from one to the other of two signal levels is coded and sent out, the method comprising:

a first step of setting a starting picture element on a coding scanning fine to be coded from which the coding starts; a second step of detecting a first information change picture element lying next to the starting picture element on the coding scanning line; a third step of detecting a first reference picture element, which is a first information change 45 picture element lying after a picture element just above the starting picture element on a reference scanning line immediately preceding the coding scanning line and has a signal level different from that of the starting picture element, and a second reference picture element of an information change picture element next to the first reference picture element; a fourth step of detecting, as a first mode, the state in which the second reference picture element 50 precedes a picture element just above the.first information change picture element by more than n (n being 0 or a positive integer) picture elements; a fifth step of detecting, as not the first mode, the state in which the second reference picture element does not precede a picture elementjust above the first information change picture element by more than n picture elements; a sixth step of comparing a first correlation between the starting picture element and the first information change picture element with a second correlation between the first information change picture element and the first reference picture element when the above- said state is detected as not the first mode; a seventh step of coding the presence of the first and second reference picture elements as the 60 first mode and setting the picture elementjust below the second reference picture element as the starting picture element in the first step when the first mode is detected; an eighth step of coding a distance between the starting picture element and the first information change picture element as a second mode and setting the first information change picture element as 18 GB 2 030 425 A 18 the starting picture element in the first step when the first correlation is higher than the second correlation; a ninth step of coding the distance between the first information change picture element and the -first reference picture element as a third mode and setting the first information change picture element as the starting picture element in the first step when the first correlation is not higher than the second correlation; and a tenth step of sending out the coded outputs of the seventh, eighth and ninth steps after combining them into a composite signal of two- dimensional codes.

2. A transmission method for a facsimile signal according to claim 1, in which said second step further detects a second information change picture element immediately after said first information 10 change picture element on said coding scanning line, and in which said eighth step sets said second information change picture element in place of said first information change picture element as said starting picture element. -

3. A transmission method for a facsimile signal according to claim 1 or 2, further comprising:

an eleventh step of successively coding by a one-dimensional method information change picture15 elements on a coding scanning line to be coded for each predetermined length of the coding scanning line to develop one-dimensional codes and storing the one-dimensional codes; a twelfth step of comparipg the information amount of the one-dimensional codes and the twodimensional codes stored for each predetermined length of the coding scanning line; 1 a thirteenth step of selecting said composite signal as an output when the information amount of 20 the one-dimensional codes is higher than the information amount of the two-dimensional codes; a fourteenth step of selecting the onedimensional codes as an output when the information amount of the one-dimensional codes is not higher than the information amount of the two-dimensional codes;and a fifteenth step of adding a peculiar control code to the coded output of each of the thirteenth 25 and fourteenth steps for sending out them after combining into a composite transmission signal.

4. A transmission method for a facsimile signal according to any of claims 1, 2 or 3, further comprising:

a sixteenth step of temporarily stopping the two-dimensional coding operation every time the number of coding scanning lines has reached a predetermined value nd coding the positions of _ information change picture elements of the next coding scanning line only without referring to the positions of information change picture elements of another scanning line to develop RL codes to be combined with said composite signal.

5. A transmission system for a facsimile signal for decoding a coded facsimile signal developed by the transmission method according to any one of claims 1 to 4 so that the position of information change picture elements included in a two-level facsimile signal, which is obtained by scanning an original picture and successively sampling the scanning output into picture elements, are coded, the system comprising:

first circuit for storing information of a scanning line to be decoded; second circuit for storing information of a reference line just decoded; third circuitfor controlling addreses of said first circuit; fourth circuitfor controlling addresses of said second circuit; fifth circuitfor setting a starting picture element on a decoding scanning line from which the decoding starts; sixth circuit for detecting first, second and third mode codes from the coded facsimile signal; seventh circuit for detecting a first reference picture element which is a first information change picture element positioned after a picture element just above the starting picture element on the reference scanning line and having a signal value different from that of the starting picture element; eighth circuit for detecting a second reference picture element which is an information change picture element just succeeding to the first reference picture element; ninth circuitfor decoding a code indicative of a relative distance between the first reference pictOre-element and an information change picture element just succeeding to the starting picture element on the decoding line when the third mode code is detected; and tenth circuitfor decoding a code indicative of a relative distance between the starting picture element and an information change picture element just succeeding to the starting picture element on 55 the decoding line when the second mode code is detected.

6. A transmission system according to claim 5, further comprising: eleventh circuit for detecting a first control signal from the coded facsimile signal; twelth circuit for detecting a second control signal from the coded facsimile signal; and 60 thirteenth circuitfor decoding the coded facsimile signal without reference to the information of 60 the reference scanning line; fourteenth circuit for detecting code errors.

7. A transmission system according to claim 5, further comprising: eleventh circuit for decoding a code indicative of a relative distance between the starting picture 65. element and a second information change picture element just succeeding to the first information 65 zle-- -44 Ar 19 1 GB 2 030 425 A 19 change picture element immediately after the starting picture element on the decoding scanning line when the second mode code is detected.

8. A transmission system according to claim 7, further comprising:

twelfth circuit for detecting the first control signal from the coded facsimile signal; thirteenth circuit for detecting the second control signal from the coded facsimile signal; fourteenth circuit for decoding the coded facsimile; signal without reference to the information of the reference scanning line; and fifteenth circuit for detecting code errors.

9. A transmission system for a facsimile signal, substantially as herein described with reference to any of Figs. 4A, 9, 12 and 14 of the accompanying drawings.

10. A transmission method for a facsimile signal, substantially as herein described with reference to any of Figs. 4A, 9, 12 and 14 of the accompanying drawings.

11. A transmission system for a facsimile signal substantially as herein described with reference to any of Figs. 5A, 1 OA, 13 and 15 of the accompanying drawings.

Printed for Her Majesty's Stationery Office by the Courier Press, Leamington Spa, 1980. Published by the Patent Office, Southampton Buildings, London, WC2A 1 AY, from which copies may be obtained.