GB2002553A - High speed, real-time computer emulator - Google Patents

High speed, real-time computer emulator

Info

Publication number
GB2002553A
GB2002553A GB7829017A GB7829017A GB2002553A GB 2002553 A GB2002553 A GB 2002553A GB 7829017 A GB7829017 A GB 7829017A GB 7829017 A GB7829017 A GB 7829017A GB 2002553 A GB2002553 A GB 2002553A
Authority
GB
United Kingdom
Prior art keywords
instruction data
logic unit
computer
arithmetic
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB7829017A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Guidance and Electronics Co Inc
Original Assignee
Itek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itek Corp filed Critical Itek Corp
Publication of GB2002553A publication Critical patent/GB2002553A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros

Abstract

A host digital microprogrammed computer employs a pipelined instruction data stream serial architecture including a source of instructions 114, an input instruction data bus 111, a mapping memory 117, a microprogram control memory 118, a pipeline register 124, and an arithmetic logic unit 108. A source of arithmetic data 106 is also coupled in parallel with the pipeline directly to the arithmetic logic unit 108, and an off board emulation logic unit 201 is inserted into the interrupted instruction data stream for translating the instruction data into a format compatible with the host digital processor. The delay of the emulation board logic is preferably less than one microcycle of the computer so that there is no speed penalty when using this arrangement to emulate the target computer. <IMAGE>
GB7829017A 1977-08-10 1978-07-06 High speed, real-time computer emulator Withdrawn GB2002553A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82336577A 1977-08-10 1977-08-10

Publications (1)

Publication Number Publication Date
GB2002553A true GB2002553A (en) 1979-02-21

Family

ID=25238546

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7829017A Withdrawn GB2002553A (en) 1977-08-10 1978-07-06 High speed, real-time computer emulator

Country Status (3)

Country Link
JP (1) JPS5430752A (en)
DE (1) DE2835110A1 (en)
GB (1) GB2002553A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0109567A2 (en) * 1982-10-22 1984-05-30 International Business Machines Corporation Accelerated instruction mapping external to source and target instruction streams for near realtime injection into the latter
EP0159699A2 (en) * 1984-04-23 1985-10-30 Nec Corporation A data processor executing microprograms according to a plurality of system architectures
EP0199173A2 (en) * 1985-04-08 1986-10-29 Hitachi, Ltd. Data processing system
GB2203572A (en) * 1987-03-24 1988-10-19 Insignia Solutions Limited Microprocessor emulation
US6813703B2 (en) * 2002-06-07 2004-11-02 Semiconductor Technology Academic Research Center Emulation system for data-driven processor

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5612746Y2 (en) * 1977-11-07 1981-03-24
DE3279905D1 (en) * 1981-04-13 1989-09-28 Texas Instruments Inc Microcomputer system
JPS6133546A (en) * 1984-07-25 1986-02-17 Nec Corp Information processor
JPH07109589B2 (en) * 1985-07-25 1995-11-22 日本電気株式会社 Instruction processing method
JPS62165242A (en) * 1986-01-17 1987-07-21 Toshiba Corp Processor
JPS6372019A (en) * 1986-09-12 1988-04-01 オムロン株式会社 Photoelectric switch
JPH02133746U (en) * 1990-03-19 1990-11-06

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0109567A2 (en) * 1982-10-22 1984-05-30 International Business Machines Corporation Accelerated instruction mapping external to source and target instruction streams for near realtime injection into the latter
EP0109567A3 (en) * 1982-10-22 1984-08-22 International Business Machines Corporation Accelerated instruction mapping external to source and target instruction streams for near realtime injection into the latter
EP0159699A2 (en) * 1984-04-23 1985-10-30 Nec Corporation A data processor executing microprograms according to a plurality of system architectures
EP0159699A3 (en) * 1984-04-23 1988-09-28 Nec Corporation A data processor executing microprograms according to a plurality of system architectures
EP0199173A2 (en) * 1985-04-08 1986-10-29 Hitachi, Ltd. Data processing system
EP0199173A3 (en) * 1985-04-08 1989-10-25 Hitachi, Ltd. Data processing system
GB2203572A (en) * 1987-03-24 1988-10-19 Insignia Solutions Limited Microprocessor emulation
GB2203572B (en) * 1987-03-24 1991-11-27 Insignia Solutions Limited Improvements in data processing means
US6813703B2 (en) * 2002-06-07 2004-11-02 Semiconductor Technology Academic Research Center Emulation system for data-driven processor

Also Published As

Publication number Publication date
JPS5430752A (en) 1979-03-07
DE2835110A1 (en) 1979-02-22

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)