GB1593423A - Digital transmission system - Google Patents

Description

(54) DIGITAL TRANSMISSION SYSTEM (71) We, TÉLÉDIFFUSION DE FRANCE and L'ETAT FRANCIS, both French Public Establishments, of 21-27 rue Barbers - 92120 Montrouge, France and 38-40 rue du Général Leclerc - 92131 Issy- Les Moulineaux, France, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The present invention relates to a system for digitally transmitting and displaying selected items of data on a television receiver screen. In short, such a system will be called a "teletext" system in the following. The invention also relates to a teletext system receiver.

The growing importance of information communication has resulted in the building of data banks in such a manner that such data banks are usable in developing information processing technics and audiovisual means. Updating files wherein data are stored makes those systems efficient, but the cost of the information supports presently limits the present field of utilization thereof. A teletext system makes it possible to broadcast those data from central processing stations wherein data issue is also made. Such a centralized structure is similar to that of newspaper structures and radio broadcasting is close to newspaper and periodical distribution.

In fact a teletext system involves several aspects, its main goal being to achieve the broadest possible broadcasting of stored data through RF channels. At the reception end, the major means is the television receiver display screen. It displays pages of a text or graphics which are transmitted in an encoded form as for example described in the French Patent Application published under 2,313,825.

But a teletext service may also be transmitted through the public or a private telephone network through which a teletext subscriber calls a data bank comprising a memory serving as a file for information arranged in pages. By means of a key board used by the subscriber to select a page, the subscriber can answer questions from the file processing unit and the pages he desires are sent to him.

In television broadcasting, the waiting time for a desired page depends on the transmission capacity which the teletext system disposes of as well as the number of pages in the file or magazine. The transmission capacity may considerably vary according as a full television channel is alloted to the teletext system or only some blank lines. By way of an example, with a magazine containing about fifty pages and a transmission capacity of one line per frame, the mean waiting time is of about fifteen seconds.

In the case of a transmission through a telephone network, the central unit answers very rapidly, but the data transmission is performed at a low rate due to the narrow frequency band width available and may have a duration of several tens of seconds.

Whatever is the utilized transmission medium, a teletext system first implies the selection of a page of information among a plurality of available pages, the transmission of the selected page or pages, and, finally, the display of the selected page on a television screen.

On that screen, the pictures constituted by the written page or the graphics have no half-tints. The utilization of a television receiver that can in addition receive standardized television programs imposes certain constraints resulting from the television tube resolution, i.e. about 25 rows of 40 characters each, but on the contrary makes possible in using a set of 8 colours, for instance, to obtain very clear page setting. The used alphabets depend on how characters are written in the country wherein the teletext system is utilized.

In France a proposed system comprises a Latin alphabet of 126 signs which permits to extend the system to the most of the languages utilizing a Latin alphabet.

By way of example of a teletext system, reference may be made to the technical article entitled "Broadcast data in television" by A.J. Biggs and B.S. Barnaby published in the English technical review "GEC Journal of Science and Technology", vol. 41, No. 4, p.117-124, 1974, and to the British Patent 1,467,240. Reference may also be made to the technical article entitled "ANTIOPE, service de teletext" by B. Marti and M. Mauduit, published in the French technical review "radiodiffusion television", 9th year, No. 40, November-December 1975, 5/5, p.18-23. In the last mentioned article, the features of the previously described system are indicated. Furthermore in the described service pages are assembled in various magazines, each magazine being cyclically broadcast in full. Each page is identified by its page number. Some of those pages contain summaries and appear to help the selection of the desired page by means of a keyboard. Among the special functions that a teletext system may fulfill, one would cite the insertion of a text in a television picture under the form of a caption in a language selected by the television subscriber. Such captions may either be rigidly associated to the picture or relate to short news regarding a predetermined subject matter; they may be written in a rectangular box cut-out of a current picture or dispcnser at subscriber's will. Features of this type are obviously also of interest for educational programs.

According to one aspect of this invention, there is provided a teletext system for digitally transmitting text material and displaying received text material on a television screen, the digital transmission being in the form of data packs, wherein successive data packs may relate to different services, each of the data packs including signals constituting a magazine of several pages, and the data for each page beginning with page flag information followed by page number information and ending with the next page flag information, the system comprising at a receiver a keyboard for identifying a desired page, a comparator circuit responsive to page flag and number information for detecting the desired page responsive to operation of the keyboard. a memory responsive to the comparator circuit for storing data relative to the desired page, and a character generator for displaying the desired page on a television screen responsive to the data stored in the memory.

According to another aspect of the invention there is provided a receiver for use in a teletext system in which text material is transmitted in digital form and displayed on a television screen, signals representing the text material being transmitted in the form of data packs, the data packs being constituted by the sequential transmission of eight-bit words comprising page flags followed by page numbers and row flags followed by row numbers, escape eight-bit words followed by type-identity eight-bit words, which are followed by a sequence of coded words identifying characters which are to be displayed in type which is determined by the preceding type-identity words, said receiver comprising a keyboard, a comparator, a first random access memory for storing the coded character words at certain addresses, a second random access memory for storing the type-identity words at the same certain addresses as the addresses of corresponding character words stored in the first random access memory character generator means for reading the words stored in the first random access memory and at the same time the words stored in the second random access memory according to a signal from the keyboard to the comparator, the comparator recognising a page flag signal at the beginning and at the end of a page, thereby simultaneously selecting a character and a type identity, and a permanent memory in the character generator means responsive to the read out of said second random access memory for determining the shape of the characters read out from the first random access memory.

In one embodiment of the invention the character generator delivers the character luminance signals to a matching circuit, and in addition logic pulses each concerning the presence or the absence of a basic color R (red), V (green) or B (blue), the said matching, circuit transferring the luminance signal to conventional circuits of the television receiver, the said matching circuit comprising associated with each basic color logic input a first diode whose anode is connected to the input of an analog amplifier whose output is connected to the corresponding chrominance television tube input, the anode of the first diode being, in addition, connected to the anodes of a second and a third diode, the first diode cathode being connected from the associated color input and the output of a first voltage generator delivering a voltage v2, the second diode cathode being connected from the output of a second voltage generator delivering a voltage vl, and the third diode cathode being connected from the output of a third voltage generator delivering a voltage v3, the third generator output being in addition connected to the output of a gate whose output is not grounded when the three color inputs together receive logic pulses and grounded in any other casc, with v3 > v2 > vl. the values of vl, v2 and v3 being selected appropriately.

In another embodiment of the invention there is a combination of an arrangement of the transmitted signals and means at the data receiver for making it possible to vary the appearance of texts displayed on a television screen so as to break off the monotony of the current display appearance. For instance, by variations affecting the character color, and background color, by flashing certain characters on and off, and by changes in character height and/or width.

It is to be remembered that a character generator for displaying characters on a television receiver cathode ray tube screen comprises a permanent memory associated to a random access memory. The permanent memory stores the shape information for every character which can be displayed. The random access memory stores the character codes, including the spacings or blanks between words forming the text to be displayed. In the random access memory the character codes are stored at addresses which correspond to the geographic positions of the associated characters in the page to be displayed. The display operation consists in a sequential read-out of the rows of character codes from the random access memory, each read operation for a character causing in a known manner the scanning read out of the character shape of the character corresponding to the read character code, from the permanent memory. Should a character occupy ten television scanning lines, each read operation for a row of character codes from the random access memory results in ten successive scannings of the character shapes from the permanent memory. Obviously scannings are controlled by clocks which are controlled from the display tube line synchronization. The signals resulting from the scanning of the shape of a character are parallel delivered, then converted into serial mode through a shift register wherein the shift signal frequency is controlled by a clock that is controlled from the display tube line sync. The output of the shift register is sampled at another frequency controlled by another clock and the shift register output signal is transmitted toward the tube as a luminance signal.

Furthermore in character transmission systems wherein each character is represented by an octet, i.e. an eight-bit word, the so-called ASCII code is currently in use. Among the eight bits of a word, one bit is normally assigned to parity check. The 7 other bits provide 128 character possibilities. Among those 128 possibilities some are assigned to character codes and other ones to function codes. In addition, a so-called escape eight-bit word makes it possible in practice to double those possibilities in currently changing the meaning of codes following an escape word.

In a further embodiment of the present invention the displayed characters are of various types and are different each from the other in the shape, color, size, background, and so on each type of displayed character being identified by means of one of several eight-bit words corresponding to the character type identity.

Embodiments of the present invention, will now be described, by way of example, with reference to the accompanying drawings, wherein: Figure 1 is a block diagram of a teletext transmitter according to this invention, Figure 2 is a block diagram of a teletext receiver according to this invention, Figure 3 is a schematic diagram of a matching circuit for matching the voltage/light characteristics utilized in the receiver shown in Figure 2, Figure 4 illustrates waveforms of signals used in the matching circuit shown in Figure 3, Figure 5 is a block diagram of memory circuits and character generator usable according to this invention in the teletext receiver shown in Figure 2, and Figure 6 is a schematic diagram of a mixer circuit utilized in the receiver shown in Figure 5.

The assembly shown in Figure 1 is similar to that shown in Figure 1 of the description of the already mentioned French Patent Application No. 2,313,825. To a modulator circuit 1 and a transmission antenna 2 there are switchably connected a number of data sources, such as the data source shown which comprises a data processing circuit 3, connected to a number of control sets 4.1-4.n. Data processing circuit 3 includes a shaping circuit 5, and a memory 6 whose input is connected to the output of circuit 5 and whose broadcast output may selectively be connected to modulator circuitry 1 while its control output is connected to the input of a conversion circuit 7. Each control set 4.1-4.n. includes, as shown at 4.1, a monitor screen 8 and a composing typewriter 9. Each typewriter 9 has a data output connected to the input of the circuit 5 and a data input connected to the output of the circuit 7.

Each control set 4.1-4.n allows a journalist or other operator to compose pages by means of the typewriter 9 while checking on the monitor screen 8 every characteristic of the final color picture, i.e. the character size, flashings on and off and graphic particularities. Each typewriter 9 is similar to a typing machine and includes logic circuitry for composing and updating the documents. Output data from sets 4.1-4.n are put, in accordance with given standards, in circuit 5, then stored in the memory 6. Memory 6 may be a disk memory wherein there are stored the sequences of codes to be transmitted corresponding to the language determined in the above mentioned French technical article. Thus memory 6 constitutes a file of pages that are periodically read out and transmitted to the modulator circuitry ] to be broadcast. An operator controlling a set 4.1-4.n can also have displayed on his control screen 8 a selected page read out from memory 6 through circuit 7.

Embodimcnts of the equipment shown in Figure 1 are known. They can either be embodied in a wired logic form or in a programmed form controlled from a computer.

The assumption may be made that, as in the already mentioned French Patent Application No. 2,3]3,825, a data broadcast is made on a television channel in the idle lines of the television picture. Those data are assembled in data packs including up to 32 eight-bit words or octets. To each data pack there is assigned a prefix indicating the data source address and the number of words contained in the concerned data pack. When the length of data to be transmitted comprises more than 32 eight-bit words, it is shared among several data packs and the prefix contains the pack number in addition to other information.

Within the prefix also included are 2 eight-bit words for synchronizing the receiver terminal local oscillator and another eight-bit word for synchronizing the said eight-bit words in each data pack. Thus a full transmitted data pack includes 40 8-bit words wherein each of the 320 bits represents a black when the bit value is 0 and white when it is 1. Possible interference between these digital signals and the proper video signal is reduced by selecting a repetition frequency that is an odd multiple of the line frequency. There are 397 periods in a line which results in a bit frequency of 6.20 MHz, with a non-return-to-zero modulation.

As described in the already mentioned French Patent Application No. 2,313,825, a computer used as an electronic control unit knows the list of the idle lines in a picture signal and inserts into those lines the data packs it receives from the various teletext editors, similar to that shown in Figure 1. Connections from the various memories 6 and modulator circuitry l are preferably constituted of links, such as the link described in the French patent 2,268,308 entitled "Standardized communication interface device". Such a link makes it possible to slow down the data flow of a data source constituted by a data memory, when the broadcast system is blocked. When using a broadcasting network, it is not possible to control directly the output data flow from a source derived from the receiver input capacity; to overcome this lack of feedback control. a simulated receiver, similar to the slowest receiver, is provided in the control unit. When using other transmission media the said link provides the functions needed for a correct transmission of the digital signals.

Reception terminal shown in Figure 2 is designed to supplement a conventional television receiver and is used to demodulate the data signals transmitted from the station shown in Figure 1, to reshape them, then to write them into a store so that it is possible to restore a visible page on the associated television receiver screen. Reception terminal may be a separate unit associated to a conventional television receiver or a portion integrated in an accordingly designed television receiver.

The receive terminal shown in Figure 2 comprises, like a conventional television receiver, a reccption-demodulation circuit 10 delivering, on the one hand, audio signals to a loud-speaker 11 and, on the other hand, video signals to a color decoder and scanning generator 12. Color signals Bl (blue), V1 (green) and Rl (red) as well as luminance signal from the generator 12 are not transmitted, contrary to what occurs in a conventional television receiver, directly to tube 13, but through a video switch 14 that has still another function as will be hereinafter described.

Furthermore the receive terminal shown in Figure 2 comprises a circuit 15 separating data from the video signal, the input of the circuit 15 being connected to the video output of the circuit 10 and output of the circuit 15 being connected to a first selection block 16, similar to that of the terminal equipment described in the already mentioned French Patent Application 2,313,825. The output of block 16 is connected through an above-mentioned link J to a page selection block and a data decoder 17, whose output is connected to the input of a page memory 18. A viewer keyboard 19 has its outputs suitably connected to control inputs of selection block 16 and decoder 17. The output of memory 18 is connected to the input of a character generator 20. Signal outputs of character generator 20 are connected to color inputs R2 (red), V2 (green) and B2 (blue) of the video switch 14 as well as to a luminance input thereof. A control output of the keyboard 19 is also connected to a control input of the video switch 14.

In the circuit 15, a stable oscillator, not shown, generates a clock signal at 6.20 MHz, as mentioned above. When, after the detection of a line synchronization pulse, a video signal transmitted from circuit l() presents a sequence of alternative white and black points at that clock frequency, the said oscillator is phase locked with the received pulses. The oscillator output is then used as a clock for the received bits. Thus that oscillator is utilized to correctly separate the video data signal from a current television video program signal.

Received bits are processed as eight-bit words in circuit 15 and service information, such as channel number and subscription period, are taken therein into account to make only the desired channel or magazine valid. All the circuitry performing such a process are described in the already mentioned French Patent Application 7518319 (No. 2,313,825), and particularly regarding the validation of the desired channel described in Figure 6 thereof.

Assuming the validation is positive, received bits are sent to block 17 through link J. In practice, in the embodiment described, a channel of a system described in the already mentioned French Patent Application No. 2,313,825 is equivalent to a magazine. It is known that the various channels of such a system are time multiplexed; so it is for the various magazines. As a result link J transmits the data contents of a magazine serially per groups of 8-bit words, but with intervals between those groups due to two reasons, the first one of which results from the time multiplexed broadcasting mode of the magazines and the other one results from the transmission mode through link J, the transmission through J from 16 to 17 being only possible when block 17 is ready to receive data. Thus transmission link J is performed in an asynchronous manner.

In block 17 a first operation is to select the desired page through the magazine. Indeed, as described in the already mentioned French technical article, a magazine is composed of several pages with particularly a first page indicating the magazine summary. In the magazine the pages are naturally ordered according to increasing numerals. It is also to be noted that in the broadcast of a magazine the pages thereof are not time multiplexed, i.e.

page data are preceded by a 8-bit word representing a page flag, followed by the page number, and are followed by another 8-bit word representing another page flag followed by the next page number. As a result, in block 17 there is performed the detection of each page flag, then each time a recognition is positive the comparison of the immediately following page number 8-bit word with the page number indicated by the keyboard 19. When the result of the comparison is negative, the already received 8-bit words and the following ones are destroyed up to the detection of the next page flag. When the result of the comparison is positive, the 8-words received up to the detection of the next page flag are transmitted to memory 18, after having been processed as follows. In each page the characters are ordered in rows. In the sequence of data 8-bit words, each row is preceded by a row flag followed by an 8-bit word indicating the height of the following row in the page. The row number 8-bit word is used to determine one of the addresses of the characters to be stored in the memory 18. The other address is determined by the position of the character 8-bit word in the sequence of character 8-bit words constituting a row, including blanks between characters.

It must be noted that the sequence of 8-bit words constituting a row includes, in addition to the proper character words, some 8-bit words indicating character particulars, such as the color. These function 8-bit words are also stored in the memory 18 at the address of the characters they characterise.

Thus, for obtaining the page that he requires, a magazine viewer first keys the required number on the keyboard 19 for consulting the magazine summary. From the above it will be understood that this results in the summary page being selected in block 17. Then the viewer composes on keyboard 19 the number of the page he wishes to read.

It will be noted that the data stored in the memory 18 provide an electronic geographic representation of the characters in the corresponding page. These data are read out to the character generator 20 using a time basis provided in such a manner as to make it possible for the memory 18 to be read completely in a television frame period. Character generator 20 receives each character 8-bit word read out from the memory 18 and builds the corresponding letter shape from a video signal having two conditions, one condition being black and the other white. In addition, it receives the associated function 8-bit word indicating for instance the color and delivers the corresponding logic signals R2, V2 and B2.

To make clearer how signals deliyered from generator 20 are displayed on screen 13, video switch 14 will now be described in detail in conjunction with Figure 3. Video switch 14 makes possible, on the one hand, control of the switching of logic and analog signals to be displayed on tube screen 13, either corresponding to a text picture from 20, or a current television picture from 12 either animated or not, and, on the other hand, to determine the character color selected among 8 shades, i.e. for instance, red, green, blue, yellow, magenta, cyan, white and black.

Video switch 14 also performs an adaptation of the voltage/light characteristics of the tube to the control of the synthesized signals. Such an adaptation is currently performed in the transmission station, when broadcasting pictures, being then known as the gammacorrection. But with synthesized pictures wherein signals have a logic nature, no gamma-correction can be made at the transmission station. Accordingly, according to the present invention, there is provided means for receiving the signals delivered from memory 18 and for adapting the corresponding voltages to suitable values needed for the control of the display tube.

For that purpose, video switch 14, shown in Figure 3, has two sets of color signals inputs, i.e. on the one hand, R1, V1 and B1, and, on the other hand, R2, V2 and B2. Furthermore, a luminance input 21 is connected from the associated output of 20 while another luminance input 22 is connected from the associated output of 12. Inputs 21 and 22 are respectively connected to inputs of amplifiers 23 and 24. Each amplifier 23 or 24 has a gain equal to 1 with a high input impedance and a low output impedance so as to be a voltage source.

Signals delivered from 23 and 24 are respectively adjusted by diodes 25 and 26 supplied by a stable voltage generator 27. Transfer time constants for these input signals are determined by capacitors 28 and 29 according to the input impedances of the amplifiers 30 and 31.

Depending on the position of a switch 32 controlled by a control signal from the keyboard 19, via input 33, either a signal from amplifier 30 or a signal from amplifier 31, respectively corresponding to either signal applied to 21 or signal applied to 22, is transmitted, via output 34, to the luminance input of tube 13.

The inputs Bl, Vl and Rl are respectively connected to the associated inputs of a chrominance switch 35, through amplifiers 36B, 36Vand 36R which operate as voltage sources, like amplifiers 23 and 24. A chrominance switch 35 is also controlled by the control input 33. The inputs B2, V2 and R2 are respectively connected to the inputs of logic signal amplifiers or inverters 37B, 37V and 37R. The outputs of inverters 37B, 37V and 37R are respectively connected, on the one hand, to the inputs of a logic operator 38 and, on the other hand, to the inputs of logic signal amplifiers 39B, 39V and 39R. The output of amplifier 39B is connected to the cathode of a diode 40B whose anode is connected, first, to the anode of a diode 41B, second, to the anode of a diode 42B and, finally, to the input of an amplifier 4313, operating as a voltage source, through a resistor 44B. Outputs of amplifiers 39V and 39B are also respectively connected to similar sets of diodes 40V, 41V and 42V, and 4()R, 41R and 42R. The anode of diode 40V is connected to the input of a voltage source amplifier 43V, via a resistor 44V, while the anode of diode 40R is connected to the input of a voltage source amplifier 43R, via a resistor 44R. Furthermore the cathodes of diodes 40B, 40V and 40R are parallel connected from the output of an adustable voltage generator 45, through adjustable resistors 46B, 46V and 46R respectively. The cathodes of diodes 41B, 41V and 41R are parallel connected from the output of another adjustable voltage generator 47. The cathodes of diodes 42B, 42V and 42R are parallel connected from the output of a last adjustable voltage generator 48 through a resistor 49, on the one hand, and from the output of logic operator 38. on the other hand. The outputs of amplifiers 43B, 43V and 43R are respectively connected, as outputs of 36B, 36V and 36R, to associated inputs of switch 35. Depending on the condition of the control wire 33 from the keyboard 19, the switch 35 delivers from outputs 5(113, 50V and 50R to the tube 13, either signals from the amplifiers 43, or from the amplifiers 36. Resistances, 44R, 44V and 44B are adjustable resistors serving to correct diode characteristic variations.

Now wit and voltage v2 from point C are transmitted to tube 13 which displays a blue spot.

Between times tl and t2, or between times t2 and t3, the output of operator 38 is still grounded. The diodes 40R, 40V and 40B are off. Only the three diodes 41R, 41V and 41B are on. The voltage v1 is applied to all the junction points A, B and C. A black spot appears on the screen.

It will be understood from the above that the switch circuit 14 provides a good flexibility in adjusting the colors. Particularly, white is defined by adjusting the voltage v3 from the generator 48, black is defined by adjusting the voltage v1 from the generator 47, and the basic colors R, G and B are defined by adjusting the generator 45 and the resistors 46R, 46V and 46B.

It would obviously be possible, instead of using a logic operator 38, to utilize several such operators, each being associated to an adjustable voltage generator, so as to permit the adaptation of the luminance of the various shades according to user's wishes.

It is to be noted that the link J is preferably of the type described in French Patent No.

2,268,308. Such a link makes possible an asynchronous operation from selection block 16 to decoder 17. Furthermore, as an alternative, the input of the link J may be connected from a wired teletext distribution network, for instance, utilizing tbe public telephone network.

In an embodiment of this invention which will now be described in detail, the memory block 18 and the character generator 20 are designed as shown in Figure 5. In practice the memory 18 comprises two random access memories (RAM) 51 and 52, as well as a switching circuit 53 and a buffer memory 54. The input of the switching circuit 53 is connected, via a line 55, from the output of circuit 17, Figure 2, that delivers the character 8-bit words and the row function 8-bit words. Row addressing inputs in the memories 51 and 52 are parallel connected, via line 56, from the output of the circuit 17 which delivers the row numbers. The switching circuit 53 has an output 57 which is connected to the data input of memory 51 and an output 58 which is connected to the input of the buffer memory 54. The output of the buffer memory 54 is connected to the data input of the memory 52.

Data for application to the input of switching circuit 53, via line 55, may be grouped in the following families: first, in the simplest case, an alphanumeric character 8-bit word, then an escape 8-bit word plus either a character 8-bit word or a conventional function 8-bit word, and finally an escape 8-bit word plus a character type identity 8-bit word. The switching circuit 53 includes detection means for recognizing third family data - escape 8-bit word plus character type identity 8-bit word -, those means being possibly simple comparators, and making it possible to send them to output 58 while first and second firmly data are sent to output 57.

By way of example, some types of identity 8-bit words will now be illustrated. An 8-bit word F1 may be provided wherein the five first bits carry, when they are in the 1-condition, the following information, but, when they are in the 0-condition, no information.

1st bit 2nd bit 3rd bit 4th bit 5th bit 6th bit 7th bit 8th bit Red Green Blue Graphic 1 0 0 X Thus, with a 8-bit word 1000100X, it indicates that the sequence of the characters following it must be displayed in red on the tube screen. By way of example, with a 8-bit word 0110100X, it indicates that the sequence must be displayed in cyan. When the 5th bit is 1, it indicates that the 8-bit word is a word F1; when 6th and 7th bits are 0, switching circuit 53 can detect the function 8-bit words, the meaning of the 4th bit will be described in the following, the 8th bit is a parity bit.

In the same manner, a 8-bit word F2 may be provided wherein the bits have the following meanings.

1st bit 2nd bit 3rd bit 4th bit 5th bit 6th bit 7th bit 8th bit Height Width Ground Flashing 0 0 0 X When the 1st bit is 1, it indicates that the character height is to be doubled; when the 2nd bit is 1, it indicates that the character width is to be doubled; when the 3rd bit is 1, it indicates that the ground onto which the character is to be displayed must have its color reversed; when the 4th bit is 1, it indicates that the character must be flashed on and off.

Thus, with a 8-bit word 110100X, it indicates that height and width of the characters must be doubled and they must be flashed on and off. The 5th bit being 0 indicates that the 8-bit word is a word F2.

Now it is possible to understand that, when in the sequence of 8-bit words applied from line 55 to switching circuit 53, there is the following series: 0 Fl 0 F1 a b c ..., switching circuit 53 will write the four words 0 Fl 0 Fl into memory 54, then words a b c . into memory 51. Writing of first character word n into memory 51 which is detected in circuit 59 initiates writing at the same address into memory 52 of words F1 and F2 from memory 54 (words 0 being not transmitted from memory 54 to memory 52). Circuit 59 is connected by control line 6() to memory 54. Buffer memory 54 is connected to RAM memory 52 by line 61.

Read out from memory 54 to memory 52 does not alter the contents of memory 54. Thus, when writing b into memory 51, F1 and F2 are written at the same address as b into memory 52. As a conclusion at corresponding addresses character words are written into memory 51 and type identity words are written into memory 52. The contents of memory 54 are erased at the next writing into buffer memory 54 of an escape word followed by an identity word.

In addition to function words F1 and F2, other function words may also be provided, as for instance F3 making it possible to change from a character shape to another character type, taken together the 5th and 7th bits then indicate an identity word which is detected in switching circuit 53, the 6th bit being 0 and the 8th bit being still a parity bit.

The character generator 20, shown in Figure 5, comprises four permanent memories 62-65, a switch 66, a mixing circuit 67 and a monostable circuit 68. Each permanent memory 62-65 is associated respectively with a shift register 69-72 designed for delivering serially the bits conventionally read in parallel from a character generator permanent memory. It is to be remembered that the scanning of character shape is performed in memories 62-65 line per line, each basically corresponding to a television picture line. A clock 73 is also provided which controls read operations from memories in accordance with television picture line synchronization signals. In Figure 5, some inputs S are also indicated which mean that television line synchronization signals are also used for reading the concerned memories or controlling repetitive operations: however, to simplify the drawing, all the inputs S are not indicated.

Switch 66 is provided for selecting one of the registers 69-72 that is to be connected to its output 74 connected to mixing circuit 67; it also determines the read-out operation rate, or in other words the sampling rate of register outputs.

The read-out output of RAM memory 51 is parallel connected to read-out address inputs of permanent memories 62-65. Parallel read-out outputs of memories 62-65 are respectively connected to parallel inputs of registers 69-72.

The rcad-out output of RAM memory 52 has as many wires as significant bits in function words Fl, F2 and F3. Thus these are indicated wires R,G, B respectively corresponding to the first 3 bits of Fl, wire H corresponding to the first bit of F2, wire L corresponding to the second bit of F2, wire F corresponding to the third bit of F2 and wire C corresponding to the fourth bit of F2. In addition, there is provided a line M comprising four wires corresponding to the significant bits of F3, which are in the described example assumed to be two bits since four permanent memories are provided.

Wire H is connected to a control input of the clock 73. When H is low, the clock 73 operates at a normal rate, i.e. for each picture line RAM memory 51 is read as well as a character shape line in the permanent memories 62-65, that line corresponding to the address read out from 51. When H is high, the clock rate of clock 73 is divided by two. As the clock 73 designates, after counting. the address of the line to be read in the character shapcs of the permanent memories. when H is high, each character shape line is successively read twice at the picture line frequency. Thus the height of the displayed character occupics twice as many lines on the tube screen. its height is doubled.

Wire L indeed includes two wires, one Ll controlling the bit shift rate in registers 69-72, the other L2 controlling the horizontal address progress rate in RAM memory 51, via input L2. Obviously these two rates are also rclated to the television picture line synchronization.

When wire L is low, the shift rate and the sampling rate are normal. When wire L is high, the shift rate and the sampling rate are both divided by two so that the same bit stays twice as long in the output cell of each shift register and therefore can be sampled twice. Thus infonnation relating to a character point can be sent twice to the display tube in the picture line. Accordingly the width is doubled. As a character then occupies a wider place in the displayed row, it is necessary, through input L2, to reduce by two the progress of the character words in the corresponding row in memory 51.

The four wires of line M make possible the selection of the permanent memory whose output is utilized among the memories 62-65. Indeed at each read-out operation from the memory 51, the foul memories 62-65 are read-out in parallel. However, the switch 66 allows only one connection with the circuit 67. With four permanent memories wherein there are respectively stored four alphabets it appears that two bits of words F3 permit in a simple manner the language to be changed depending on the texts to be displayed.

When wire C is low, the monostable circuit 68 is at rest, when the wire C is high, the monostable circuit is triggered on. The monostahle circuit rate may be of about about 1 Hz and is used as described hereabove for flashing characters on and off.

Reference will now be made to Figure 6 for describing the purposes of wires R, V (or G), B and F. In Figure 6, there are still shown the wire 74 connecting the output of the switch 66 to the circuit 67, as well as the output wire 75 from the monostable circuit 68. First it is to be remembered that the wire 74 carries digital signals relating to the luminance information.

Thus, with each character shape line scanning in a permanent memory, after the parallel-serial conversion in the corresponding shift register, the signal transmitted by 74 is shaped as indicated by the wave form 1, Figure 6. When signal I is high, a spot is lit on the tube, when signal I is low, the background does not light. The wire 74 is connected to the input of a switchable inverter circuit 76 whose output is connected to a switch 77. The signal output of the switch 77 is connected, on the one hand, to the output 21 through a shaping circuit 78 and, on the other hand, in parallel to first inputs of three AND gates 79, 80 and 81. A second input of gate 79 is connected to wire R, a second input of gate 80 is connected to wire R (or G), and a second input of gate 81 is connected to wire B. The output of gate 79 is connected to wire R2 through a shaping circuit 82, the output of the gate 80 is connected to the wire V2 through a shaping circuit 83, and the output of the gate 81 is connected to the wire B2 through a shaping circuit 84. The control input of the switchable inverter circuit 76 is connected to the wire F while the control input of the switch 77 is connected to the wire 75.

Assuming that the wires F and 75 are at rest in the 0-condition or low, the signal 1 from wire 74 is applied without change to the circuit 78 and the gates 79-81. From the output 21 of circuit 78, the output signal is processed in the switching circuit 14, Figure 2, shown in detail in Figure 3. In addition assuming that the wire R (or G) is in the 1-condition or high, conditions 1 of signal 1 are transmitted through gate 79 and applied to shaping circuit 82 before being processed in switching circuit 14, Figure 2. Thus it appears that the red chrominance signal is similar to the luminance signal that causes the character to be displayed in red. When wires R and V (or G) are high, conditions 1 of I are transmitted and wires R2 and V2 become high, the color mix being performed in the tube after processing in switching circuit 14. The result is thus obtained that characters may be displayed in white or as one of six predetermined colors by using the first three bits of the word F1.

When the wire F is in the 1-eondition or high, the output signal from 76 is reversed with respect to 1, i.e. 1. Such an output signal is still processed in gates 79-81, as signal l, but contrary to the previous described case, only the parts outside of the characters corresponding to conditions 0 of 1 appear displayed in color.

When the wire 75 is periodically turned to the 1-condition, the transmission of signal l is interrupted through the circuit 77 during these 1-conditions. As a result the luminance signal is accordingly interrupted, which causes the character to flash on and off on the display.

The shaping circuit 78 is also utilized for adding the digital synchronization signal to the luminance signal, as indicated by S.

Also to be noted that, with no type-identity information, the outputs RVB of memory 52 are high or in the 1-condition, so as to display white characters on a black background.

Read-out operations are obviously performed at the same time in the RAM memories 51 and 52 so as to read characters from permanent memories at the same time as the conditions of the output wires of memory 52 are controlled by identity bits in words F1, F2 and F3.

With respect to the bit corresponding to a Graphic in word F1, it must be understood that there is provided, for instance close to the permanent memory 62, a wired memory wherein there are stored six-point rectangles making it possible, by displaying them side by side, for graphics to be produced on the screen. In practice, the output of the RAM memory 52 has a wire corresponding to the 4th bit of F1, which permits the wired memory to be selected instead of the memory 62 in a similar manner to the selection controlled by the wire M.

Graphic rectangle codes are provided in the ACSII code.

In an alternative method of operation of the teletext system according to this invention, it is preferred to begin each row with a type identity word, the character type being possibly changed within the row, but returning to the initial type at the end of each row. Thus the display is resynchronized at the beginning of each row.

WHAT WE CLAIM IS: 1. A teletext system for digitally transmitting text material and displaying received text material on a television screen, the digital transmission being in the form of data packs, wherein successive data packs may relate to different services, each of the data packs including signals constituting a magazine of several pages, and the data for each page beginning with page flag information followed by page number information and ending with the next page flag information, the system comprising at a receiver a keyboard for identifying a desired page, a comparator circuit responsive to page flag and number information for detecting the desired page responsive to operation of the keyboard, a

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (11)

**WARNING** start of CLMS field may overlap end of DESC **. and is used as described hereabove for flashing characters on and off. Reference will now be made to Figure 6 for describing the purposes of wires R, V (or G), B and F. In Figure 6, there are still shown the wire 74 connecting the output of the switch 66 to the circuit 67, as well as the output wire 75 from the monostable circuit 68. First it is to be remembered that the wire 74 carries digital signals relating to the luminance information. Thus, with each character shape line scanning in a permanent memory, after the parallel-serial conversion in the corresponding shift register, the signal transmitted by 74 is shaped as indicated by the wave form 1, Figure 6. When signal I is high, a spot is lit on the tube, when signal I is low, the background does not light. The wire 74 is connected to the input of a switchable inverter circuit 76 whose output is connected to a switch 77. The signal output of the switch 77 is connected, on the one hand, to the output 21 through a shaping circuit 78 and, on the other hand, in parallel to first inputs of three AND gates 79, 80 and 81. A second input of gate 79 is connected to wire R, a second input of gate 80 is connected to wire R (or G), and a second input of gate 81 is connected to wire B. The output of gate 79 is connected to wire R2 through a shaping circuit 82, the output of the gate 80 is connected to the wire V2 through a shaping circuit 83, and the output of the gate 81 is connected to the wire B2 through a shaping circuit 84. The control input of the switchable inverter circuit 76 is connected to the wire F while the control input of the switch 77 is connected to the wire 75. Assuming that the wires F and 75 are at rest in the 0-condition or low, the signal 1 from wire 74 is applied without change to the circuit 78 and the gates 79-81. From the output 21 of circuit 78, the output signal is processed in the switching circuit 14, Figure 2, shown in detail in Figure 3. In addition assuming that the wire R (or G) is in the 1-condition or high, conditions 1 of signal 1 are transmitted through gate 79 and applied to shaping circuit 82 before being processed in switching circuit 14, Figure 2. Thus it appears that the red chrominance signal is similar to the luminance signal that causes the character to be displayed in red. When wires R and V (or G) are high, conditions 1 of I are transmitted and wires R2 and V2 become high, the color mix being performed in the tube after processing in switching circuit 14. The result is thus obtained that characters may be displayed in white or as one of six predetermined colors by using the first three bits of the word F1. When the wire F is in the 1-eondition or high, the output signal from 76 is reversed with respect to 1, i.e. 1. Such an output signal is still processed in gates 79-81, as signal l, but contrary to the previous described case, only the parts outside of the characters corresponding to conditions 0 of 1 appear displayed in color. When the wire 75 is periodically turned to the 1-condition, the transmission of signal l is interrupted through the circuit 77 during these 1-conditions. As a result the luminance signal is accordingly interrupted, which causes the character to flash on and off on the display. The shaping circuit 78 is also utilized for adding the digital synchronization signal to the luminance signal, as indicated by S. Also to be noted that, with no type-identity information, the outputs RVB of memory 52 are high or in the 1-condition, so as to display white characters on a black background. Read-out operations are obviously performed at the same time in the RAM memories 51 and 52 so as to read characters from permanent memories at the same time as the conditions of the output wires of memory 52 are controlled by identity bits in words F1, F2 and F3. With respect to the bit corresponding to a Graphic in word F1, it must be understood that there is provided, for instance close to the permanent memory 62, a wired memory wherein there are stored six-point rectangles making it possible, by displaying them side by side, for graphics to be produced on the screen. In practice, the output of the RAM memory 52 has a wire corresponding to the 4th bit of F1, which permits the wired memory to be selected instead of the memory 62 in a similar manner to the selection controlled by the wire M. Graphic rectangle codes are provided in the ACSII code. In an alternative method of operation of the teletext system according to this invention, it is preferred to begin each row with a type identity word, the character type being possibly changed within the row, but returning to the initial type at the end of each row. Thus the display is resynchronized at the beginning of each row. WHAT WE CLAIM IS:

1. A teletext system for digitally transmitting text material and displaying received text material on a television screen, the digital transmission being in the form of data packs, wherein successive data packs may relate to different services, each of the data packs including signals constituting a magazine of several pages, and the data for each page beginning with page flag information followed by page number information and ending with the next page flag information, the system comprising at a receiver a keyboard for identifying a desired page, a comparator circuit responsive to page flag and number information for detecting the desired page responsive to operation of the keyboard, a

memory responsive to the comparator circuit for storing data relative to the desired page, and a character generator for displaying the desired page on a television screen responsive to the data stored in the memory.

2. A teletext system according to claim 1, wherein the data belonging to each page are grouped in rows (or page lines), the data belonging to each row being preceded by a row flag followed by a row number, and ending with the next row flag, the row number detected after each row flag determining the address at which the row data must be stored in the said memory.

3. A teletext system according to claims 1 or 2. wherein, from the character data, the character generator delivers to a matching circuit the character luminance signals, and in addition logic pulses each concerning the presence or the absence of a basic color R (red), V (green) or B (bluc), the said matching circuit transferring the luminance signal to conventional circuits of the television receiver, the said matching circuit comprising associated to each basic color logic input a first diode whose anode is connected to the input of an analog amplifier whose output is connected to the corresponding chrominance television tube input, the anode of the first diode being in addition connected to the anodes of a second and a third diode, the first diode cathode being connected from the associated color input and the output of a first voltage generator delivering a voltage v2, the second diode cathode being connected from the output of a second voltage generator delivering a voltage vl, and the third diode cathode being connected from the output of a third voltage generator delivering a voltage v3, the third generator output being in addition connected to the output of a gate whose output is not grounded when the three color inputs together receive logic pulses and grounded in any other case, with v3 > v2 > vl, the values of vl, v2 and v3 being selected appropriately.

4. A teletext system according to claim 2, wherein a data pack is constituted by a sequence of eight-bit words comprises in addition to prefixes, page flags followed by page numbers, row flags followed by row numbers, and escape eight-bit words followed by typc-identity cight-bit words, themselves followed by a sequence of characters to be displayed in the type, the identity of which is determined by the preceding type identity eight-bit words, and wherein a receiver comprises, in addition to a first conventional random access memory for storing the coded characters, a second random access memory for storing the type identity eight-bit words at the same addresses as the addresses of the characters belonging to the said sequence in the first random access memory, and wherein the read operation from the first random access memory for display purpose is performed at the same time as read operation from the second random access memory whose output signals select the character generator permanent memory from which the shape of the characters read out from the first random access memory is to be read out.

5. A teletext system according to claim 4, wherein the output signal from the second random access memory controls the luminance and/or the chrominance in the display tube at the time the characters are displayed on the television screen.

6. A teletext system according to claims 4 or 5, wherein the type identity eight-bit words following an escape eight-bit word comprise an identity component eight-bit word followed by an escape eight-bit word per character identity component. except for the last identity component eight-bit word that is directly followed by the first character eight-bit word of a sequence of characters which the type is assigned to, the received data being applied to a switching circuit delivering. on the one hand, the escape eight-bit words followed by type-identity eight-bit words serially to a buffer memory and, on the other hand, character eight-bit words or escape cight-bit words not followed by type-identity eight-bit words to the input of the first random access memory, the buffer memory output being connected to SCCOlld random access memory input and delivering its contents, except for the escape eight-bit words, to said second random access memory each time a character belonging to said sequence is written into the first random access memory, the contents of the buffer memory being erased when receiving the next escape eight-bit word followed by an type identity or type component identity eight-bit word.

7. A receiver for use in a teletext system in which text material is transmitted in digital form and displayed on a television screen, signals respresenting the text material being transmitted in the form of data packs. the data packs being constituted by the sequential transmission of cight-bit words comprising page flags followed by page numbers and row flags followed by row numbers, escape eight-bit words followed by type-identity eight-bit words, which are followed by a sequence of coded words identifying characters which are to be displayed in type which is determined by the preceding type-identity words, said receiver comprising a keyboard, a comparator, a first random access memory for storing the coded character words at certain addresses. a second random access memory for storing the type-ideiitity words at the same certain addresses as the addresses of corresponding character words stored in the first random access memory, character generator means for reading the words stored in the first random access memory and at the same time the words stored in the second random access memory according to a signal from the keyboard to the comparator, the comparator recognising a page flag signal at the beginning and at the end of a page, thereby simultaneously selecting a character and a type identity, and a permanent memory in the character generator means responsive to the read out of said second random access memory for determining the shape of the characters read out from the first random access memory.

8. A receiver as claimed in claim 7 including means responsive to output signals from the second random access memory for controlling the luminance or chrominance of the display on the television screen.

9. A receiver as claimed in either claim 7 or claim 8 for use in a system as defined therein wherein the type identity eight-bit words following an escape eight-bit word comprise an identity component eight-bit word followed by an escape eight-bit word per character identity component, except for the last identity component eight-bit word that is directly followed by the first character eight-bit word of a sequence of characters to which the type is assigned. the receiver including buffer memory means, switching circuit means for applying the received data to deliver the escape eight-bit words followed by the type identity eight-bit words serially to the buffer memory, the switching circuit also delivering character eight-bit words or escape eight-bit words not followed by type identity eight-bit words to the input of the first random access memory, the buffer memory output being connected to the second random access memory input for delivering its contents. except for the escape eight-bit words, to the second random access memory each time a character belonging to the sequence is written into the first random access memory, the contents of the buffer memory being erased when the next escape eight-bit word followed by a type identity or type component identity eight-bit word is received.

10. A teletext system as claimed in claim 1 substantially as described herein with reference to the accompanying drawings.

11. A receiver as claimed in claim 7 substantially as described herein with reference to Figures 2-6 of the accompanying drawings.