GB1592773A - Alarm systems - Google Patents

Description

(54) ALARM SYSTEMS (71) We, CHUBB ALARMS LI MITED, A British Company, formerly of 29 Enford Street, and now of 42-50 Hersham Road, Walton-on-Thames, Surrey KT12 lRY, London W1H 2AE, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to alarm systems.

Intruder alarm systems generally include detectors which are designed to monitor a physical property (for example, sound, light, or vibration) within the region to be protected. A change in the property monitored greater than some threshold level, is taken as indicative of the presence of an intruder within the region and thus good cause for an alarm. However, disturbances in the properties being monitored may arise spuriously in the absence of intrusion, and as such can, and often do, result in false alarms.

It is an object of the present invention to provide an alarm system that can be used to reduce the incidence of false alarms.

According to the present invention there is provided an alarm system for indicating the occurrence of an event within a region, comprising a plurality of detection circuits each of which includes one or more detectors and is for supplying a signal in response to detected change in a property within the region, and control means coupled to the detection circuits for providing an alarm output in response to the condition in which a plurality of said signals have been supplied by any one or more of the said detection circuits, and wherein the system includes means for inhibiting provision of the alarm output in respect of signals supplied successively within a predetermined interval of time of one another by the same detection circuit.

With the system of the present invention the alarm output is provided only if the appropriate plurality of signals is supplied so that a signal arising spuriously from one of the detectors will not in itself give rise to the alarm condition. In particular the control means may be responsive to the condition in which just two signals are supplied, and in these circumstances the incidence of false alarm is reduced by virtue of the fact that the alarm output is provided only if change detected by one detector is confirmed by change detected by another detector, or by the same detector responding again after the said interval of time has elapsed.

The said interval may be of adjustable duration, and the said inhibiting means may be operative in response to the supply of a signal by one or other of the detection circuits to inhibit for the said interval supply of further signals to the control means from any of a group of detection circuits which includes that detection circuit. The grouping of detection circuits involved may differ according to which detection circuit is the first to supply a signal.

The control means may be responsive to provide the said alarm output if the said plurality of signals are supplied at any time within the duration of operation of the system, e.g. while the system is switched on throughout the night. On the other hand such response may be arranged to be conditional upon the signals being supplied within a pre-set or otherwise predetermined period of time of one another.

The system which may be a fire or intruder alarm system and which may include a device for giving an audible alarm, preferably includes means to enable events leading up to the giving of an alarm to be traced. In this respect the system may include means such as indicator lamps, arranged to indicate which of the detection circuits first produced a signal and/or which detection circuit produced the second signal confirming the alarm condition.

An embodiment of the invention will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a diagram of one of ten identical alarm circuits of the alarm system; and Figure 2 is a diagram of a control circuit that is common to the ten alarm circuits of the alarm system.

The alarm system shown in the drawings has ten alarm detection circuits (Figure 1) each associated with a conventional detector (not shown) and connected to a common control circuit (Figure 2). Before an alarm output can be created, two detections have to occur in such a way as to satisfy certain logic requirements of the control circuit and thereby reduce the incidence of false alarms.

Each detector is coupled to its associated alarm detection circuit by an optically coupled isolator 10, the d.c. holding current being set by a resistor Rl in series with the light emitting diode (L.E.D.) of the isolator. With the L.E.D. on, the collector of the photo-transistor in the isolator 10 is at negative potential. When the detector operates, the collector will go positive and a capacitor C1 discharges thereby causing a NAND-gate inverter 12 to change from binary 1 to binary 0. This change of state is stored by a NAND-gate latch 14 which energizes a slave lamp (not shown) via an inverter driver 16. The output of inverter 12 is also connected via a three-input NOR gate 18, NOR-gate latches 20 and 22 and a further inverter 24, to an alarm lamp (not shown).

The common control circuit shown in Figure 2 has two timers 26 and 28 respectively having adjustable time periods T1 and T2. Timer 26 is an analogue timer set by a potentiometer 30 over the range 5 to 30 seconds. Timer 28 on the other hand, is a digital timer operating from an analogue master clock 32 which drives a counter 34.

The period T2 is set by a five-position selector 35 to be in a 2, 4, 8, 16 or 32 minute range according to which of five contacts, referenced Q5 to Q9, is selected. The master clock 32 is controlled by a potentiometer 33 to vary these times by a multiplying factor of between 0.5 and 2.

Each alarm detection circuit is connected to the common control circuit at points d, f, g and x as indicated in the figures, and an alarm-counter logic circuit 36 operates a clean-contact reed relay 38 (normally closed), via an inverter driver 40, to produce an alarm output when the detection circuits indicate alarm conditions occurring in accordance with certain logical conditions.

These conditions are determined by the interconnections between the alarm detection circuits and the control circuit and by the setting of the timer periods T1 and T2.

Operation of one of the detectors in response to an alarm condition causes the NAND-gate inverter 12 in the relevant detection circuit to change state as described above. The output of the associated NOR gate 18 then goes to binary 1 thereby triggering timer 26 via point. The triggered timer 26 produces an output at point d, and the NOR-gate latch 20 of the activated detection circuit responds to this to inhibit further activation of that circuit for the period or interval T1 of timer 26. In particular the NOR gate 18 is inhibited throughout interval T1 by the output b of the NOR-gate latch 20.

The alarm counter logic circuit 36 is also triggered from the activated detection circuit via point f, and, in turn, triggers the timer 28 for period T2. The alarm latch 22, which in each detection circuit is operated by output b of the associated latch 20, is automatically reset by the circuit 36 via point g when the period T2 expires.

If another detection circuit enters an alarm state during period T2, or if the same detection circuit re-enters the alarm state after the expiry of T1 within that period T2, the circuit 36 is once again triggered via point f and then actuates the alarm relay 38 via the inverter driver 40 and energizes an alarm lamp via a driver 41. The circuit 36 then inhibits all alarm detection circuits via points x until resetting occurs, and also stops the timer 28 to inhibit resetting of the alarm lamp latch 20 in the activated detection circuit or circuits.

In operation, the first alarm detection, circuit to enter an alarm state is indicated by the appropriate slave lamp output and triggers the two timers 26 and 28 having durations of T1 and T2 respectively. During the interval T1, which is shorter than T2, response of the first-activated alarm circuit to signal the alarm state again, is inhibited.

Any other alarm circuit entering the alarm state during the period T2, or further operation of the said first alarm circuit after T1 and before expiry of T2, will cause an alarm output. This second detection also causes the appropriate lamp in the group of alarm lamps to indicate which alarm circuit confirmed the true alarm state. The alarm output remains until the circuit is manually reset.

It may be that several similar detection circuits in the same area suffer from a common cause of false alarms and, in such case, the alarm circuits may be coupled with the common control circuit in such a way that the first alarm circuit to enter an alarm state causes several other circuits to be inhibited during T1.

All detections cause latched energization of both the slave and alarm lamps of the appropriate detection circuits. Energization of the alarm lamp ceases if at the end of the timer period T2, there has been no second detection creating an alarm output. If a second detection occurs to satisfy the timer and inhibit-logic, energization of the alarm lamp continues and an alarm output is generated. Energization of any alarm lamp is cancelled and the alarm output terminated by actuation of a key-operated switch.

Energization of the slave lamps is cancelled by operation of a reset button. There is not automatic resetting of the latches 14 during operation so the slave lamps will indicate, and will continue to indicate, all detections that occur until the reset button is operated.

Lamps may also be provided to indicate operation of timers 26 and 28 throughout T1 and T2 in real time.

WHAT WE CLAIM IS: 1. An alarm system for indicating the occurrence of an event within a region, comprising a plurality of detection circuits each of which includes one or more detectors and is for supplying a signal in response to detected change in a property within the region, and control means coupled to the detection circuits for providing an alarm output in response to the condition in which a plurality of said signals have been supplied by any one or more of the said detection circuits, and wherein the system includes means for inhibiting provision of the alarm output in respect of signals supplied successively within a predetermined interval of time of one another by the same detection circuit.

2. An alarm system according to Claim 1 wherein the said interval is of adjustable duration.

3. An alarm system according to Claim 1 or Claim 2 wherein the inhibiting means is operative in response to the supply of a signal by a said detection circuit to inhibit for said interval supply of further signals to the control means from any of a group of detection circuits which includes that detection circuit.

4. An alarm system according to Claim 3 wherein the inhibiting means is operative in response to the supply of signals from different ones of the detection circuits to inhibit supply of further signals as aforesaid in respect of different groupings of the detection circuits.

5. An alarm system according to any one of the preceding claims wherein the control means is responsive to provide said alarm output only if the said plurality of signals are supplied within a predetermined period of time of one another.

6. An alarm system according to Claim 5 wherein the said predetermined period is of adjustable duration.

7. An alarm system according to any one of the preceding claims including means for providing indication of which detection circuits provide successive signals and in which order.

8. An alarm system substantially as hereinbefore described with reference to the accompanying drawings.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (8)

**WARNING** start of CLMS field may overlap end of DESC **. inhibited during T1. All detections cause latched energization of both the slave and alarm lamps of the appropriate detection circuits. Energization of the alarm lamp ceases if at the end of the timer period T2, there has been no second detection creating an alarm output. If a second detection occurs to satisfy the timer and inhibit-logic, energization of the alarm lamp continues and an alarm output is generated. Energization of any alarm lamp is cancelled and the alarm output terminated by actuation of a key-operated switch. Energization of the slave lamps is cancelled by operation of a reset button. There is not automatic resetting of the latches 14 during operation so the slave lamps will indicate, and will continue to indicate, all detections that occur until the reset button is operated. Lamps may also be provided to indicate operation of timers 26 and 28 throughout T1 and T2 in real time. WHAT WE CLAIM IS:

1. An alarm system for indicating the occurrence of an event within a region, comprising a plurality of detection circuits each of which includes one or more detectors and is for supplying a signal in response to detected change in a property within the region, and control means coupled to the detection circuits for providing an alarm output in response to the condition in which a plurality of said signals have been supplied by any one or more of the said detection circuits, and wherein the system includes means for inhibiting provision of the alarm output in respect of signals supplied successively within a predetermined interval of time of one another by the same detection circuit.

2. An alarm system according to Claim 1 wherein the said interval is of adjustable duration.

3. An alarm system according to Claim 1 or Claim 2 wherein the inhibiting means is operative in response to the supply of a signal by a said detection circuit to inhibit for said interval supply of further signals to the control means from any of a group of detection circuits which includes that detection circuit.

4. An alarm system according to Claim 3 wherein the inhibiting means is operative in response to the supply of signals from different ones of the detection circuits to inhibit supply of further signals as aforesaid in respect of different groupings of the detection circuits.

5. An alarm system according to any one of the preceding claims wherein the control means is responsive to provide said alarm output only if the said plurality of signals are supplied within a predetermined period of time of one another.

6. An alarm system according to Claim 5 wherein the said predetermined period is of adjustable duration.

7. An alarm system according to any one of the preceding claims including means for providing indication of which detection circuits provide successive signals and in which order.

8. An alarm system substantially as hereinbefore described with reference to the accompanying drawings.