GB1558862A - Television receiver circuits - Google Patents

Television receiver circuits Download PDF

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Publication number
GB1558862A
GB1558862A GB3836576A GB3836576A GB1558862A GB 1558862 A GB1558862 A GB 1558862A GB 3836576 A GB3836576 A GB 3836576A GB 3836576 A GB3836576 A GB 3836576A GB 1558862 A GB1558862 A GB 1558862A
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circuit
time
programme
output
delay line
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GB3836576A
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TDK Micronas GmbH
ITT Inc
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Deutsche ITT Industries GmbH
ITT Industries Inc
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)
  • Picture Signal Circuits (AREA)

Description

(54) TELEVISION RECEIVER CIRCUITS (71) We, ITT INDUSTRIES INC., a Corporation organised and existing under the Laws of the State of Delaware, United States of America, of 320 Park Avenue, New York 22, State of New York, United States of America, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to television receiving apparatus, and is an improvement on, or modification of, the invention disclosed in our application 9,382/75 Serial No. 1495/73.
Television receivers are already commercially available which, in addition to the main screen, are provided with a second screen of substantially smaller picture area, so that the viewer, in addition to his chosen programme being shown on the main screen, can simultaneously watch a further programme on the smaller secondary screen.
Besides the investment involved in the second picture tube. such a receiver, as a rule, requires two complete sets of parts for receiving the different programmes, that is, the tuner, if-amplifier, video stages, and deflection circuits must be provided for twice. This involves a considerable additional investment.
Another method for simultaneously displaying two different television programmes has been demonstrated at exhibitions, as is described in the German technical journal "ratio mentor electronic", March 1974, page 95. In this, one of the pictures to be shown on the TV receiver screen is received and displayed in the usual way. By a second receiver there is received a further station whose screen picture is again sampled by a television camera. The output signals of the television camera are then fed to the first receiver and displayed alternately by means of an electronic switch, with this arrangement capable of being made in such a way that the second picture is displayed in a section of the first picture. A similar method has also been disclosed in the German Published Patent Application (DOS) 2,239,593. These solutions, too, involve a considerable investment, and are unsuitable for being used especially with domestic TV receivers.
In distinction thereto, our application 9,382/75 (Serial No. 1495173) proposes a television receiver which permits the simultaneous reception of at least two programmes, and is substantially more simple in its construction than the television receiver described above, comprising two separate picture tubes and receiving units. For the sake of enabling a better understanding of the present invention, there will first of all be described in greater detail the television receiver according to the aforesaid application, with reference to Figures 1 and 2 of the accompanying drawings, of which: Figure 1 schematically shows the front view of a television receiver according to the aforesaid application; and Figure 2 shows the block diagram of the television receiver according to the aforesaid application.
Figure 1 shows the result as obtainable by the viewer on the screen 2 of the television receiver 1, namely that the programme (I) is displayed on the major part of the screen 2, hence, for example, a football match, while the picture section 2a displays another programme (II). In the case of the 625-line television standard. the number of lines of the second picture 2a may amount to 45 lines, with the picture diagonals having a length of about 10 cm. Accordingly, the number of lines and the number of picture elements in the image section 2a are considerably reduced with respect to the reproduction of programme II when displayed as the main programme on screen 2. This is admissible because the image section 2a displays the total picture of programme II on a reduced scale.
The block diagram of an embodiment of the TV receiver according to the aforesaid application, shown in Figure 2, illustrates the signal path common to both programmes, extending from the antenna via the tuner 3, the if-amplifier 4, and the video amplifier 5 to the picture tube 6, with the horizontal deflecting stage 7 and the vertical deflecting stage 8 still being associated with this signal path in the usual way. Moreover, the television receiver 1 still contains the audio amplifier 9 and the loudspeaker 10.
This shown common signal path is now acted upon by the storing and switching until 11 as controlled by the output of the if amplifier 4 and by the output of the horizontal deflecting stage 7 and which, in turn, acts upon the tuner 3, the if amplifier 4 and the video amplifier as follows.
Assume that the tuning means of the tuner 3, for example, varactor diodes with the corresponding potentiometers for the voltage adjustment thereof, have been set to the station for receiving programme I and to the station for receiving the other programme II.
In dependence upon the horizontal stage 7, the storing and switching unit 11 now controls the tuner 3 in such a way that, during certain lines, it is being switched from programme I to programme II. During these lines the video amplifier, by the action of the switching device of the storing and switching unit 11, is connected to the storage portion thereof, so that the lines of the now received and processed programme II are stored in the storage portion.
Besides the switching of the tuner 3 to programme II, there is also caused a corresponding switching of the gain of the if-amplifier 4.
The storage portion transfers the information as stored therein, to the video stage as soon as the electron beam sweeping the screen, reaches the area of the image section 2a.
The storage portion is aimed at reducing in size the picture of programme II, and at bridging the time difference between the switching to the station of programme II and the reproduction (display) of this information. Reduction in size of the picture of programme II is accomplished in that the readout speed of the storage device is higher than the speed at which the information was written in.
It is of advantage to effect the swiching of the tuner 3 to programme II only a line at a time, in order thus to disturb the reception of programme I as little as possible.
Because the information flow of programme I to the picture tube 6 is interrupted during the time required for the switching to programme II, it is necessary, during this time, to offer a "substitute programme" to the pictue tube 6. The signal intended for this purpose, in the most simple case, may consist of the medium brightness value, hence of the medium grey value, of the preceding lines. With respect to colour television receivers it is advisable at least to continue with the representation of the colour information, with the colour information to be further represented, in the case of a colour television receiver operating on the PAL-system principle, corresponding to the colour signal of the preceding line, or in other words, the colour information which is to be continued to be represented, is simply taken from the delay line as contained in the receiver.
Programme I is least disturbed if, in the case of a colour television receiver, and in addition to the aforementioned colour information. also the brightness information of the preceding line is fed to the picture tube while programme II is being stored into the storage device.
As regards the last-mentioned case it will be necessary to provide an additional storage portion for storing the brightness information on the preceding line until the switching to programme II is being carried out. This additional storage portion may be of a relatively simple design if the bandwidth of the signal of the switched line is reduced considerably. for example, by the factor 10. This may be carried out without further ado, because the picture element resolution of this line does not need to be very high considering that the line which is being represented again, is actually a 'wrong" one.
As already mentioned, it will result from the representation of programme II as a total picture on a reduced scale, which is written at a normal raster resolution, that the number of lines as well as the number of picture elements per line to be stored with respect to this information, can be reduced by the imaging scale. An adequate picture of the programme contents is already obtained when providing for about 50 lines with about 50 picture elements.
The storage portion for programme II as contained in the storing and switching unit 11, is preferably designed in the way to be described hereinafter. It consists of storage positions for the lines of programme II linewisely arranged, with the number of storage positions corresponding to the number of lines to be stored. The first line of programme II is put into the first storage position. After the tuner has been switched back to programme I, the stored first line of programme II is shifted into the next storage position, so that now the first storage position is set free for the second line of programme II to be stored. This shifting of the individual stored lines of programme II in the individual storage position is continued until the first stored line has reached the last storage position. Thereafter, the storage positiion will contain a picture of programme II. This linewise shifting is preferably carried out by way of parallel transfer, but may just as well be carried out by way of serial transfer. The storage portion thus forms a first-in-first-out store (fifo store) in that its contents can be read out in the same order in which they were written in.
Now the stored picture may be displayed on the screen of the picture tube by means of a corresponding sequence control. During the time in which the picture of programme II is displayed on the screen of the picture tube, the storage contents may rotate continuously.
As a simplification, it is possible to display the same storage contents in both fields, thereby avoiding the higher resolution of an interlaced picture. This is possible because the resolution in the vertical direction still remains of the same order as the horizontal resolution. By this measure it is possible to halve the number of required storage positions.
From the consideration that the speed of movement of an object, such as a football, shown in programme II, does not need to be higher in the pictures section of programme II than in programme I, it follows that the number of new pictures of programme II to be stored, may be reduced in proportion to the scale of reduction. This gives the advantage that the disturbance of programme I caused by the switching of the tuner necessary for the storing-in, will be considerably reduced.
Moreover, the circuit of the storing and switching unit 11. is designed in such a way that only n/m lines of programme II will be taken out during each picture passage of programme I, with n being the number of lines of the picture of programme II on an enlarged scale, and m being the number of storage passages chosen for renewing the entire storage contents (the number m, for example, may be = 1).
Both programmes (I and II) can be selected from the programmes offered by the available stations, so that as a rule, both programmes are controlled by different master clocks. On account of this, however, the individual lines of programme II to be stored, will be stored in arbitary storage positions of the storage portion. i.e. the beginning of the line and the end of the line are no longer in agreement with the beginning and the end of the corresponding storage position. This, however, is to be avoided with a view to achieving a display that will make sense, and this can be achieved in that the information contained in the corresponding storage position, is permitted to rotate until the line synchronizing pulse appears at a certain point, e.g. at the end of the storage position. Since the vertical syynchronizing pulse of the picture reduced in size is also not in phase with that of the picture of programme I, a corresponding assignment is also necessary in this case. A simple picture pulse search circuit which may consist of a conventional pulse separating circuit with an integrating network, controls the storing of each line to be stored, into the corresponding storage position as soon as the vertical (picture) synchronizing pulse has been detected in a predetermined storage position.
In the storage portion of unit 11 a storage device such as the known types of charge transfer circuits, hence for example, bucket-brigade circuits, charge-coupled devices, or the like can be used with advantage. Particularly suitable is the storage device described in our application 26,104/75 (Serial No. 1470637).
It is readily possible to display the picture of programme II also as a still which is taken at certain time intervals from the running programme. thus permitting the storage control to be further simplified. Of course, in that case there will have to be done without the information relating to movement, as contained in programme II which, depending on the opinion on quality and the attention being paid to programme II by the viewer, may be considered to be of secondary importance only.
According to the present invention there is provided a television receiver circuit for a receiver adapted to display, on one screen. images pertaining to a first programme, and simultaneously to a reduced scale images pertaining to a second programme broadcast on a different frequency inset within the images of the first programme. the receiver having one common signal path (tuner, IF-amplifier, video amplifier), the circuit including a storage portion in which the picture contents of the second programme are stored with a reduced number of lines and thereafter, read out in a linewise fashion in an appropriate position of the lines of the first programme for displaying the further programme. and a switching means for switching the tuner at the occurrence of those lines of the picture of the second programme which are to be stored, from the receiving frequency of the first programme to that of the second programme, the circuit causing the audio signal, during a time called the total interference time and comprising the time during which the tuner is switched to the second programme and a transient time of the sound-IF-filter. to vary substantially monotonically, and either abruptly or gradually, from that value obtaining at the beginning of that total interference time to that obtaining at the end of that time.
Embodiments of the invention are described below with reference to the Figures 3 to 8 of the accompanying drawings, of which: Figure 3 shows the basic circuit diagram of a first embodiment of a switching noise suppressor; Figure 4 as a function of time, shows the input and the output voltage characteristics relating to the arrangement according to Figure 3; Figure 5 shows the basic circuit diagram of a second embodiment of a switching noise suppressor; Figure 6 schematically shows the waveforms of different voltages appearing in the arrangement according to Figure 5; Figure 7 shows the basic circuit diagram of a third embodiment of a switching noise suppressor; and Figure 8 schematically shows some waveforms of voltages as occurring in the arrangement according to Figure 7.
The three ways of solving the problem of switching noise suppression, and which are to be explained with reference to the accompanying drawings, are based on the recognition that the narrow-banded sound IF-filter, in normal types of television receivers, usually provided in the form of a ceramic filter for filtering-out the sound-intermediate-frequency signal whose frequency, according to the CCIR-television standard, amounts to 5.5 MHz and, according to US standards, to 4.5 MHz, reacts to the tuner switching as effected during the period of one line, at the end thereof with a transient lasting about one further line period. Accordingly, the audio signal is disturbed for a period of time which is almost equal to the sum of the duration of the squarewave pulses serving to swich the tuner 3 and the transient period of time of the sound IF-filter, and superimposed by the overshoot signal of the sound IF-filter. This period of time is hereinafter referred to as the total interference time T.
In Figures 4, 6 and 8, capital letters are used for marking the individual characteristics as functions of time as appearing in connection with the first squarewave pulse as shown in Figure 6 waveform a. The signal value appearing in the audio signal at the beginning of this interference is indicated by the reference F, and the one appearing at the end of this interference, is indicated by the reference G.
In the embodiment depicted in Figures 3 and 4, the last signal value F of the audio signal NF appearing just before starting to switch the tuner 3 to programme II, is stored by means of a sample-and-hold circuit for a period of time referred to as the total interference time T and, for this period of time, the signal value F instead of the audio signal is fed to the audio output amplifier.
In the circuit shown in Figure 3, the audio signal NF passes through a special operational amplifier 12 which, by being correspondingly wired, is operated as a sample-and-hold circuit during the total interference time T. For this purpose. the operational amplifier (op.
amp.) 12 is provided with an input c via which the output resistance is capable of being electronically controlled, and its voltage gain is set to unity with the aid of a resistor R31.
This negative feedback resistor R31 serves to feed the output signal of the op. amp. 12 to an inverting input F; with the output signal not being applied directly to an output a of the op.
amp. 12. but to an operating resistor R32 of the impedance transformer arranged subsequently to the output a and which consists of a field-effect transistor T31 operated in a source-follower arrangement, including a drain resistor R33.
A capacitor C31 is arranged between the op. amp. 12 output a and the zero point of the circuit. The input c acting upon the output resistance of the op. amp. 12, via a transistor To operated as a switch in grounded emitter connection, with a collector resistance R34, is switched over from as small as possible a value when operated as an op. amp. to as high as possible a value when operated as a sample-and-hold circuit. Via inputs b. d the op. amp. 12 is connected to the poles of a source of supply voltage Un, with the negative pole thereof being connected to the zero point of the circuit. i.e. to ground.
The time required for the aforementioned switchover is equal to the total interference time T. For producing pulses of this duration, a pulse shaper circuit 13 is provided. This circuit, for example may be a monostable multivibrator to an input E' of which there are applied the squarewave pulses switching the tuner 3, with the pulses corresponding to the duration of the total interference time T, appearing at the output thereof which is connected to the base of transistor Tut,.
The audio signal NF is applied to the non-inverting input e of the op. amp. 12 via the input E of the sample-and-hold circuit, whereas the "compensated" audio signal NF' is taken off across the output A at the source resistor R32 of the field-effect transistor T31.
Figure 4 shows, as a function of time. the characteristics of both the input voltage UE and the output voltage UA of the arrangement according to Figure 3. For the sake of simplicity, it has been assumed that the audio signal is sinusoidal. with the characteristic thereof, as a function of time, being superposed. amongst others. by the aforementioned transient signal of the sound-IF-filter during the total interference time T. This shape of curve is shown in Figure 4 waveform (a). The total interference time T is additively composed of the time duration tu of the squarewave pulse which switches the tuner 3 and of the transient period tf of the sound-IF-filter: T = tu + tf.
The output signal UA shown in Figure 4, waveform (b), does not contain the noise pulse illustrated in Figure 4, waveform (a), but the signal value F of the audio signal NF obtaining at the beginning of the interference is kept constant throughout the period of the total interference time T. Therefore, the curve of the output signal UA, at the end of the interference, will "jump" to the signal value G then obtaining in the audio signal.
In simple cases where no excessive demands are placed on the sound (tone) quality of the audio reproduction, the first embodiment which has been described with reference to Figures 3 and 4, is deemed sufficient. A sound quality increased in relation thereto, however, can be achieved by employing a second embodiment which will now be explained with reference to Figures 5 and 6. This embodiment likewise makes use of a sample-and-hold circuit, but avoids the "jump" of the audio signal appearing in Figure 4, waveform (b), at the end of the interference signal. In the arrangement as shown in Figure 5, this is accomplished in that, by means of integration. the signal value F of the audio signal NF obtaining at the beginning of the interference, is either raised or lowered to the signal value G obtaining at the end of the interference.
In this arrangement, the disturbed audio signal NF passes through a delay line 14 which may be realized by using the usual and known types of delay lines, such as glass delay lines, or delay lines operating on the principle of charge transfer circuits, especially of bucket-brigade circuits. The delay time T of the delay line 14 is then to be chosen to be equal to the total interference time T.
Moreover, the signal value G of the audio signal NF obtaining at the end of the delay time of the delay line 14 at the input thereof, is stored for the total interference time T by means of a sample-and-hold circuit 15. For realizing this sample-and-hold circuit it is possible to use an arrangement of the type as shown in Figure 3. but in that case the squarewave pulses serving to switch the tuner 3. are not be fed directly to the input E'; in fact, these squarewave pulses are first of all to be delayed by the total interference time T in a time-delaying arrangement.
Finally, the delay line 14 is followed by an op. amp. 16 in which, between the output end of the delay line, and the negative input of the op. amp. there is a resistor R51, which is switchable between the output of the delay line 14 and the output of the sample-and-hold circuit 15. A capacitor C51 with one side connected to the output of the op. amp. 16, is switchably disconnectable from the constant potential to the non-inverting input of the op.
amp. 16 for the total interference time T, with a negative feedback resistor R52 being similarly disconnected.
The disturbed audio signal NF is fed to the delay line 14 capacitively via a capacitor C52, and is again capacitively taken off this delay line via a capacitor C53. By means of an integrating circuit R54, C54, the steady voltage component of the audio signal NF is obtained and is fed across the resistor R53 to the audio signal delayed in the delay line 14, behind the capacitor C53 and is fed directly to the non-inverting input of the op. amp. 16.
The aforementioned switching of the capacitor C51 and of the output of the delay line 14, as well as the disconnection of the resistor R52 is shown to be carried out by means of the swiching devices S51, S52, S53 depicted for the sake of clarity as mechanical swiches. In fact, however, in an actual circuit these switch-over devices are electronic switches. The dashline extending from the input E' indicates that these switches are actuated simultaneously when the signal controlling the sample-and-hold circuit 15 is applied to this particular input.
Figure 6 shows, as functions of time, various waveforms relating to signal voltages appearing in the arrangement according to Figure 5. Figure 6, waveform (a), shows the signal Uu of the squarewave pulses serving the swiching of the tuner 3. and having a width tu. As can be recognized, the tuner switching is effected in this example. at every fifth line of a television picture.
Figure 6, waveform (b), shows the voltage UE applied to the input E, hence the disturbed audio signal NF for which, as regards the total interference time T, the disturbance shown in Figure 4, waveform (a). is superposed upon the audio signal NF. Figure 6, waveform (c), shows the input signal UE, the squarewave pulses applied to input E'. with the prime duration thereof being equal to the total interference time T, and which are delayed by the same time T with respect to the beginning thereof.
Figure 6, waveform (d), shows the output signal Uv of the delay line 14 which differs from the input signal UE as shown in waveform (b) only. in that it is delayed by the delay time t, having otherwise the same shape of curve.
Figure 6, waveform (e), shows the output signal UH appearing at the output H of the sample-and-hold circuit 15. The signal value G obtaining at the end of the interference, is constant throughout the period of time T, and then "jumps" to the then obtaining signal value G'.
Figure 6, waveform (f), finally, shows the signal UA at the output A, hence the curve as a function of time, of the "compensated" audio signal NF'. Compared to waveform (e), it will be seen that the "jump" has become replaced by a continuous transition.
With the aid of the delay line 14 the signal values F, G of the audio signal NF obtaining at the beginning and the end respectively of an interference, are simultaneously available at the end of this interference (see the end of r in waveforms (e) and (f)). The operational amplifier 16 operating as a normal amplifier in the shown switch position of the switchover devices SS1, S52, S53 is switched to integator operation at the end of the interference, at which time position the signal value F of the audio signal NF obtaining at the beginning of the interference, is applied to the output A. From the switch-over time position onwards, the sample-and-hold circuit 15 retains the signal value G of the audio signal NF obtaining at the end of the interference, at its value, so that the capacitor C51, charged to the signal value F obtaining at the beginning of the interference, is either charged or discharged across the resistor R51 to the signal value as applied to point H of the circuit, respectively.
Figures 7 and 8 refer to a third embodiment, and as schematically shown in Figure 7, the disturbed audio signal NF passes through an electronic delay line EK working on the charging transfer principle, whose delay time t is equal to the total interference time T, with the frequency fc of their clock signals P1, P2 lying above the threshold of audibility.
Between the input E and the output A of the electronic delay line EK there is connected a voltage divider comprising a number of taps corresponding to the number of stages of the delay line, with each tap of the voltage divider, at the end of the total interference time T, being temporarily connected with respect to direct current, to each stage of the delay line EK.
The delay line EK is built in accordance with the bucket-brigade principle; it is also possible, however, to use any of the other known kinds of delay lines operating on the charge-transfer principle. Each of the stages of the delay line EK consists of one insulated-gate field-effect transistor arranged with its controlled current path in the signal path, the field effect transistors being connected source to drain and of a capacitor arranged between the gate electrode thereof and the corresponding drain. There are shown six such stages. namely stages T71, T72, T73, T74, T75. T76. A last insulated-gate field-effect transistor T77 with the aforementioned capacitor replaced by a shorting connection, terminates the line with respect to direct current. An insulated-gate field-effect transistor no, a capacitor C70 associated therewith, one pole of which is connected to the zero point of the circuit, a series capacitor C71 following the input E. and a resistor R70 connected to a steady biasing potential UO. couple in the audio signal NF.
The odd-numbered stages 71. 73, 75 are supplied with the clock signal P1 via the gate electrodes of the respective insulated-gate field-effect transistors. while the clock signal P2 is fed to the even-numbered stages 72. 74. 76.
As is generally the case with bucket-brigade circuits. the clock signals Pt, P2 are rectangular and have an amplitude Uc as well as a frequency fc. Both of these clock signals Pl, P2 are staggered with respect of time. so that the effective pulses of the one signal appear during the intervals of the other signal. as shown in waveforms (a) and (b) of Figure 7.
The frequency fc of the clock signals, the number of stages n and the delay time T, in the case of bucket-brigade circuits, comply with the condition; T = nH2fc or n Thus, from the afor
Accordingly, across the voltage divider there is always applied the difference of the signal values F, G as appearing at the beginning and at the end of the delay time. At the end of the total interference time T, referred to the beginning of an interference, there is generated a narrow pulse temporarily switching the transistors T71 to T76 to the conducting state, thus feeding the potentials obtaining at the taps of the voltage divider to the individually associated stages T71 to T76 of the delay line EK. This temporary pulse is applied to the input X and may be generated in a simple way with the aid of a pulse shaper and delay circuit from the squarewave pulses which serve to effect the switchover of the tuner 3.
Figure 8 schematically shows some waveforms appearing in the arrangement of Figure 7.
Waveforms (a) and (b) correspond to the same waveforms in Figure 6, showing the squarewave pulses which cause the switchover of the tuner 3, and having a duration tu, as well as the disturbed audio signal NF at the input E. Waveform (c) of Figure 8, as regards the shape of curve as a function of time, corresponds to waveform (d) of Figure 6, being the signal of waveform b (Figure 8) delayed by the delay time T of the electronic delay line EK.
Waveform (d) shows the signal Ux of the narrow pulses to be applied to the input X.
Finally, waveform (e) shows the output signal UA with the step-shaped approximation of the signal value F obtaining at the beginning of an interference, to the signal value G obtaining at the end of the interference.
In all three of the embodiments described it is appropriate for the "compensated" audio signal NF', before being applied to the audio output stage, to be passed through a low-pass filter for the purpose of suppressing any interferences superimposed by the various switching and clock signals. The upper cut-off (limit) frequency of this low-pass filter should preferably be lower than the frequency of the squarewave pulses serving to effect the switchover of the tuner.
WHAT WE CLAIM IS: 1. A television receiver circuit for a receiver adapted to display, on one screen, images pertaining to a first programme, and simultaneously to a reduced scale images pertaining to a second programme broadcast on a different frequency inset within the images of the first programme, the receiver having one common signal path (tuner. IF-amplifier, video amplifier), the circuit including a storage portion in which the picture contents of the second programme are stored with a reduced number of lines and, thereafter, read out in a linewise fashion in an appropriate position of the lines of the first programme for displaying the further programme, and a switching means for switching the tuner at the occurrent of those lines of the picture of the second programme which are to be stored, from the receiving frequency of the first programme to that of the second programme, the circuit causing the audio signal, during a time called the total interference time and comprising the time during which the tuner is switched to the second programme and transient time of the sound-IF-filter, to vary substantially monotonicallv. and either abruptly or gradually, from that value obtaining at the beginning of that total interference time to that obtaining at the end of that time.
2. A circuit as claimed in claim 1 in which the value of audio signal obtaining at the beginning of the total interference time is stored in a sample-and-hold circuit and during the total interference time, the so-stored signal value intead of the actual audio signal, is fed to the audio output amplifier.
3. A circuit as claimed in claim 2, in which the sample-and-hold circuit comprises an operational amplifier having an electronically controllable output resistance and an adjusted voltage gain of unity, the output of the operational amplifier being continuously connected to a capacitor, and the output resistance being switched from as small as possible to as high as possible a value during the total interference time.
4. A circuit as claimed in claim 3, in which the switching signal for causing the switching of the operational amplifier from the smallest posible to the highest possible output resistance, is produced from squarewave pulses causing the switchover of the tuner, by means of a pulse shaper circuit.
5. A circuit as claimed in claim 1, in which the audio signal passes through a delay line whose delay time is equal to the total interference time. in which the signal value of the audio signal obtaining at the end of the delay time. at the input of the delay line, is stored by means of a sample-and-hold circuit for the period of the total interference time, in which the delay line is followed by an operational amplifier in which a resistor connected to the inverting input thereof, towards the end of the delay time, is switchably disconnected from the output of the delay line and connected to the output of the sample-and-hold circuit, and a capacitor of constant potential connected with one side to the output of the operational amplifier is switchably connected to the inverting input of the operational amplifier for the period of the total interference time, and a negative feedback resistor arranged between the output and the inverting input, is switchably disconnected for the period of the total interference time.
**WARNING** end of DESC field may overlap start of CLMS **.

Claims (13)

**WARNING** start of CLMS field may overlap end of DESC **. Accordingly, across the voltage divider there is always applied the difference of the signal values F, G as appearing at the beginning and at the end of the delay time. At the end of the total interference time T, referred to the beginning of an interference, there is generated a narrow pulse temporarily switching the transistors T71 to T76 to the conducting state, thus feeding the potentials obtaining at the taps of the voltage divider to the individually associated stages T71 to T76 of the delay line EK. This temporary pulse is applied to the input X and may be generated in a simple way with the aid of a pulse shaper and delay circuit from the squarewave pulses which serve to effect the switchover of the tuner 3. Figure 8 schematically shows some waveforms appearing in the arrangement of Figure 7. Waveforms (a) and (b) correspond to the same waveforms in Figure 6, showing the squarewave pulses which cause the switchover of the tuner 3, and having a duration tu, as well as the disturbed audio signal NF at the input E. Waveform (c) of Figure 8, as regards the shape of curve as a function of time, corresponds to waveform (d) of Figure 6, being the signal of waveform b (Figure 8) delayed by the delay time T of the electronic delay line EK. Waveform (d) shows the signal Ux of the narrow pulses to be applied to the input X. Finally, waveform (e) shows the output signal UA with the step-shaped approximation of the signal value F obtaining at the beginning of an interference, to the signal value G obtaining at the end of the interference. In all three of the embodiments described it is appropriate for the "compensated" audio signal NF', before being applied to the audio output stage, to be passed through a low-pass filter for the purpose of suppressing any interferences superimposed by the various switching and clock signals. The upper cut-off (limit) frequency of this low-pass filter should preferably be lower than the frequency of the squarewave pulses serving to effect the switchover of the tuner. WHAT WE CLAIM IS:
1. A television receiver circuit for a receiver adapted to display, on one screen, images pertaining to a first programme, and simultaneously to a reduced scale images pertaining to a second programme broadcast on a different frequency inset within the images of the first programme, the receiver having one common signal path (tuner. IF-amplifier, video amplifier), the circuit including a storage portion in which the picture contents of the second programme are stored with a reduced number of lines and, thereafter, read out in a linewise fashion in an appropriate position of the lines of the first programme for displaying the further programme, and a switching means for switching the tuner at the occurrent of those lines of the picture of the second programme which are to be stored, from the receiving frequency of the first programme to that of the second programme, the circuit causing the audio signal, during a time called the total interference time and comprising the time during which the tuner is switched to the second programme and transient time of the sound-IF-filter, to vary substantially monotonicallv. and either abruptly or gradually, from that value obtaining at the beginning of that total interference time to that obtaining at the end of that time.
2. A circuit as claimed in claim 1 in which the value of audio signal obtaining at the beginning of the total interference time is stored in a sample-and-hold circuit and during the total interference time, the so-stored signal value intead of the actual audio signal, is fed to the audio output amplifier.
3. A circuit as claimed in claim 2, in which the sample-and-hold circuit comprises an operational amplifier having an electronically controllable output resistance and an adjusted voltage gain of unity, the output of the operational amplifier being continuously connected to a capacitor, and the output resistance being switched from as small as possible to as high as possible a value during the total interference time.
4. A circuit as claimed in claim 3, in which the switching signal for causing the switching of the operational amplifier from the smallest posible to the highest possible output resistance, is produced from squarewave pulses causing the switchover of the tuner, by means of a pulse shaper circuit.
5. A circuit as claimed in claim 1, in which the audio signal passes through a delay line whose delay time is equal to the total interference time. in which the signal value of the audio signal obtaining at the end of the delay time. at the input of the delay line, is stored by means of a sample-and-hold circuit for the period of the total interference time, in which the delay line is followed by an operational amplifier in which a resistor connected to the inverting input thereof, towards the end of the delay time, is switchably disconnected from the output of the delay line and connected to the output of the sample-and-hold circuit, and a capacitor of constant potential connected with one side to the output of the operational amplifier is switchably connected to the inverting input of the operational amplifier for the period of the total interference time, and a negative feedback resistor arranged between the output and the inverting input, is switchably disconnected for the period of the total interference time.
6. A circuit as claimed in claim 5, in which the sample-and-hold circuit consists of an
operational amplifier which, with its input, is arranged in parallel with the input of the delay line, with said operational amplifier having an electronically controllable output resitance and an adjusted voltage gain of unity, whose output is permanently connected to a capacitor, and whose output resistance is being switched from a small as possible to a high as possible value during the period of the total interference time.
7. A circuit as claimed in claim 4 or 5, in which, to the non-inverting input of the operational amplifier there is applied the mean potential of the non-delayed audio signal, and that only the alternating component of the audio signal passes through the delay line.
8. A circuit as claimed in claim 1 in which the audio signal passes through an electronic delay line operating on the charge-transfer principle. with the delay time thereof corresponding to the total interference time and the frequency of its clock signals being above the threshold of audibility; and in which between the input and the output of the delay line there is connected a voltage divider having a number of taps corresponding to the number of stages of the delay line, each tap of the voltage divider, at the end of the total interference time, being temporarily connected with respect to direct current. to a corresponding stage of the delay line.
9. A circuit as claimed in claim 8, in which there is used a resistive voltage divider. with the taps thereof, via insulated-gate field-effect transistors operated as switches, being temporarily connectible to the corresponding stages of the delay line.
10. A circuit as claimed in claim 8 or 9, in which the voltage divider, an impedance transformer at each end, is connected to both the input and the output of the delay line.
11. A circuit as claimed in any one of claims 1 to 10, in which the audio signal produced thereon is passed through a low-pass filter whose upper cut-off frequency is lower than the frequency of occurrence of switchovers of the tuner.
12. A circuit for a television receiver, substantially as described with reference to Figures 3 and 4, or Figures 5 and 6. or Figures 7 and 8. of the accompanying drawings.
13. A television receiver having a circuit as claimed in any preceding claim.
GB3836576A 1975-09-24 1976-09-16 Television receiver circuits Expired GB1558862A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752542502 DE2542502A1 (en) 1975-09-24 1975-09-24 TELEVISION RECEIVER WITH A DEVICE FOR THE SIMULTANEOUS PLAYBACK OF MULTIPLE PROGRAMS

Publications (1)

Publication Number Publication Date
GB1558862A true GB1558862A (en) 1980-01-09

Family

ID=5957232

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3836576A Expired GB1558862A (en) 1975-09-24 1976-09-16 Television receiver circuits

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DE (1) DE2542502A1 (en)
GB (1) GB1558862A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5492015A (en) * 1977-12-29 1979-07-20 Matsushita Electric Ind Co Ltd Color television image receiving unit
DE2812549A1 (en) * 1978-03-22 1979-09-27 Itt Ind Gmbh Deutsche TELEVISION RECEIVER WITH A DEVICE FOR THE SIMULTANEOUS PLAYBACK OF MULTIPLE PROGRAMS
DE3127278C1 (en) * 1981-07-10 1982-12-16 Deutsche Thomson-Brandt Gmbh, 7730 Villingen-Schwenningen NF amplifier for a television set
JPS61117986A (en) * 1984-11-13 1986-06-05 Nippon Kogaku Kk <Nikon> Reproducing device of electronic camera system
CA2184121A1 (en) * 1995-08-30 1997-03-01 John R. Reder Sampling analog video signal for secondary images
US5838385A (en) * 1996-08-30 1998-11-17 Texas Instruments Incorporated Sampling analog video signal for secondary images

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DE2542502A1 (en) 1977-04-07

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