GB1491804A - Data-processing system - Google Patents
Data-processing systemInfo
- Publication number
- GB1491804A GB1491804A GB349575A GB349575A GB1491804A GB 1491804 A GB1491804 A GB 1491804A GB 349575 A GB349575 A GB 349575A GB 349575 A GB349575 A GB 349575A GB 1491804 A GB1491804 A GB 1491804A
- Authority
- GB
- United Kingdom
- Prior art keywords
- unit
- error
- diagnosis
- members
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/2736—Tester hardware, i.e. output processing circuits using a dedicated service processor for test
Abstract
1491804 Diagnosis system COMPAGNIE INTERNATIONALE POUR L'INFORMATIQUE C11-HONEYWELL BULL 27 Jan 1975 [25 Jan 1974] 3495/75 Heading G4A In a data processing system St comprising processing units U1, U2, U3, Ut, transmitter members, e.g. member OE and receiving members, e.g. member OR, each including checking circuits CU1-CUt, COE, COR, one of the transmitting members OE includes diagnosis programs (on for example tape) for the units and members, in response to an error detected by one of the checking circuits the associated diagnosis program being fed to processing unit U2 where it is effected, one of the receiver members OR recording the result of the test on for example a display screen. If an error is detected in a processing unit, e.g. U3, means TU2 gains access to the test data and instructions forming the diagnosis program for this unit and held in a store SP in the member OE interface I tE . The unit U3 is then tested using interface I d2 , circuits ESD and interface I d3 . If check circuit CU3 in unit U3 detects an error the fault symptoms are fed to the unit TU2 via interfaces I d3 , I d2 and recorded in the member OR. If an error is detected in a transmitting/receiving member, e.g. Ot, the test information is transmitted from unit U2 via interface I d2 to unit Ut, processing in the unit Ut being interrupted if necessary so that means TU t may perform the test. Processing unit U2 may be initialized, either as a result of a command signal CD or as a result of an error signal being transmitted to unit U2 over interface It during initialization of U1. If initialization of unit U2 occurs without an error the other members of the diagnosis system OE, OR are initialized in turn and the diagnosis program for U1 is loaded and performed after which U1 is initialized before operating programs for the system St are loaded and the unit U2 and the other units are initialized again before the system St becomes operational. If an error occurs in unit U2 during initialization of the unit or during operation of the system St a self-diagnosis routine is effected. If an error in a unit other than the units U1, U2 is detected either during initialization or during use the diagnosis program for this unit is fetched and performed, after repair a signal indicating satisfactory operation of the unit being transmitted from the diagnostic system to St. If there is a fault in the accessing of the diagnosis program or in the transferring of the results of a test the diagnostic system is stopped.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7402587A FR2259397B1 (en) | 1974-01-25 | 1974-01-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1491804A true GB1491804A (en) | 1977-11-16 |
Family
ID=9134017
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB349575A Expired GB1491804A (en) | 1974-01-25 | 1975-01-27 | Data-processing system |
Country Status (2)
Country | Link |
---|---|
FR (1) | FR2259397B1 (en) |
GB (1) | GB1491804A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920482A (en) * | 1985-11-19 | 1990-04-24 | Sony Corporation | Multiple mode microprogram controller |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2549256B1 (en) * | 1983-06-22 | 1985-11-29 | Philips Ind Commerciale | AUTOMATIC METHOD AND MACHINE FOR SIMULTANEOUSLY TESTING COMPUTER SYSTEMS |
-
1974
- 1974-01-25 FR FR7402587A patent/FR2259397B1/fr not_active Expired
-
1975
- 1975-01-27 GB GB349575A patent/GB1491804A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920482A (en) * | 1985-11-19 | 1990-04-24 | Sony Corporation | Multiple mode microprogram controller |
Also Published As
Publication number | Publication date |
---|---|
FR2259397A1 (en) | 1975-08-22 |
FR2259397B1 (en) | 1977-09-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19930127 |