GB1445763A - Data storage system - Google Patents

Abstract

1445763 Storage systems HONEYWELL INFORMATION SYSTEMS Ltd 24 May 1974 [24 Feb 1973] 9186/73 Heading G4C A system for storing words comprising a data portion D and a key portion K in key order includes a shift register the key contents of at least one section of which are compared in a comparator 10 (Fig. 1) with the key contents of a word to be stored or retrieved so that a desired word may be written into or read out from the section (and if required deleted), the words stored on one or other side of the section being appropriately shifted. In the embodiment of Fig. 1, counters WC, SC register word counts and shift counts respectively. In the quiescent state the words are stored in the left hand end of section RSR of the shift register. To read out, the key of the desired word is entered into the register IOR and the whole register shifted left with incrementing of counter SC until comparator 10 indicates equality between the key of the desired word and the key of the word in section MSR, the data portion D of that word then being transferred to register IOR. The register is then shifted right until shift counter SC is decremented to zero. To delete a word, after read out sections LSR and MSR are first shifted right by one word, (both counters SC and WC being appropriately decremented) so that the contents of section MSR are lost, the whole shift register then shifted right. To write, the register is shifted left until comparator 10 indicates equality or until the key contents of the section MSR exceeds the contents of IOR. Sections LSR and MSR are then stepped left by one word (with incrementing of word counter and shift counter) and the word is written in. In a second embodiment (Fig. 2, not shown) which necessitates less total storage space a closed loop uni-directional shift register is used each register section being of one word width rather than one bit width (i.e. data is shifted, serially by word, parallel by bit). Read in and read out may be performed at either of two positions of the register each controlled by a respective comparator. Head and tail counters store the addresses of the beginning and end of the sequence of stored words, the difference in their counts being monitored to prevent system overload. The shift register may be formed of flip-flops or components requiring periodic refresh cycles. The system may be modified to cope with variable length records in which case a control shift register is included for each stage containing information concerning the nature of the byte in the corresponding stage of the main shift register.