GB1366472A - Phasesynchronising device - Google Patents

Phasesynchronising device

Info

Publication number
GB1366472A
GB1366472A GB101473A GB101473A GB1366472A GB 1366472 A GB1366472 A GB 1366472A GB 101473 A GB101473 A GB 101473A GB 101473 A GB101473 A GB 101473A GB 1366472 A GB1366472 A GB 1366472A
Authority
GB
United Kingdom
Prior art keywords
control circuit
inputs
signal
gates
jan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB101473A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of GB1366472A publication Critical patent/GB1366472A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Shift Register Type Memory (AREA)

Abstract

1366472 Counting apparatus THOMSON-CSF 8 Jan 1973 [11 Jan 1972] 1014/73 Heading G4A [Also in Division H3] A shift register shown in block form as 2 comprises n bi-stable trigger stages having their respective outputs coupled to the following stage input via n AND gates which receive at the other inputs a first signal derived from a control circuit 51-58. The bi-stable outputs are also coupled back to their respective inputs via further n AND gates which receive at the other inputs a second signal from the control circuit. The control circuit also applies clock pulses to each of the bi-stables. Thus in response to the first or second control signal, a non-zero bit is transferred either forward or backward. Further the output is coupled back to the input. The shift register is used in a digital data synchronizing system (see also Division H3).
GB101473A 1972-01-11 1973-01-08 Phasesynchronising device Expired GB1366472A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7200790A FR2167259B1 (en) 1972-01-11 1972-01-11

Publications (1)

Publication Number Publication Date
GB1366472A true GB1366472A (en) 1974-09-11

Family

ID=9091714

Family Applications (1)

Application Number Title Priority Date Filing Date
GB101473A Expired GB1366472A (en) 1972-01-11 1973-01-08 Phasesynchronising device

Country Status (4)

Country Link
FR (1) FR2167259B1 (en)
GB (1) GB1366472A (en)
IT (1) IT980399B (en)
NL (1) NL162521C (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2129658A (en) * 1982-11-09 1984-05-16 Tokyo Shibaura Electric Co Sampling pulse generator
GB2151421A (en) * 1983-12-12 1985-07-17 Ates Componenti Elettron Phase synchronizer of digital kind for signals at the same frequency, particularly for signal demodulator
US4594516A (en) * 1982-07-30 1986-06-10 Tokyo Shibaura Denki Kabushiki Kaisha Sampling pulse generator
DE3635429A1 (en) * 1986-10-17 1988-04-21 Siemens Ag Phase-locked loop
US5521499A (en) * 1992-12-23 1996-05-28 Comstream Corporation Signal controlled phase shifter

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2479620B1 (en) * 1980-03-28 1988-01-08 Thomson Csf DEVICE FOR SYNCHRONIZING PACKET TRANSMITTED DIGITAL INFORMATION AND RECEIVER COMPRISING SUCH A DEVICE
US4617679A (en) * 1983-09-20 1986-10-14 Nec Electronics U.S.A., Inc. Digital phase lock loop circuit
EP0389697B1 (en) * 1989-03-29 1994-11-02 International Business Machines Corporation Serial data receiver
HUT76457A (en) * 1992-12-23 1997-09-29 Comstream Corp Signal-controlled phase shifter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3024417A (en) * 1960-01-07 1962-03-06 Collins Radio Co Proportional digital synchronizer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4594516A (en) * 1982-07-30 1986-06-10 Tokyo Shibaura Denki Kabushiki Kaisha Sampling pulse generator
GB2129658A (en) * 1982-11-09 1984-05-16 Tokyo Shibaura Electric Co Sampling pulse generator
US4600943A (en) * 1982-11-09 1986-07-15 Tokyo Shibaura Denki Kabushiki Kaisha Sampling pulse generator
GB2151421A (en) * 1983-12-12 1985-07-17 Ates Componenti Elettron Phase synchronizer of digital kind for signals at the same frequency, particularly for signal demodulator
DE3635429A1 (en) * 1986-10-17 1988-04-21 Siemens Ag Phase-locked loop
US5521499A (en) * 1992-12-23 1996-05-28 Comstream Corporation Signal controlled phase shifter

Also Published As

Publication number Publication date
FR2167259A1 (en) 1973-08-24
NL7300289A (en) 1973-07-13
IT980399B (en) 1974-09-30
NL162521C (en) 1980-05-16
DE2301315A1 (en) 1973-07-12
FR2167259B1 (en) 1976-06-11
NL162521B (en) 1979-12-17
DE2301315B2 (en) 1975-12-18

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
746 Register noted 'licences of right' (sect. 46/1977)
PCNP Patent ceased through non-payment of renewal fee