GB1259867A - Transistor structures for integrated circuits and method of making the same - Google Patents
Transistor structures for integrated circuits and method of making the sameInfo
- Publication number
- GB1259867A GB1259867A GB1325569A GB1325569A GB1259867A GB 1259867 A GB1259867 A GB 1259867A GB 1325569 A GB1325569 A GB 1325569A GB 1325569 A GB1325569 A GB 1325569A GB 1259867 A GB1259867 A GB 1259867A
- Authority
- GB
- United Kingdom
- Prior art keywords
- region
- collector
- type
- wall
- phosphorus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
Abstract
1,259,867. Semi-conductor devices. WESTINGHOUSE ELECTRIC CORP. 13 March, 1969 [13 March, 1968], No. 13255/69. Addition to 1,041,681. Heading H1K. In a device of the type described and claimed in Specification 1,041,681 in which a transistor is provided with a sub-collector layer contacted by a high conductivity wall, the impurity concentration in at least part of the wall increases with increasing distance from the surface. This is said to reduce the effect of collector wall diffusion in unwanted locations on the collector breakdown voltage. The device is produced by diffusing arsenic into a P-type silicon substrate 10 to form subcollector region 12 and diffusing phosphorus, which is a fast diffusing impurity, round the edge of the region 12 to form a heavily doped region (14) at the site of the high conductivity wall. The surface is cleaned by etching and an N-type epitaxial layer 16 is deposited, the phosphorus partly out diffusing into the layer. Boron is diffused-in to form a P + type isolation region 28 and the phosphorus diffuses further towards the surface to form the N + type collector wall 24. A P-type base region 20 is then formed by diffusion of boron, and emitter region 22 and collector contact region 32 are formed by diffusion of phosphorus. Silicon dioxide diffusion masks and passivation layer 26 are utilized and contacts 34 to the various regions are formed by aluminium metallization. Reference has been directed by the Comptroller to Specification 1,047,388.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB11548/65A GB1041681A (en) | 1964-03-20 | 1965-03-18 | Switching transistor structure and method of making same |
US71267868A | 1968-03-13 | 1968-03-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1259867A true GB1259867A (en) | 1972-01-12 |
Family
ID=24863092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1325569A Expired GB1259867A (en) | 1965-03-18 | 1969-03-13 | Transistor structures for integrated circuits and method of making the same |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1259867A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2156583A (en) * | 1984-03-16 | 1985-10-09 | Hitachi Ltd | Process for producing semiconductor device |
-
1969
- 1969-03-13 GB GB1325569A patent/GB1259867A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2156583A (en) * | 1984-03-16 | 1985-10-09 | Hitachi Ltd | Process for producing semiconductor device |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |