GB1256789A - - Google Patents

Abstract

1,256,789. Valve amplifying circuits; automatic gain control; colour television receiver. RCA CORPORATION. 9 May, 1969 [13 May, 1968], No. 23721/69. Headings H3Q, H3W and H4F. In a colour television receiver the output of I.F. amplifier 12 is applied to diode detector 14, shunt capacitor removing undesired frequency components such as adjacent channel sound carrier. The output from detector 14, in which the sync. pulses comprise the most positive components, is fed to a first video amplifier 20 via a filtering and impedance matching network comprising capacitor 41 removing I.F. carrier, inductors 42, 43, bridged-T network 44, 45, 48 removing intercarrier sound, and a top-peaking network comprising inductor 46 shunted by damping resistor 47. The cathode circuit of the first video amplifier 20 comprises bias resistor 50 shunted by a mid-frequency compensating network 51<SP>1</SP>, 52 and also a top-peaking capacitor 53. The anode circuit includes a top-peaking circuit comprising inductor 55 and damping resistor 56 and feeds A.C. components of the signal to the grid of the second video frequency amplifier 21 via capacitor 66. The circuit includes series resistors 57, 58 shunted by a mid-frequency compensating circuit 60, 61 and a high frequency correction capacitor 59, and also a top-peaking circuit comprising resistor 62 and inductor 65 shunted by the series R.C. network 63, 64. D.C. components of the signal are fed to the grid of the valve 21 via the potentiometer network 57, 58, 62, series resistor 96, a potentiometer 74 used for adjusting the A.G.C. and series resistor 73, the potentiometer 74 being returned to a negative voltage source via resistor 95. The anode circuit of the second video frequency amplifier 21 comprises a resistor 21 and feeds the grid of a gated A.G.C. valve 120, sync. separator 30 and chrominance amplifier 26. The cathode circuit comprises a biasing network formed by resistor 68 and resistor 69 connected to a positive voltage source and feeds luminance signals to the grid of a third video frequency amplifier 23 via delay line 71 terminated by resistor 76 in series with inductor 77. The circuit also includes capacitor 99 and a top-peaking circuit 81, 82, the valve 23 obtains a bias over an adjustable potentiometer 78 comprising the brightness control. The cathode circuit of valve 23 comprises a bias resistor 89 shunted by a midfrequency correction circuit 88, 91; resistor 89 comprises an adjustable potentiometer with a capacitor 90 between the tap and earth and forms the contrast control. The anode circuit comprises top-peaking inductor 140 shunted by damping resistor 85 and also a further resistor 87 and inductor 86, the inductors 86, 140 being mutually coupled; it feeds luminance signals to the picture tube 25. Blanking circuit 34 fed from the deflection circuits 31 feeds blanking pulses to the anode of diode 38, which is normally biased conductive via resistor 79, during the retrace periods. The A.G.C. valve 120 is provided with a cathode cut-off bias via resistors 123, 126, 127 and is driven conductive by pulses fed to its anode from the deflection circuits 31 via capacitor 124, and providesan A.G.C. bias for the I.F. amplifier and tuner stages of the receiver 12, 11 respectively.