GB1226125A - - Google Patents

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Publication number
GB1226125A
GB1226125A GB1226125DA GB1226125A GB 1226125 A GB1226125 A GB 1226125A GB 1226125D A GB1226125D A GB 1226125DA GB 1226125 A GB1226125 A GB 1226125A
Authority
GB
United Kingdom
Prior art keywords
instruction
arithmetic unit
processing unit
unit
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1226125A publication Critical patent/GB1226125A/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)

Abstract

1,226,125. Data processing. GENERAL ELECTRIC CO. 11 July, 1968 [14 July, 1967], No. 33070/68. Heading G4A. A data processing system comprises a processing unit which fetches instruction and operand words from memory and if appropriate sends them to an arithmetic unit (e.g. floating point), execution of an instruction by the arithmetic unit being overlapped with a further instruction fetch and performance by the processing unit of any address modifications required by the further instruction, the state of the arithmetic unit being tested by the processing unit on completion of the address modifications to cause the processing unit to wait or proceed according to the result of the test. The processing unit, which includes an adder and instruction decoder, proceeds (sending the instruction and operand words to the arithmetic unit if appropriate) when the arithmetic unit is no longer busy on the previous instruction, but only after performing an interrupt subroutine if a signal from the arithmetic unit indicates an attempt to divide by zero or an exponent result exceeding its limits (positively or negatively). The floating-point arithmetic unit includes an adder having exponent and mantissa portions, an instruction decoder, uses a control count to terminate operations, and is also capable of fixed-point operations. It specifies to the processing unit the number of operands to be accessed for the current instruction.
GB1226125D 1967-07-14 1968-07-11 Expired GB1226125A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65349267A 1967-07-14 1967-07-14

Publications (1)

Publication Number Publication Date
GB1226125A true GB1226125A (en) 1971-03-24

Family

ID=24621101

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1226125D Expired GB1226125A (en) 1967-07-14 1968-07-11

Country Status (2)

Country Link
FR (1) FR1603145A (en)
GB (1) GB1226125A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2305786A1 (en) * 1975-03-26 1976-10-22 Honeywell Inf Systems ADVANCED ENTRY INSTRUCTION WITH PRE-EXTRACTED SIMULTANEOUS EXECUTION AND PIPE-LINE ARRANGEMENTS
FR2389175A1 (en) * 1977-04-28 1978-11-24 Ibm DATA PROCESSING SYSTEM INCLUDING AN AUXILIARY PROCESSOR

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2305786A1 (en) * 1975-03-26 1976-10-22 Honeywell Inf Systems ADVANCED ENTRY INSTRUCTION WITH PRE-EXTRACTED SIMULTANEOUS EXECUTION AND PIPE-LINE ARRANGEMENTS
FR2389175A1 (en) * 1977-04-28 1978-11-24 Ibm DATA PROCESSING SYSTEM INCLUDING AN AUXILIARY PROCESSOR

Also Published As

Publication number Publication date
FR1603145A (en) 1971-03-22

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Legal Events

Date Code Title Description
CSNS Application of which complete specification have been accepted and published, but patent is not sealed