GB1220088A - Improvements in or relating to digital computing and information processing machine and system - Google Patents
Improvements in or relating to digital computing and information processing machine and systemInfo
- Publication number
- GB1220088A GB1220088A GB5892967A GB5892967A GB1220088A GB 1220088 A GB1220088 A GB 1220088A GB 5892967 A GB5892967 A GB 5892967A GB 5892967 A GB5892967 A GB 5892967A GB 1220088 A GB1220088 A GB 1220088A
- Authority
- GB
- United Kingdom
- Prior art keywords
- pulse
- state
- relating
- information processing
- processing machine
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
Abstract
1,220,088. Logic circuits: circui's employing bi-stable magnetic elements and cryotrons. J. H. CASE and N. C. STEWART 28 Dec., 1967 [29 Dec., 1966], No. 58929/67 Headings H3B and H3T. [Also in Division G4] Figs. 3, 5, 6 show respectively magnetic core (or thin films may be used), cryotron, and transistor versions of a circuit which is set into a first or second state by a pulse at α 1 or α 2 respectively. When in the first state, any pulse at A 1 will be passed to B 1 but any pulse at A 2 will be blocked, whereas when in the second state, any pulse at A 2 will be passed to B 2 but any pulse at A 1 will be blocked. Power (clock) pulses are provided at the inputs P as shown. For greater fan-in, fan-out, a circuit with the above properties can be constructed from a plurality of the above circuits, most of which have A 1 and A 2 connected together and B 1 and B 2 connected together to form an isolation and delay circuit (Fig. 2c, not shown).
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US60575766A | 1966-12-29 | 1966-12-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1220088A true GB1220088A (en) | 1971-01-20 |
Family
ID=24425091
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB4516370A Expired GB1220089A (en) | 1966-12-29 | 1967-12-28 | Improvements in or relating to digital computing and information processing machine and system |
| GB5892967A Expired GB1220088A (en) | 1966-12-29 | 1967-12-28 | Improvements in or relating to digital computing and information processing machine and system |
| GB4516470A Expired GB1220090A (en) | 1966-12-29 | 1967-12-28 | Improvements in or relating to digital computing and information processing machine and system |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB4516370A Expired GB1220089A (en) | 1966-12-29 | 1967-12-28 | Improvements in or relating to digital computing and information processing machine and system |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB4516470A Expired GB1220090A (en) | 1966-12-29 | 1967-12-28 | Improvements in or relating to digital computing and information processing machine and system |
Country Status (4)
| Country | Link |
|---|---|
| CA (1) | CA941511A (en) |
| DE (1) | DE1574997A1 (en) |
| FR (1) | FR1561999A (en) |
| GB (3) | GB1220089A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2412647A1 (en) * | 1973-04-17 | 1974-10-24 | Kenan E Sahin | INFORMATION EXCHANGE PROCEDURE AND NETWORK SYSTEM |
| DE3049437A1 (en) * | 1979-12-31 | 1981-09-24 | Goodyear Aerospace Corp., Akron, Ohio | MATRIX ARRANGEMENT OF A VARIETY OF PROCESSING ELEMENTS FOR PARALLEL PROCESSORS |
| GB2129589A (en) * | 1982-11-08 | 1984-05-16 | Nat Res Dev | Array processor cell |
| GB2178572A (en) * | 1985-07-09 | 1987-02-11 | Nat Res Dev | A processor array |
-
1967
- 1967-12-28 GB GB4516370A patent/GB1220089A/en not_active Expired
- 1967-12-28 CA CA008,653A patent/CA941511A/en not_active Expired
- 1967-12-28 FR FR1561999D patent/FR1561999A/fr not_active Expired
- 1967-12-28 GB GB5892967A patent/GB1220088A/en not_active Expired
- 1967-12-28 DE DE19671574997 patent/DE1574997A1/en active Pending
- 1967-12-28 GB GB4516470A patent/GB1220090A/en not_active Expired
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2412647A1 (en) * | 1973-04-17 | 1974-10-24 | Kenan E Sahin | INFORMATION EXCHANGE PROCEDURE AND NETWORK SYSTEM |
| DE3049437A1 (en) * | 1979-12-31 | 1981-09-24 | Goodyear Aerospace Corp., Akron, Ohio | MATRIX ARRANGEMENT OF A VARIETY OF PROCESSING ELEMENTS FOR PARALLEL PROCESSORS |
| GB2129589A (en) * | 1982-11-08 | 1984-05-16 | Nat Res Dev | Array processor cell |
| GB2178572A (en) * | 1985-07-09 | 1987-02-11 | Nat Res Dev | A processor array |
Also Published As
| Publication number | Publication date |
|---|---|
| FR1561999A (en) | 1969-04-04 |
| CA941511A (en) | 1974-02-05 |
| GB1220090A (en) | 1971-01-20 |
| GB1220089A (en) | 1971-01-20 |
| DE1574997A1 (en) | 1971-07-22 |
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