GB0710989D0 - Cryptographic systems for encrypting input data using an address associated with the input data, Error detection circuits, and methods of operating the same - Google Patents
Cryptographic systems for encrypting input data using an address associated with the input data, Error detection circuits, and methods of operating the sameInfo
- Publication number
- GB0710989D0 GB0710989D0 GBGB0710989.5A GB0710989A GB0710989D0 GB 0710989 D0 GB0710989 D0 GB 0710989D0 GB 0710989 A GB0710989 A GB 0710989A GB 0710989 D0 GB0710989 D0 GB 0710989D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- input data
- operating
- methods
- error detection
- same
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
-
- H04L9/0612—
-
- H04L9/0675—
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/04—Masking or blinding
- H04L2209/046—Masking or blinding of operations, operands or results of the operations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/24—Key scheduling, i.e. generating round keys or sub-keys for block encryption
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Storage Device Security (AREA)
- Quality & Reliability (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1006763A GB2468419B (en) | 2006-06-07 | 2007-06-07 | Cyrptographic systems for encrypting input data, error detection circuits, and methods of operating the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060051033A KR100837270B1 (en) | 2006-06-07 | 2006-06-07 | Smart card and data security method thereof |
US11/785,281 US8332634B2 (en) | 2006-06-07 | 2007-04-16 | Cryptographic systems for encrypting input data using an address associated with the input data, error detection circuits, and methods of operating the same |
Publications (3)
Publication Number | Publication Date |
---|---|
GB0710989D0 true GB0710989D0 (en) | 2007-07-18 |
GB2438972A GB2438972A (en) | 2007-12-12 |
GB2438972B GB2438972B (en) | 2011-01-12 |
Family
ID=38318938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0710989A Active GB2438972B (en) | 2006-06-07 | 2007-06-07 | Cryptographic systems for encrypting input data using an address associated with the input data and methods of operating the same |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2007328789A (en) |
DE (1) | DE102007026977B4 (en) |
FR (2) | FR2902252A1 (en) |
GB (1) | GB2438972B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113518988A (en) * | 2019-03-05 | 2021-10-19 | 密码研究公司 | Side channel attack resistant memory access on embedded central processing unit |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101685633B1 (en) | 2009-01-05 | 2016-12-12 | 삼성전자주식회사 | Memory system |
EP2413305B1 (en) * | 2009-03-23 | 2019-06-26 | Fujitsu Limited | Data processing device and data processing method |
DE102011107104B4 (en) * | 2011-07-12 | 2020-11-12 | Giesecke+Devrient Mobile Security Gmbh | Portable security module and method for its operation to defend against an attack in real time using pattern recognition |
US9269418B2 (en) | 2012-02-06 | 2016-02-23 | Arm Limited | Apparatus and method for controlling refreshing of data in a DRAM |
FR3019349A1 (en) * | 2014-03-31 | 2015-10-02 | Orange | METHOD AND MODULE FOR TRANSFORMING A MEMORY ADDRESS |
WO2021041793A2 (en) * | 2019-08-29 | 2021-03-04 | Carnegie Mellon University | Method for securing logic circuits |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4168396A (en) * | 1977-10-31 | 1979-09-18 | Best Robert M | Microprocessor for executing enciphered programs |
US6061449A (en) * | 1997-10-10 | 2000-05-09 | General Instrument Corporation | Secure processor with external memory using block chaining and block re-ordering |
DE10115118A1 (en) * | 2001-03-27 | 2002-10-10 | Philips Corp Intellectual Pty | Method for the transmission of data via a data bus |
ATE494692T1 (en) * | 2001-10-03 | 2011-01-15 | Nxp Bv | METHOD AND SYSTEM FOR MEMORY ENCRYPTION |
FR2838892A1 (en) * | 2002-04-23 | 2003-10-24 | Scm Microsystems Gmbh | Method and device for encrypting digital data |
DE10345378B4 (en) * | 2003-09-30 | 2010-08-12 | Infineon Technologies Ag | Method and device for encryption / decryption |
EP1578053A1 (en) * | 2004-03-18 | 2005-09-21 | STMicroelectronics Limited | Data obfuscation |
EP1617586B1 (en) * | 2004-07-06 | 2008-09-03 | Proton World International N.V. | Stream ciphering of the content of a memory which is external to a processor |
-
2007
- 2007-06-05 DE DE102007026977A patent/DE102007026977B4/en active Active
- 2007-06-07 FR FR0755535A patent/FR2902252A1/en not_active Withdrawn
- 2007-06-07 JP JP2007151965A patent/JP2007328789A/en active Pending
- 2007-06-07 GB GB0710989A patent/GB2438972B/en active Active
- 2007-11-06 FR FR0707792A patent/FR2906665A1/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113518988A (en) * | 2019-03-05 | 2021-10-19 | 密码研究公司 | Side channel attack resistant memory access on embedded central processing unit |
Also Published As
Publication number | Publication date |
---|---|
JP2007328789A (en) | 2007-12-20 |
FR2902252A1 (en) | 2007-12-14 |
DE102007026977B4 (en) | 2012-03-08 |
FR2906665A1 (en) | 2008-04-04 |
GB2438972B (en) | 2011-01-12 |
GB2438972A (en) | 2007-12-12 |
DE102007026977A1 (en) | 2008-01-24 |
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