GB0607209D0 - No title - Google Patents
No titleInfo
- Publication number
- GB0607209D0 GB0607209D0 GBGB0607209.4A GB0607209A GB0607209D0 GB 0607209 D0 GB0607209 D0 GB 0607209D0 GB 0607209 A GB0607209 A GB 0607209A GB 0607209 D0 GB0607209 D0 GB 0607209D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- title
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/355—Indexed addressing
- G06F9/3552—Indexed addressing using wraparound, e.g. modulo or circular addressing
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2005/028773 WO2006073512A1 (en) | 2005-08-11 | 2005-08-11 | Microprocessor instruction to enable access of a virtual buffer in circular fashion |
Publications (1)
Publication Number | Publication Date |
---|---|
GB0607209D0 true GB0607209D0 (en) | 2006-05-17 |
Family
ID=35636767
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GBGB0607209.4A Ceased GB0607209D0 (en) | 2005-08-11 | 2006-04-10 | No title |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1709527A1 (en) |
GB (1) | GB0607209D0 (en) |
WO (1) | WO2006073512A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10817802B2 (en) * | 2016-05-07 | 2020-10-27 | Intel Corporation | Apparatus for hardware accelerated machine learning |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0992880A1 (en) * | 1998-10-06 | 2000-04-12 | Texas Instruments Inc. | Circular buffer management |
EP1039370B1 (en) * | 1999-03-19 | 2005-10-26 | Freescale Semiconductor, Inc. | Modulo address generator and a method for implementing modulo addressing |
US6782447B2 (en) | 1999-12-17 | 2004-08-24 | Koninklijke Philips Electronics N.V. | Circular address register |
US20030061464A1 (en) * | 2001-06-01 | 2003-03-27 | Catherwood Michael I. | Digital signal controller instruction set and architecture |
-
2005
- 2005-08-11 WO PCT/US2005/028773 patent/WO2006073512A1/en active Application Filing
- 2005-08-11 EP EP05789271A patent/EP1709527A1/en not_active Ceased
-
2006
- 2006-04-10 GB GBGB0607209.4A patent/GB0607209D0/en not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
EP1709527A1 (en) | 2006-10-11 |
WO2006073512A1 (en) | 2006-07-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
AT | Applications terminated before publication under section 16(1) |