FR3105484B1 - METHOD OF DYNAMIC VERIFICATION OF THE INTEGRITY OF A MACHINE CODE - Google Patents

METHOD OF DYNAMIC VERIFICATION OF THE INTEGRITY OF A MACHINE CODE Download PDF

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Publication number
FR3105484B1
FR3105484B1 FR1914987A FR1914987A FR3105484B1 FR 3105484 B1 FR3105484 B1 FR 3105484B1 FR 1914987 A FR1914987 A FR 1914987A FR 1914987 A FR1914987 A FR 1914987A FR 3105484 B1 FR3105484 B1 FR 3105484B1
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FR
France
Prior art keywords
integrity
authentication code
code
machine code
dynamic verification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1914987A
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French (fr)
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FR3105484A1 (en
Inventor
Aymen Boudguiga
Jerome Letailleur
Renaud Sirdey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1914987A priority Critical patent/FR3105484B1/en
Publication of FR3105484A1 publication Critical patent/FR3105484A1/en
Application granted granted Critical
Publication of FR3105484B1 publication Critical patent/FR3105484B1/en
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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/3234—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials involving additional secure or trusted devices, e.g. TPM, smartcard, USB or software token
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/3236—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using cryptographic hash functions

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

La présente invention concerne une méthode de vérification de l’intégrité d’un code binaire, comprenant une pluralité de processus destinés à être exécutés par un processeur après lancement d’un système d’exploitation. Après une procédure de boot sécurisée (210), un premier calcul (220, 260) d’un code d’authentification de référence est effectué pour chaque page mémoire de texte relative à un processus, dès que le code a été chargé dans la RAM. Ultérieurement et/ou périodiquement un second calcul (230, 270) d’un code d’authentification est effectué pour chacune de ces pages mémoire. En cas de de désaccord entre le code d’authentification d’une page et de son code d’authentification de référence, une alerte est générée (290). Figure pour l'abrégé: Fig. 2The present invention relates to a method of verifying the integrity of a binary code, comprising a plurality of processes intended to be executed by a processor after launching an operating system. After a secure boot procedure (210), a first calculation (220, 260) of a reference authentication code is performed for each text memory page relating to a process, as soon as the code has been loaded into the RAM . Subsequently and / or periodically a second calculation (230, 270) of an authentication code is performed for each of these memory pages. If there is a disagreement between a page's authentication code and its reference authentication code, an alert is generated (290). Figure for the abstract: Fig. 2

FR1914987A 2019-12-19 2019-12-19 METHOD OF DYNAMIC VERIFICATION OF THE INTEGRITY OF A MACHINE CODE Active FR3105484B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR1914987A FR3105484B1 (en) 2019-12-19 2019-12-19 METHOD OF DYNAMIC VERIFICATION OF THE INTEGRITY OF A MACHINE CODE

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1914987A FR3105484B1 (en) 2019-12-19 2019-12-19 METHOD OF DYNAMIC VERIFICATION OF THE INTEGRITY OF A MACHINE CODE
FR1914987 2019-12-19

Publications (2)

Publication Number Publication Date
FR3105484A1 FR3105484A1 (en) 2021-06-25
FR3105484B1 true FR3105484B1 (en) 2021-12-10

Family

ID=70613966

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1914987A Active FR3105484B1 (en) 2019-12-19 2019-12-19 METHOD OF DYNAMIC VERIFICATION OF THE INTEGRITY OF A MACHINE CODE

Country Status (1)

Country Link
FR (1) FR3105484B1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5937063A (en) 1996-09-30 1999-08-10 Intel Corporation Secure boot
US10089498B2 (en) * 2013-10-31 2018-10-02 Hewlett Packard Enterprise Development Lp Memory integrity checking
EP3026560A1 (en) * 2014-11-28 2016-06-01 Thomson Licensing Method and device for providing verifying application integrity
FR3076014B1 (en) * 2017-12-26 2020-09-25 Ledger INTEGRITY CHECK OF AN ELECTRONIC DEVICE

Also Published As

Publication number Publication date
FR3105484A1 (en) 2021-06-25

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