FR2861474B1 - Procede et appareil pour une periode de traitement variable dans un circuit integre - Google Patents

Procede et appareil pour une periode de traitement variable dans un circuit integre

Info

Publication number
FR2861474B1
FR2861474B1 FR0312485A FR0312485A FR2861474B1 FR 2861474 B1 FR2861474 B1 FR 2861474B1 FR 0312485 A FR0312485 A FR 0312485A FR 0312485 A FR0312485 A FR 0312485A FR 2861474 B1 FR2861474 B1 FR 2861474B1
Authority
FR
France
Prior art keywords
integrated circuit
processing period
variable processing
variable
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0312485A
Other languages
English (en)
Other versions
FR2861474A1 (fr
Inventor
Alain Vergnes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Priority to FR0312485A priority Critical patent/FR2861474B1/fr
Priority to US10/861,682 priority patent/US7661011B2/en
Priority to CNA200480030732XA priority patent/CN1894913A/zh
Priority to EP04795572A priority patent/EP1676192A4/fr
Priority to PCT/US2004/034429 priority patent/WO2005043299A2/fr
Priority to TW093132274A priority patent/TW200527300A/zh
Publication of FR2861474A1 publication Critical patent/FR2861474A1/fr
Application granted granted Critical
Publication of FR2861474B1 publication Critical patent/FR2861474B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
FR0312485A 2003-10-24 2003-10-24 Procede et appareil pour une periode de traitement variable dans un circuit integre Expired - Fee Related FR2861474B1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR0312485A FR2861474B1 (fr) 2003-10-24 2003-10-24 Procede et appareil pour une periode de traitement variable dans un circuit integre
US10/861,682 US7661011B2 (en) 2003-10-24 2004-06-04 Method and apparatus for a variable processing period in an integrated circuit
CNA200480030732XA CN1894913A (zh) 2003-10-24 2004-10-15 在集成电路中用于可变处理周期的方法及装置
EP04795572A EP1676192A4 (fr) 2003-10-24 2004-10-15 Procede et appareil a periode de traitement variable dans un circuit integre
PCT/US2004/034429 WO2005043299A2 (fr) 2003-10-24 2004-10-15 Procede et appareil a periode de traitement variable dans un circuit integre
TW093132274A TW200527300A (en) 2003-10-24 2004-10-22 Method and apparatus for a variable processing period in an integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0312485A FR2861474B1 (fr) 2003-10-24 2003-10-24 Procede et appareil pour une periode de traitement variable dans un circuit integre

Publications (2)

Publication Number Publication Date
FR2861474A1 FR2861474A1 (fr) 2005-04-29
FR2861474B1 true FR2861474B1 (fr) 2007-04-27

Family

ID=34400779

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0312485A Expired - Fee Related FR2861474B1 (fr) 2003-10-24 2003-10-24 Procede et appareil pour une periode de traitement variable dans un circuit integre

Country Status (4)

Country Link
US (1) US7661011B2 (fr)
CN (1) CN1894913A (fr)
FR (1) FR2861474B1 (fr)
TW (1) TW200527300A (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005073825A2 (fr) * 2004-01-27 2005-08-11 Koninklijke Philips Electronics N.V. Protection contre les attaques par analyse de puissance
EP1742475A1 (fr) * 2005-07-07 2007-01-10 Nagravision S.A. Méthode de contrôle d'accès à des données chiffrées
US7433262B2 (en) * 2006-08-22 2008-10-07 Atmel Corporation Circuits to delay a signal from DDR-SDRAM memory device including an automatic phase error correction
US7539078B2 (en) * 2006-08-22 2009-05-26 Atmel Corporation Circuits to delay a signal from a memory device
CN107844672B (zh) * 2017-12-06 2023-11-28 西安智多晶微电子有限公司 时钟树单元、时钟网络结构及fpga时钟结构

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5404402A (en) 1993-12-21 1995-04-04 Gi Corporation Clock frequency modulation for secure microprocessors
US5533123A (en) 1994-06-28 1996-07-02 National Semiconductor Corporation Programmable distributed personal security
US7587044B2 (en) * 1998-01-02 2009-09-08 Cryptography Research, Inc. Differential power analysis method and apparatus
US6327661B1 (en) 1998-06-03 2001-12-04 Cryptography Research, Inc. Using unpredictable information to minimize leakage from smartcards and other cryptosystems
CN1320246A (zh) * 1998-07-29 2001-10-31 因芬尼昂技术股份公司 受时钟信号控制的集成半导体电路和使其工作的方法
US6419159B1 (en) 1999-06-14 2002-07-16 Microsoft Corporation Integrated circuit device with power analysis protection circuitry
DE59914370D1 (de) 1999-11-03 2007-07-19 Infineon Technologies Ag Kodiervorrichtung
GB2365153A (en) 2000-01-28 2002-02-13 Simon William Moore Microprocessor resistant to power analysis with an alarm state
US7080238B2 (en) 2000-11-07 2006-07-18 Alcatel Internetworking, (Pe), Inc. Non-blocking, multi-context pipelined processor
US7360076B2 (en) * 2001-06-13 2008-04-15 Itt Manufacturing Enterprises, Inc. Security association data cache and structure
JP2003018143A (ja) 2001-06-28 2003-01-17 Mitsubishi Electric Corp 情報処理装置
US20030043800A1 (en) 2001-08-30 2003-03-06 Sonksen Bradley Stephen Dynamic data item processing
US6978446B2 (en) 2001-11-01 2005-12-20 International Business Machines Corporation System and method for protecting against leakage of sensitive information from compromising electromagnetic emanations from computing systems
US7020826B2 (en) * 2002-01-23 2006-03-28 Thomson Licensing Intra-decoder component block messaging

Also Published As

Publication number Publication date
US20050089060A1 (en) 2005-04-28
FR2861474A1 (fr) 2005-04-29
US7661011B2 (en) 2010-02-09
CN1894913A (zh) 2007-01-10
TW200527300A (en) 2005-08-16

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20120629