FR2838581B1 - METHOD FOR ENCODING AND / OR DECODING CORRECTIVE ERROR CODES, DEVICES AND SIGNAL THEREOF - Google Patents
METHOD FOR ENCODING AND / OR DECODING CORRECTIVE ERROR CODES, DEVICES AND SIGNAL THEREOFInfo
- Publication number
- FR2838581B1 FR2838581B1 FR0204764A FR0204764A FR2838581B1 FR 2838581 B1 FR2838581 B1 FR 2838581B1 FR 0204764 A FR0204764 A FR 0204764A FR 0204764 A FR0204764 A FR 0204764A FR 2838581 B1 FR2838581 B1 FR 2838581B1
- Authority
- FR
- France
- Prior art keywords
- decoding
- encoding
- devices
- signal
- error codes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2771—Internal interleaver for turbo codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6566—Implementations concerning memory access contentions
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B2020/10935—Digital recording or reproducing wherein a time constraint must be met
- G11B2020/10944—Real-time recording or reproducing, e.g. for ensuring seamless playback of AV data
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0204764A FR2838581B1 (en) | 2002-04-16 | 2002-04-16 | METHOD FOR ENCODING AND / OR DECODING CORRECTIVE ERROR CODES, DEVICES AND SIGNAL THEREOF |
AU2003246832A AU2003246832A1 (en) | 2002-04-16 | 2003-04-14 | Method for coding and/or decoding error correcting codes, and corresponding devices and signal |
PCT/FR2003/001188 WO2003088504A1 (en) | 2002-04-16 | 2003-04-14 | Method for coding and/or decoding error correcting codes, and corresponding devices and signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0204764A FR2838581B1 (en) | 2002-04-16 | 2002-04-16 | METHOD FOR ENCODING AND / OR DECODING CORRECTIVE ERROR CODES, DEVICES AND SIGNAL THEREOF |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2838581A1 FR2838581A1 (en) | 2003-10-17 |
FR2838581B1 true FR2838581B1 (en) | 2005-07-08 |
Family
ID=28459899
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0204764A Expired - Fee Related FR2838581B1 (en) | 2002-04-16 | 2002-04-16 | METHOD FOR ENCODING AND / OR DECODING CORRECTIVE ERROR CODES, DEVICES AND SIGNAL THEREOF |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU2003246832A1 (en) |
FR (1) | FR2838581B1 (en) |
WO (1) | WO2003088504A1 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1525664B9 (en) | 2002-07-03 | 2015-09-02 | Dtvg Licensing, Inc | Method and system for memory management in low density parity check (ldpc) decoders |
US7020829B2 (en) | 2002-07-03 | 2006-03-28 | Hughes Electronics Corporation | Method and system for decoding low density parity check (LDPC) codes |
US7577207B2 (en) | 2002-07-03 | 2009-08-18 | Dtvg Licensing, Inc. | Bit labeling for amplitude phase shift constellation used with low density parity check (LDPC) codes |
US7864869B2 (en) | 2002-07-26 | 2011-01-04 | Dtvg Licensing, Inc. | Satellite communication system utilizing low density parity check codes |
US20040019845A1 (en) | 2002-07-26 | 2004-01-29 | Hughes Electronics | Method and system for generating low density parity check codes |
CN101116249B (en) * | 2005-02-03 | 2010-10-13 | 松下电器产业株式会社 | Parallel interleaver, parallel deinterleaver, and interleave method |
FR2883121B1 (en) * | 2005-03-11 | 2007-04-27 | France Telecom | METHOD AND DEVICE FOR DECODING WHEEL CODES |
FR2915641B1 (en) | 2007-04-30 | 2009-08-07 | St Microelectronics Sa | METHOD AND DEVICE FOR INTERLEAVING DATA |
FR2987527B1 (en) | 2012-02-23 | 2014-02-21 | Univ Bretagne Sud | SELF-CONFIGURABLE DEVICE FOR INTERLACING / UNLOCATION OF DATA FRAMES |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4547882A (en) * | 1983-03-01 | 1985-10-15 | The Board Of Trustees Of The Leland Stanford Jr. University | Error detecting and correcting memories |
US4882733A (en) * | 1987-03-13 | 1989-11-21 | Ford Aerospace Corporation | Method and apparatus for combining encoding and modulation |
US5157671A (en) * | 1990-05-29 | 1992-10-20 | Space Systems/Loral, Inc. | Semi-systolic architecture for decoding error-correcting codes |
FR2675971B1 (en) * | 1991-04-23 | 1993-08-06 | France Telecom | CORRECTIVE ERROR CODING METHOD WITH AT LEAST TWO SYSTEMIC CONVOLUTIVE CODES IN PARALLEL, ITERATIVE DECODING METHOD, CORRESPONDING DECODING MODULE AND DECODER. |
-
2002
- 2002-04-16 FR FR0204764A patent/FR2838581B1/en not_active Expired - Fee Related
-
2003
- 2003-04-14 AU AU2003246832A patent/AU2003246832A1/en not_active Abandoned
- 2003-04-14 WO PCT/FR2003/001188 patent/WO2003088504A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
AU2003246832A1 (en) | 2003-10-27 |
WO2003088504A1 (en) | 2003-10-23 |
FR2838581A1 (en) | 2003-10-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 15 |
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PLFP | Fee payment |
Year of fee payment: 16 |
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PLFP | Fee payment |
Year of fee payment: 17 |
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PLFP | Fee payment |
Year of fee payment: 18 |
|
ST | Notification of lapse |
Effective date: 20201205 |