FR2809835B1 - Systeme et procede d'arrondissement base sur une selection pour des operations a virgule flottante - Google Patents

Systeme et procede d'arrondissement base sur une selection pour des operations a virgule flottante

Info

Publication number
FR2809835B1
FR2809835B1 FR0106804A FR0106804A FR2809835B1 FR 2809835 B1 FR2809835 B1 FR 2809835B1 FR 0106804 A FR0106804 A FR 0106804A FR 0106804 A FR0106804 A FR 0106804A FR 2809835 B1 FR2809835 B1 FR 2809835B1
Authority
FR
France
Prior art keywords
virgin
floating
operations
selection based
borrowing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0106804A
Other languages
English (en)
Other versions
FR2809835A1 (fr
Inventor
Bonet Glenn T Colon
Stephen L Bass
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of FR2809835A1 publication Critical patent/FR2809835A1/fr
Application granted granted Critical
Publication of FR2809835B1 publication Critical patent/FR2809835B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49936—Normalisation mentioned as feature only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G06F7/49957—Implementation of IEEE-754 Standard

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
FR0106804A 2000-05-30 2001-05-23 Systeme et procede d'arrondissement base sur une selection pour des operations a virgule flottante Expired - Fee Related FR2809835B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/583,362 US6615228B1 (en) 2000-05-30 2000-05-30 Selection based rounding system and method for floating point operations

Publications (2)

Publication Number Publication Date
FR2809835A1 FR2809835A1 (fr) 2001-12-07
FR2809835B1 true FR2809835B1 (fr) 2006-09-22

Family

ID=24332805

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0106804A Expired - Fee Related FR2809835B1 (fr) 2000-05-30 2001-05-23 Systeme et procede d'arrondissement base sur une selection pour des operations a virgule flottante

Country Status (3)

Country Link
US (1) US6615228B1 (fr)
JP (1) JP2002023997A (fr)
FR (1) FR2809835B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6928605B2 (en) * 2002-03-29 2005-08-09 Intel Corporation Add-compare-select accelerator using pre-compare-select-add operation
GB2396708B (en) * 2002-12-05 2006-06-21 Micron Technology Inc Hybrid arithmetic logic unit
JP4571903B2 (ja) * 2005-12-02 2010-10-27 富士通株式会社 演算処理装置，情報処理装置，及び演算処理方法
US10140092B2 (en) * 2016-11-04 2018-11-27 Samsung Electronics Co., Ltd. Closepath fast incremented sum in a three-path fused multiply-add design
CN109960486B (zh) * 2019-02-14 2021-06-25 安谋科技（中国）有限公司 二进制数据处理方法及其装置、介质和系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4977535A (en) * 1989-12-08 1990-12-11 Motorola, Inc. Method of computation of normalized numbers
US5408426A (en) * 1992-03-17 1995-04-18 Hitachi, Ltd. Arithmetic unit capable of performing concurrent operations for high speed operation
US5684729A (en) * 1994-09-19 1997-11-04 Hitachi, Ltd. Floating-point addition/substraction processing apparatus and method thereof
US5798952A (en) 1996-02-29 1998-08-25 Hewlett-Packard Company Leading bit anticipator
US6269384B1 (en) * 1998-03-27 2001-07-31 Advanced Micro Devices, Inc. Method and apparatus for rounding and normalizing results within a multiplier
JP2000010762A (ja) * 1998-06-19 2000-01-14 Mitsubishi Electric Corp 浮動小数点演算装置
US6148314A (en) * 1998-08-28 2000-11-14 Arm Limited Round increment in an adder circuit
KR100465371B1 (ko) * 2001-01-26 2005-01-13 학교법인연세대학교 덧셈 및 반올림 연산을 동시에 수행하는 부동 소수점ａｌｕ 연산 장치

Also Published As

Publication number Publication date
US6615228B1 (en) 2003-09-02
FR2809835A1 (fr) 2001-12-07
JP2002023997A (ja) 2002-01-25

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20080131