FR2297518A1 - Programmeable delay line for telephone systems - has random access memory minimising power consumption and has clock source synchronising readout - Google Patents

Programmeable delay line for telephone systems - has random access memory minimising power consumption and has clock source synchronising readout

Info

Publication number
FR2297518A1
FR2297518A1 FR7500535A FR7500535A FR2297518A1 FR 2297518 A1 FR2297518 A1 FR 2297518A1 FR 7500535 A FR7500535 A FR 7500535A FR 7500535 A FR7500535 A FR 7500535A FR 2297518 A1 FR2297518 A1 FR 2297518A1
Authority
FR
France
Prior art keywords
readout
power consumption
random access
access memory
clock source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7500535A
Other languages
French (fr)
Other versions
FR2297518B1 (en
Inventor
Marcel Pincemin
Yves Salle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Original Assignee
Alcatel CIT SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA filed Critical Alcatel CIT SA
Priority to FR7500535A priority Critical patent/FR2297518A1/en
Publication of FR2297518A1 publication Critical patent/FR2297518A1/en
Application granted granted Critical
Publication of FR2297518B1 publication Critical patent/FR2297518B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/17—Time-division multiplex systems in which the transmission channel allotted to a first user may be taken away and re-allotted to a second user if the first user becomes inactive, e.g. TASI
    • H04J3/172—Digital speech interpolation, i.e. DSI

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

The delay line may be programmed and it is adapted for use with time multiplexed pulse codes, particularly in telephone systems, the design being intended to minimise the power consumption as compared with shift register delays. The delay system is based on a random access memory fitted with input and output registers receiving the serial binary train. A unit provides control as the input register fills, the control being dependent on the preset delay requirement. One command signal controls the data transfer and a second command signal sets the output register. Readout is synchronised by a clock source, the readout control signals being approximately delayed from those providing write control.
FR7500535A 1975-01-09 1975-01-09 Programmeable delay line for telephone systems - has random access memory minimising power consumption and has clock source synchronising readout Granted FR2297518A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7500535A FR2297518A1 (en) 1975-01-09 1975-01-09 Programmeable delay line for telephone systems - has random access memory minimising power consumption and has clock source synchronising readout

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7500535A FR2297518A1 (en) 1975-01-09 1975-01-09 Programmeable delay line for telephone systems - has random access memory minimising power consumption and has clock source synchronising readout

Publications (2)

Publication Number Publication Date
FR2297518A1 true FR2297518A1 (en) 1976-08-06
FR2297518B1 FR2297518B1 (en) 1977-10-14

Family

ID=9149556

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7500535A Granted FR2297518A1 (en) 1975-01-09 1975-01-09 Programmeable delay line for telephone systems - has random access memory minimising power consumption and has clock source synchronising readout

Country Status (1)

Country Link
FR (1) FR2297518A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2412991A1 (en) * 1977-12-23 1979-07-20 Storage Technology Corp FIXED SPEAKER STORES FOR SIGNALING WITHOUT COMMAND LINE

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2412991A1 (en) * 1977-12-23 1979-07-20 Storage Technology Corp FIXED SPEAKER STORES FOR SIGNALING WITHOUT COMMAND LINE

Also Published As

Publication number Publication date
FR2297518B1 (en) 1977-10-14

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Legal Events

Date Code Title Description
ST Notification of lapse