FI96469C - Realization of protection switching in a digital cross switcher - Google Patents

Description

96469

The present invention relates to a method according to the preamble of claim 1 for implementing route verification of a digital TST cross-link. The invention also relates to a method for implementing universal distribution in a digital cross connect DXC (Digital Cross Connect).

Recommendations CCITT G.707 defines the signals of the first level Synchronous Transport Module (STM-1) of SDH signals.

10 Other defined levels are STM-4 and STM-16. Recommendations CCITT G.708 define the frame structure STM-N (where N = 1, 4, 16). The STM-1 frame can carry 63 subsystem containers (e.g., TU-12, Tributary Unit, which may contain a 2 Mbit / s signal from a standard 30-channel PCM system). STM-N frames are assembled from several STM-1 signals, e.g., the STM-4 signal consists of four STM-1-13 signals.

Digital cross-connect systems, CCITT draft recommendations G.sdxc-1 ...- 3 have been defined for SDH. The SDH DXC is defined (abbreviated freely) as follows: "A digital SDH cross-connect device is an Rk device with two or more interfaces at SDH speeds (G.707) and capable of at least 20 transmission termination and virtual container (VC) control; for transparent connection and reconnection between connection ports ".

: · SDH DXC can transmit traffic between different SDH levels as well as switch traffic between different 4 signals. The use of cross-connection also includes the possibility to remotely control routing, route verification, introduction of backup routes, switching from one signal to many signals (broadcasting, etc.), etc. Connections are usually two-way.

. Cross-connections can be implemented with many architectures. Known are the TS structure (Time-Space) and the TST structure (Time-Space-Time), i.e. the time-space-time-cross-field, which quite well satisfies the conditions of non-blocking and feasibility. The TST-ris-30 switch connection is also suitable for very large cross switches, although this will cause some problems as the system expands. Efforts have been made to eliminate these problems, e.g. with double-capacity TST architecture.

2 36469 In the present invention, the starting point is a digital cross-connect, i.e. a DXC unit, known per se, which uses the TST architecture. It is known that a block can occur in a cross-connect when the traffic demand exceeds the routing capabilities of the switch. For example, in a standard TST architecture, blocking may occur in cases where broadcasting and / or path protection is required. The problem could be solved with a different architecture. Ex. Copending patent application FI-942 465 as shown in the n (TS) T architecture can be non-blocking broadcast to provide a simple measures and at a reasonable cost, since the path verification is the TST node, one possibility of the actual T-coupling connecting the inlet side of the parallel 10 T-switch in parallel. In this case, the incoming signal is copied to both T-Switches. These two T-switches with the same content could route universal distributions 1 -> 2 in the same way as in the n (TS) T architecture shown. However, it is a prerequisite that there is an additional input port in the S-switch for the second T-switch. In this case, however, it is necessary to limit the connection of 2 Mbit / s inputs, i.e. only half of the 2 Mbit / s connections that were originally 2 * 63 can be used.

In existing DXC nodes, reconfiguring the switch stage hardware for general distribution and route verification becomes too expensive, both in terms of cost and the installation time required for the changes. It is therefore an object of the present invention to provide a solution which also provides unobstructed routing and route authentication to an existing DXC node.

The presented problem is solved by the invention with respect to route verification with the features of claim 1. Embodiments of the invention are set out in the dependent claims. Briefly, the invention can be described in that the number of signals to be connected to the time switch 25 is selected to be less than half the capacity, and that the signal to be verified is programmatically duplicated, i.e. the signal is not duplicated by connecting it to parallel time switches. The signals to be routed are preferably 2 Mbit / s signals.

The method according to the invention can advantageously be applied in a node of a loop network, in a connection node between networks and in particular in a connection node located in a certified SDH ring, the so-called self-healing ring, SHR (Self-Healing ring). The method according to the invention can also be applied to universal distribution in such nodes.

The advantage of the solution of the present invention is that no hardware or other software changes need to be made to the existing TST architecture, because only the new routing algorithm can handle both route verification and general distribution, in which case the number of signals to be naturally connected to the time switches must be matched to the switch capacity.

The configuration and algorithm according to the invention provide unobstructed routing in the DXC node.

In the following, the invention will be explained by means of exemplary embodiments with reference to the accompanying drawing, in which: Figure 1 shows typical connections of an STM-4 ring node; Figure 2 shows a non-blocking node configuration with 63 route verified containers TU-12; Figure 3 shows an example of an SHR node using a route authentication configuration; Figure 4 shows an example of an interconnection node between networks; Figure 5 shows an example of a loop network interface node; and Figure 6 schematically shows the card slots of a DXC frame known per se and their furnishing options.

For example, the DXC node we take in Figure 6 may comprise a frame according to the Syn-20 phonet system known per se, with slots for 19 circuit board units. The Synfonet ice system is manufactured by Nokia Telecommunications, Finland. The positions of the frame may be furnished in a specified manner and in a specified order,. of which Figure 6 shows some of the most common alternatives. The frame is shown schematically in a rectangle, with the card slots marked 1 ... 19 on the bottom line.

25 The left side of the chassis shows alternative cards, or circuit boards, that can be installed in this chassis of the system. Each card line indicates for the different card slots whether the card is allowed to be installed in this slot (@), prohibited mechanically blocked (!), Or whether it is a prohibited slot (empty) where the • j card does not work. Alternative cards are CU (control unit), SSW (status switch;! '30 S), TSW1 (time switch; T), TSW0 (64 kbit / s signal time switch), standard STM interfaces (Synchronous transport modules for STM-N, and 2 Mbit / s connections 2M, of which "2M" connects 16 bidirectional 2 Mbit / s connections, 2MTA comprises a 2M base card with a T-switch stage added for connection to AU-4 level S-stage), SU and SPU . If only a small amount of 2 Mbit / s is connected to the DXC node. 35 signals, the maximum node size of 16 * 16 or 16 * 16 STM-1 signals can be achieved. However, if not all inputs of the 16 * 16 mode switch (S) are used for STM-N-sig-4 96465 signals, then the S switch may provide spare capacity. This is illustrated in Figure 1, where an example is a typical configuration of signal interfaces in an STM-4 ring. Such a situation often occurs when applying the SDH (synchronous digital hierarchy) ring concept. An additional 5 capacity is used according to the invention to ensure unobstructed operation.

The invention considers route verification with respect to the source, i.e. the upstream end, and the destination, i.e. the downstream end. In a typical connection situation, most of the route verifications are performed close to the customer, i.e. close to the terminal connected to the DXC network. Path Protection can be considered as a special case of universal distribution, where 10 n = 2. This means that the source and destination of route verification is a 2 Mbit / s connection. This can also be expressed so that in general distribution 1 - »2 the source is a 2 Mbit / s port, and in the selection situation 2 -> 1 there is also a target 2 Mbit / s port.

According to the invention, the solution to the presented problem is realized by means of a program, whereby without hardware changes, almost the same effect as the above-mentioned n (TS) T solution can be achieved. When less than half of the maximum number of 2 Mbit / s signals (63/2 => 31) is connected to the second T-switch for route verification, doubling can be implemented in the first or actual T-stage. The duplication is then done in software, i.e. by means of a program, and not by duplicating the interfaces 20, as was done in the n (TS) T example. The basic routing problem remains: now two identical signals must be routed from the same input port through the TS, instead of the two signals being routed from two parallel input ports. However, in the solution according to the invention, something per se can be used ·; known conventional TST routing algorithm. It should be noted that in-band duplication according to the invention is only required on the 2 Mbit / s signal ports and not on the STM-1 ports. On the other hand, it can be said that an architecture resembling n (TS) T is programmatically applied in the 2 Mbit / s part of TST. Figure 2 illustrates this with an STM-4 ring connection node, in which 63 (31 + 31 + 1) TU-12 signals are connected to the T-Switches. The abbreviation TU-12 •: 30 (tributary unit) in Figure 2 refers to a standard 2 Mbit / s signal. According to the invention, the node of the image is unblocked and there are 63 route-certified connections.

Route verification uses parallel W and P signals according to the SDH (Synchronous Digital Hierarchy, Sub Network Connection Protection) standard, which are physically routed on different paths from source to destination. In this case, the abbreviation of the signals W. 35 means working, and P stands for protecting; from a practical point of view, it does not matter which of the signals is selected to "work". In the case of ii 5 9646 9 shown, the parallel W and P signals are generated in the transmission direction at the source time switch (T) by means of duplication. These signals are then routed through the TST in the same way as normal point-to-point signals, and thus a conventional TST routing problem is at hand. In the receiving direction the W and P sig-5 signals are routed to the output side of the same, subject to the T-coupler, in which the final selection is made (W or P selection). This means that the same number of TU-12 signals as in the original case requires more S-switch capacity to establish route-certified connections.

It can be seen from Figure 2 that one TU-12 signal per input port (labeled 10 with the number 63) remains unverified and thus is not used for route verification purposes. However, the 63rd signal could be routed without authentication, but the benefit of this may be questioned as routing procedures become more complicated and because the client would have a lot of effort to figure out which interface signals can be verified and which cannot.

15 As shown in Figure 6, our example DXC frame has 8 card slots that can accommodate 2 Mbit / s interface cards (2 M). In the original configuration, these AU-4 level S-switch ports (AU, Administrative Unit) are used in these slots. Thus, a total of 2 * 63 2 Mbit / s signals can be connected, but non-blocking route verification cannot always be guaranteed for these signals. One 2MTA per 63 Mbit / s channel is defined in the configuration, in which case 3 2M cards use the same time switch on the 2MTA card. Since the status switch has free ports, they can be used by replacing some 2M cards with 2MTA cards, in which case, for example, only 312 Mbit / s signals are connected to one time switch on the 2MTA card, for which uninterrupted route verification can now be guaranteed. A different number of 2 Mbit / s signals can be unambiguously verified by selecting the appropriate number of 2MTA cards to use. If 4 2MTA cards are selected, a maximum of 124 2 Mbit / s signals can be verified. In the original configuration, 2 2MTA cards are defined, so that a maximum of 62 signals can be verified. If the number of 2MTA units can be doubled <: 30, there is nothing to prevent the number from being increased even more. If the number of 2MTA units is selected as the number of 2MTA units in the example frame, then the maximum number of 2MTA units is 8. The number of route-certified 2 Mbit / s signals connected by this number can be increased to 126. It should be noted that the maximum number (126) 2 Mbit / s signals are already achieved with 35 six 2MTAs. The benefit of using eight 2MTA units is only visible when some degree of universal distribution (1 -> n) has to be applied. Table 1 summarizes a comparison of the normal and DFC node configurations of the invention.

Table 1: Configurations in different systems

Normal Route Verification Route Verification ___1__2_ 2 Mbit / s connections__126__124__126_ 2 Mbit / s card slots 8 8 8 ko____ 2 MTA units__2__4__8 (6) _ Number of S ports not used for 2 Mbit / s- 14 12 8 (10) connection Possible non-blocking route blocking of Mbit / s connections__block___

Routing algorithm "?" orTST + expansion TST + expansion ___double___double 5 The table shows that in the route-certified case (route authentication 1), the number of ports used for connections other than 2 Mbit / s is reduced by two compared to the normal configuration. According to the invention, the route-certified DXC node thus provides two STM-1 interfaces less than in the normal case. In most cases, this loss is irrelevant, as explained in more detail below.

•

Next, an example of a SHR ring self-healing ring (SHR) will be considered. At the access node, the signals to be verified have 2 Mbit / s connections as sources and destinations, while other signals with other nodes as sources and destinations pass from point to point through the current node. Figure 3 ha-15 schematically illustrates a SHR interface node in a route verification configuration; you. Table 2 shows the maximum number of connections valid in the example system. It should be noted that unblocking cannot be guaranteed for a certified TU-12 (TU, Tributary Unit) signal located in the STM-N interface signal.

Il 7 96469

Table 2: Configuration options on the interface node

Options STM-4 STM-1 2MTA Route Certificate - Port used, 2 Mbit / s number of S-switches ______ per terminal STM-4 SHR 2 ___ 8 (6) __ 126__16 (14) STM-4 SHR 2___4__124__12 STM-4 SHR 2___2__62__10 STM-4 & 2 2 6 96 16 STM-1 SHR______ STM-4 & 2 6 2 32 16 STM-1 SHR______ STM-1 SHR___8 8 (6) 126__16 (14) STM-1 SHR 14 2 | 32 16

It should be noted that the table shows the maximum values for the current configuration. Simple STM-4 or STM-1-SHR rings are usually used, with 5 to 8 or 2 STM-1 level ports coming from the S-switch. In these cases, the utilization of the S-switch remains low.

The basic idea of the invention can also be used in an interconnection node between networks. The task of the node is then to connect the traffic accumulated from the SHR ring to the higher level network and vice versa. This is schematically illustrated in Figure 4.

10 The task is now to implement route-certified routing between source and destination.

This can be done unimpeded for route-certified VC12 by applying the same • principle as in the previous example. In other words, less than half of the node's switching capacity can be utilized. This is because half of the T-switch capacity is needed for duplication and a route for selecting certified VC12-sig-15 signals. In terms of configuration, this means that the switching capacity of the S-switch must be greater than twice the ring capacity. The STM-1 SHR ring thus requires 3 STM-1 connection cables to the second network.

Next, let’s look at the use of our example DXC node in other networks, which can be generally described using a loop network. In a loop network, all lii-20 preamble signals are randomly distributed. Node configuration varies, and physical constraints are imposed by frame size as well as S-switch capacity. Figure 5 shows a schematic example of the position of an interface node in a loop network.

96469 8 When looking at 2 Mbit / s signals, the SHR case described above applies. Routing of these signals to any STM-N port in the loop network can be implemented in the same way by copying (upstream) and selection (downstream) at the T-switches. Now the only exception is that there is more competition for the capacity of the S-switch. The number of STM-N signals and 2 MTAs is limited by the size of the S-switch, i.e. the number of STM-1 signals (and / or equivalent signals) and 2MTA signals in our example structure must not exceed switch size 16. The figures in Table 2 also apply in the loop ( mesh), but many more possible configurations are now at hand. Of course, a compromise between the number of certified 2 Mbit / s signals and the number of STM-N signals must be considered. A smaller number of verified 2 Mbit / s signals results in more STM-N signals and vice versa. The limitations imposed by the frame, e.g., the frame in Figure 6, must be considered when considering other configurations.

In a loop network, it is not always possible to guarantee unblocked connection of route-certified VC12 signals-15 to STM-N signals. In this case, the route authentication must be implemented by a separate TST route authentication algorithm, where the authentication is implemented with a state switch and which includes some degree of blocking.

Some aspects of the invention have been described above. As proposed, the signals of the 2-Mbit / s interface can be route-certified without blocking. An change to the existing system is made programmatically for route verification. However, route verification somewhat limits the capacity utilization of the S-switch of the TST node, but quite reasonably, which can be expressed as follows:

Table 3: Maximum configuration of the S-switch 25 (with the example of Figure 6, cf. Table 1):

Number of signals Original Route verified according to the invention _2 Mbit / s__126__126_: v _STM-1__4__2_ STM-4 | 2 I 2

Some preferred embodiments of the invention have been described above. One skilled in the art will appreciate that the inventive idea can be applied to other cases as well. Thus, a wider use of 2MTA units would be conceivable, 96469 9 allowing larger 2 Mbit / s universal distributions (1 - * n) to be implemented. In this case, however, when making a connection from the T-switch of the 2 Mbit / s interface, an inhibition may occur, which depends on the degree of universal distribution (n) and the number of 2 Mbit / s signals connected to the 2MTA unit.

For the sake of clarity, it should be mentioned that for TU-12 signals, it is not expedient to implement general distribution and route verification in TST according to the invention if the TU-12 signal is part of an STM-N signal. In order to implement non-blocking route verification, even in the maximum case, more than half of the STM-N signal should be used for this purpose in the interface node, which does not seem sensible, cf. the case of the connection node in Figure 4. In this case, a more accurate solution would be to use a separate TST authentication algorithm.

It is also conceivable to combine the method according to the invention with the features of a separate TST authentication algorithm. In this case, copying / duplication and selection minimize the problems of the authentication algorithm by "removing" some of the route verifications, i.e. the authentication algorithm treats most of the different signals (W or P) of the authenticated connections as separate signals, which also enhances the authentication algorithm performance.

There has been a way to verify SDH signals. Of course, other signals with a similar structure, such as PDH signals, can use the same authentication.

Claims (5)

96469 ίο 1. A method in a digital TST cross connect for implementing path protection, which connect the first end comprises a switchable signal into two physically different routes and the connection end comprises selecting an active signal to the second received five signal, characterized in that the first end of the input side time switch, the number of signals switched to a less than one-half of the time switch capacity the route-verified signal is programmatically duplicated in the first time switch, after which each of the duplicated signals (W, P) is routed through the TST-cross-link using the conventional separate signal TST routing algorithm, whereby the currently verified signal pair is finally addressed. assign an output time switch in which one of the signals is actively selected as the received signal, and if oin the output side time switch, the number of switchable reittivarmennettujen signals is less than half of the 15-aikakyt pedal capacity enabled by the signal amount. January 2 The method according to claim, characterized in that the reittivarmennettavat signals to accompany the input side time switch and the output side of the time switch are 2 Mbit / s signals. Method according to Claim 1 or 2, characterized in that it is applied in the connection node of the SHR ring and / or in the connection node between the networks and / or in the node of the loop network. A method according to claim 1 or 2, characterized in that it is applied as a node of a loop network, wherein an algorithm is used in the routing of the signals, which can produce blocking. 5. A method for implementing a digital TST cross-connection of the broadcast, which connect the first end comprises dividing the signal to be connected more different route more recipients for routing, characterized in that the input side time switch, the number of signals switched are selected such that the number of connected signals and the sum of the amplified broadcast signal is less than 30 as a time switch the number of signals allowed by the capacity, and that the signal for general distribution is programmatically amplified in the first time switch, after which each amplified signal is routed through the TST cross-link using the conventional separate signal TST routing algorithm. n 96469