EP4229993A1 - Multi-link state machine mismatch resolution - Google Patents

Multi-link state machine mismatch resolution

Info

Publication number
EP4229993A1
EP4229993A1 EP21880963.0A EP21880963A EP4229993A1 EP 4229993 A1 EP4229993 A1 EP 4229993A1 EP 21880963 A EP21880963 A EP 21880963A EP 4229993 A1 EP4229993 A1 EP 4229993A1
Authority
EP
European Patent Office
Prior art keywords
mld
frame
state
class
circuitry
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP21880963.0A
Other languages
German (de)
French (fr)
Inventor
Po-Kai Huang
Daniel F. BRAVO
Ido Ouzieli
Danny Alexander
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of EP4229993A1 publication Critical patent/EP4229993A1/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W12/00—Security arrangements; Authentication; Protecting privacy or anonymity
    • H04W12/06—Authentication
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • H04W76/10—Connection setup
    • H04W76/19—Connection re-establishment
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W12/00—Security arrangements; Authentication; Protecting privacy or anonymity
    • H04W12/60—Context-dependent security
    • H04W12/69—Identity-dependent
    • H04W12/71—Hardware identity
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • H04W76/10—Connection setup
    • H04W76/15—Setup of multiple wireless link connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W80/00—Wireless network protocols or protocol adaptations to wireless operation
    • H04W80/02—Data link layer protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W84/00—Network topologies
    • H04W84/02—Hierarchically pre-organised networks, e.g. paging networks, cellular networks, WLAN [Wireless Local Area Network] or WLL [Wireless Local Loop]
    • H04W84/10—Small scale networks; Flat hierarchical networks
    • H04W84/12—WLAN [Wireless Local Area Networks]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/02—Terminal devices
    • H04W88/06—Terminal devices adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Definitions

  • Embodiments relate to multi-link devices (MLDs) operating in accordance with wireless local area networks (WLANs) and Wi-Fi networks including networks operating in accordance with different versions or generations of the IEEE 802.11 family of standards. Some embodiments relate to resolving multi-link state machine mismatches between an access point (AP) MLD and non-APs MLDs.
  • AP access point
  • WLAN Wireless Local Area Network
  • FIG. 1 is a block diagram of a radio architecture in accordance with some embodiments.
  • FIG. 2 illustrates a front-end module circuitry for use in the radio architecture of FIG. 1 in accordance with some embodiments.
  • FIG. 3 illustrates a radio IC circuitry for use in the radio architecture of FIG. 1 in accordance with some embodiments.
  • FIG. 4 illustrates a baseband processing circuitry for use in the radio architecture of FIG.1 in accordance with some embodiments.
  • FIG. 5 illustrates a WLAN in accordance with some embodiments.
  • FIG. 6 illustrates a block diagram of an example machine upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform.
  • FIG. 7 illustrates a block diagram of an example wireless device upon which any one or more of the techniques (e.g., methodologies or operations) discussed herein may perform.
  • FIG. 8 illustrates a MLDs, in accordance with some embodiments.
  • FIG. 9 illustrates a schematic diagram for states and services between ST As or MLDs, in accordance with some embodiments.
  • FIG. 10 illustrates a basic multi-link element, in accordance with some embodiments.
  • FIG. 11 illustrates a method of multi-link state machine mismatch resolution, in accordance with some embodiments.
  • FIG. 1 is a block diagram of a radio architecture 100 in accordance with some embodiments.
  • Radio architecture 100 may include radio front-end module (FEM) circuitry 104, radio IC circuitry 106 and baseband processing circuitry 108.
  • FEM radio front-end module
  • Radio architecture 100 as shown includes both Wireless Local Area Network (WLAN) functionality and Bluetooth (BT) functionality although embodiments are not so limited.
  • WLAN Wireless Local Area Network
  • Wi-Fi are used interchangeably.
  • FEM circuitry 104 may include a WLAN or Wi-Fi FEM circuitry 104A and a Bluetooth (BT) FEM circuitry 104B.
  • the WLAN FEM circuitry 104A may include a receive signal path comprising circuitry configured to operate on WLAN RF signals received from one or more antennas 101, to amplify the received signals and to provide the amplified versions of the received signals to the WLAN radio IC circuitry 106A for further processing.
  • the BT FEM circuitry 104B may include a receive signal path which may include circuitry configured to operate on BT RF signals received from one or more antennas 101, to amplify the received signals and to provide the amplified versions of the received signals to the BT radio IC circuitry 106B for further processing.
  • FEM circuitry 104A may also include a transmit signal path which may include circuitry configured to amplify WLAN signals provided by the radio IC circuitry 106A for wireless transmission by one or more of the antennas 101.
  • FEM circuitry 104B may also include a transmit signal path which may include circuitry configured to amplify BT signals provided by the radio IC circuitry 106B for wireless transmission by the one or more antennas.
  • FIG. 1 In the embodiment of FIG.
  • FEM 104A and FEM 104B are shown as being distinct from one another, embodiments are not so limited, and include within their scope the use of an FEM (not shown) that includes a transmit path and/or a receive path for both WLAN and BT signals, or the use of one or more FEM circuitries where at least some of the FEM circuitries share transmit and/or receive signal paths for both WLAN and BT signals.
  • Radio IC circuitry 106 as shown may include WLAN radio IC circuitry 106A and BT radio IC circuitry 106B.
  • the WLAN radio IC circuitry 106A may include a receive signal path which may include circuitry to downconvert WLAN RF signals received from the FEM circuitry 104A and provide baseband signals to WLAN baseband processing circuitry 108A.
  • BT radio IC circuitry 106B may in turn include a receive signal path which may include circuitry to down-convert BT RF signals received from the FEM circuitry 104B and provide baseband signals to BT baseband processing circuitry 108B.
  • WLAN radio IC circuitry 106A may also include a transmit signal path which may include circuitry to up-convert WLAN baseband signals provided by the WLAN baseband processing circuitry 108A and provide WLAN RF output signals to the FEM circuitry 104A for subsequent wireless transmission by the one or more antennas 101.
  • BT radio IC circuitry 106B may also include a transmit signal path which may include circuitry to up-convert BT baseband signals provided by the BT baseband processing circuitry 108B and provide BT RF output signals to the FEM circuitry 104B for subsequent wireless transmission by the one or more antennas 101.
  • radio IC circuitries 106A and 106B are shown as being distinct from one another, embodiments are not so limited, and include within their scope the use of a radio IC circuitry (not shown) that includes a transmit signal path and/or a receive signal path for both WLAN and BT signals, or the use of one or more radio IC circuitries where at least some of the radio IC circuitries share transmit and/or receive signal paths for both WLAN and BT signals.
  • Baseband processing circuity 108 may include a WLAN baseband processing circuitry 108A and a BT baseband processing circuitry 108B.
  • the WLAN baseband processing circuitry 108A may include a memory, such as, for example, a set of RAM arrays in a Fast Fourier Transform or Inverse Fast Fourier Transform block (not shown) of the WLAN baseband processing circuitry 108A.
  • Each of the WLAN baseband circuitry 108A and the BT baseband circuitry 108B may further include one or more processors and control logic to process the signals received from the corresponding WLAN or BT receive signal path of the radio IC circuitry 106, and to also generate corresponding WLAN or BT baseband signals for the transmit signal path of the radio IC circuitry 106.
  • Each of the baseband processing circuitries 108A and 108B may further include physical layer (PHY) and medium access control layer (MAC) circuitry, and may further interface with application processor 111 for generation and processing of the baseband signals and for controlling operations of the radio IC circuitry 106.
  • PHY physical layer
  • MAC medium access control layer
  • WLAN-BT coexistence circuitry 113 may include logic providing an interface between the WLAN baseband circuitry 108A and the BT baseband circuitry 108B to enable use cases requiring WLAN and BT coexistence.
  • a switch 103 may be provided between the WLAN FEM circuitry 104 A and the BT FEM circuitry 104B to allow switching between the WLAN and BT radios according to application needs.
  • antennas 101 are depicted as being respectively connected to the WLAN FEM circuitry 104 A and the BT FEM circuitry 104B, embodiments include within their scope the sharing of one or more antennas as between the WLAN and BT FEMs, or the provision of more than one antenna connected to each of FEM 104A or 104B.
  • the front-end module circuitry 104, the radio IC circuitry 106, and baseband processing circuitry 108 may be provided on a single radio card, such as wireless radio card 102.
  • the one or more antennas 101, the FEM circuitry 104 and the radio IC circuitry 106 may be provided on a single radio card.
  • the radio IC circuitry 106 and the baseband processing circuitry 108 may be provided on a single chip or IC, such as IC 112.
  • the wireless radio card 102 may include a WLAN radio card and may be configured for Wi-Fi communications, although the scope of the embodiments is not limited in this respect.
  • the radio architecture 100 may be configured to receive and transmit orthogonal frequency division multiplexed (OFDM) or orthogonal frequency division multiple access (OFDMA) communication signals over a multicarrier communication channel.
  • OFDM orthogonal frequency division multiplexed
  • OFDMA orthogonal frequency division multiple access
  • radio architecture 100 may be part of a Wi-Fi communication station (STA) such as a wireless access point (AP), a base station or a mobile device including a Wi-Fi device.
  • STA Wi-Fi communication station
  • AP wireless access point
  • radio architecture 100 may be configured to transmit and receive signals in accordance with specific communication standards and/or protocols, such as any of the Institute of Electrical and Electronics Engineers (IEEE) standards including, IEEE 802.1 ln-2009, IEEE 802.11-2012, IEEE 802.11-2016, IEEE 802.1 lac, and/or IEEE 802.1 lax standards and/or proposed specifications for WLANs, although the scope of embodiments is not limited in this respect.
  • Radio architecture 100 may also be suitable to transmit and/or receive communications in accordance with other techniques and standards.
  • the radio architecture 100 may be configured for high-efficiency (HE) Wi-Fi (HEW) communications in accordance with the IEEE 802.1 lax standard.
  • the radio architecture 100 may be configured to communicate in accordance with an OFDMA technique, although the scope of the embodiments is not limited in this respect.
  • the radio architecture 100 may be configured to transmit and receive signals transmitted using one or more other modulation techniques such as spread spectrum modulation (e.g., direct sequence code division multiple access (DS-CDMA) and/or frequency hopping code division multiple access (FH-CDMA)), time-division multiplexing (TDM) modulation, and/or frequency-division multiplexing (FDM) modulation, although the scope of the embodiments is not limited in this respect.
  • spread spectrum modulation e.g., direct sequence code division multiple access (DS-CDMA) and/or frequency hopping code division multiple access (FH-CDMA)
  • TDM time-division multiplexing
  • FDM frequency-division multiplexing
  • the BT baseband circuitry 108B may be compliant with a Bluetooth (BT) connectivity standard such as Bluetooth, Bluetooth 4.0 or Bluetooth 5.0, or any other iteration of the Bluetooth Standard.
  • BT Bluetooth
  • the radio architecture 100 may be configured to establish a BT synchronous connection oriented (SCO) link and/or a BT low energy (BT LE) link.
  • SCO BT synchronous connection oriented
  • BT LE BT low energy
  • the radio architecture 100 may be configured to establish an extended SCO (eSCO) link for BT communications, although the scope of the embodiments is not limited in this respect.
  • the radio architecture may be configured to engage in a BT Asynchronous Connection-Less (ACL) communications, although the scope of the embodiments is not limited in this respect.
  • ACL Asynchronous Connection-Less
  • the functions of a BT radio card and WLAN radio card may be combined on a single wireless radio card, such as single wireless radio card 102, although embodiments are not so limited, and include within their scope discrete WLAN and BT radio cards
  • the radio-architecture 100 may include other radio cards, such as a cellular radio card configured for cellular (e.g., 3 GPP such as LTE, LTE- Advanced or 5G communications).
  • a cellular radio card configured for cellular (e.g., 3 GPP such as LTE, LTE- Advanced or 5G communications).
  • the radio architecture 100 may be configured for communication over various channel bandwidths including bandwidths having center frequencies of about 900 MHz, 2.4 GHz, 5 GHz, and bandwidths of about 1 MHz, 2 MHz, 2.5 MHz, 4 MHz, 5MHz, 8 MHz, 10 MHz, 16 MHz, 20 MHz, 40MHz, 80MHz (with contiguous bandwidths) or 80+80MHz (160MHz) (with non-contiguous bandwidths).
  • bandwidths having center frequencies of about 900 MHz, 2.4 GHz, 5 GHz, and bandwidths of about 1 MHz, 2 MHz, 2.5 MHz, 4 MHz, 5MHz, 8 MHz, 10 MHz, 16 MHz, 20 MHz, 40MHz, 80MHz (with contiguous bandwidths) or 80+80MHz (160MHz) (with non-contiguous bandwidths).
  • a 320 MHz channel bandwidth may be used. The scope of the embodiments is not limited with respect to the above center frequencies however.
  • FIG. 2 illustrates FEM circuitry 200 in accordance with some embodiments.
  • the FEM circuitry 200 is one example of circuitry that may be suitable for use as the WLAN and/or BT FEM circuitry 104A/104B (FIG. 1), although other circuitry configurations may also be suitable.
  • the FEM circuitry 200 may include a TX/RX switch 202 to switch between transmit mode and receive mode operation.
  • the FEM circuitry 200 may include a receive signal path and a transmit signal path.
  • the receive signal path of the FEM circuitry 200 may include a low-noise amplifier (LNA) 206 to amplify received RF signals 203 and provide the amplified received RF signals 207 as an output (e.g., to the radio IC circuitry 106 (FIG. 1)).
  • LNA low-noise amplifier
  • the transmit signal path of the circuitry 200 may include a power amplifier (PA) to amplify input RF signals 209 (e.g., provided by the radio IC circuitry 106), and one or more filters 212, such as band-pass filters (BPFs), low-pass filters (LPFs) or other types of filters, to generate RF signals 215 for subsequent transmission (e.g., by one or more of the antennas 101 (FIG. 1)).
  • the FEM circuitry 200 may be configured to operate in either the 2.4 GHz frequency spectrum or the 5 GHz frequency spectrum.
  • the receive signal path of the FEM circuitry 200 may include a receive signal path duplexer 204 to separate the signals from each spectrum as well as provide a separate LNA 206 for each spectrum as shown.
  • the transmit signal path of the FEM circuitry 200 may also include a power amplifier 210 and a filter 212, such as a BPF, a LPF or another type of filter for each frequency spectrum and a transmit signal path duplexer 214 to provide the signals of one of the different spectrums onto a single transmit path for subsequent transmission by the one or more of the antennas 101 (FIG. 1).
  • BT communications may utilize the 2.4 GHZ signal paths and may utilize the same FEM circuitry 200 as the one used for WLAN communications.
  • FIG. 3 illustrates radio integrated circuit (IC) circuitry 300 in accordance with some embodiments.
  • the radio IC circuitry 300 is one example of circuitry that may be suitable for use as the WLAN or BT radio IC circuitry 106A/106B (FIG. 1), although other circuitry configurations may also be suitable.
  • the radio IC circuitry 300 may include a receive signal path and a transmit signal path.
  • the receive signal path of the radio IC circuitry 300 may include at least mixer circuitry 302, such as, for example, down-conversion mixer circuitry, amplifier circuitry 306 and filter circuitry 308.
  • the transmit signal path of the radio IC circuitry 300 may include at least filter circuitry 312 and mixer circuitry 314, such as, for example, up- conversion mixer circuitry.
  • Radio IC circuitry 300 may also include synthesizer circuitry 304 for synthesizing a frequency 305 for use by the mixer circuitry 302 and the mixer circuitry 314.
  • the mixer circuitry 302 and/or 314 may each, according to some embodiments, be configured to provide direct conversion functionality.
  • Fig. 3 illustrates only a simplified version of a radio IC circuitry, and may include, although not shown, embodiments where each of the depicted circuitries may include more than one component.
  • mixer circuitry 320 and/or 314 may each include one or more mixers
  • filter circuitries 308 and/or 312 may each include one or more filters, such as one or more BPFs and/or LPFs according to application needs.
  • mixer circuitries when mixer circuitries are of the direct-conversion type, they may each include two or more mixers.
  • mixer circuitry 302 may be configured to down-convert RF signals 207 received from the FEM circuitry 104 (FIG. 1) based on the synthesized frequency 305 provided by synthesizer circuitry 304.
  • the amplifier circuitry 306 may be configured to amplify the down-converted signals and the filter circuitry 308 may include a LPF configured to remove unwanted signals from the down-converted signals to generate output baseband signals 307.
  • Output baseband signals 307 may be provided to the baseband processing circuitry 108 (FIG. 1) for further processing.
  • the output baseband signals 307 may be zero-frequency baseband signals, although this is not a requirement.
  • mixer circuitry 302 may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 314 may be configured to up-convert input baseband signals 311 based on the synthesized frequency 305 provided by the synthesizer circuitry 304 to generate RF output signals 209 for the FEM circuitry 104.
  • the baseband signals 311 may be provided by the baseband processing circuitry 108 and may be filtered by filter circuitry 312.
  • the filter circuitry 312 may include a LPF or a BPF, although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 302 and the mixer circuitry 314 may each include two or more mixers and may be arranged for quadrature down-conversion and/or up-conversion respectively with the help of synthesizer 304.
  • the mixer circuitry 302 and the mixer circuitry 314 may each include two or more mixers each configured for image rejection (e.g., Hartley image rejection).
  • the mixer circuitry 302 and the mixer circuitry 314 may be arranged for direct downconversion and/or direct up-conversion, respectively.
  • the mixer circuitry 302 and the mixer circuitry 314 may be configured for superheterodyne operation, although this is not a requirement.
  • Mixer circuitry 302 may comprise, according to one embodiment: quadrature passive mixers (e.g., for the in-phase (I) and quadrature phase (Q) paths).
  • RF input signal 207 from Fig. 3 may be down- converted to provide I and Q baseband output signals to be sent to the baseband processor
  • Quadrature passive mixers may be driven by zero and ninetydegree time-varying LO switching signals provided by a quadrature circuitry which may be configured to receive a LO frequency (fro) from a local oscillator or a synthesizer, such as LO frequency 305 of synthesizer 304 (FIG. 3).
  • the LO frequency may be the carrier frequency, while in other embodiments, the LO frequency may be a fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency).
  • the zero and ninety-degree time-varying switching signals may be generated by the synthesizer, although the scope of the embodiments is not limited in this respect.
  • the LO signals may differ in duty cycle (the percentage of one period in which the LO signal is high) and/or offset (the difference between start points of the period).
  • the LO signals may have a 25% duty cycle and a 50% offset.
  • each branch of the mixer circuitry e.g., the in-phase (I) and quadrature phase (Q) path
  • the RF input signal 207 may comprise a balanced signal, although the scope of the embodiments is not limited in this respect.
  • the I and Q baseband output signals may be provided to low-nose amplifier, such as amplifier circuitry 306 (FIG. 3) or to filter circuitry 308 (FIG. 3).
  • the output baseband signals 307 and the input baseband signals 311 may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals 307 and the input baseband signals 311 may be digital baseband signals. In these alternate embodiments, the radio IC circuitry may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry.
  • ADC analog-to-digital converter
  • DAC digital-to-analog converter
  • a separate radio IC circuitry may be provided for processing signals for each spectrum, or for other spectrums not mentioned here, although the scope of the embodiments is not limited in this respect.
  • the synthesizer circuitry 304 may be a fractional-N synthesizer or a fractional N/N+l synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable.
  • synthesizer circuitry 304 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.
  • the synthesizer circuitry 304 may include digital synthesizer circuitry.
  • frequency input into synthesizer circuity 304 may be provided by a voltage controlled oscillator (VCO), although that is not a requirement.
  • VCO voltage controlled oscillator
  • a divider control input may further be provided by either the baseband processing circuitry 108 (FIG. 1) or the application processor 111 (FIG. 1) depending on the desired output frequency 305.
  • a divider control input (e.g., N) may be determined from a look-up table (e.g., within a Wi-Fi card) based on a channel number and a channel center frequency as determined or indicated by the application processor 111.
  • synthesizer circuitry 304 may be configured to generate a carrier frequency as the output frequency 305, while in other embodiments, the output frequency 305 may be a fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency). In some embodiments, the output frequency 305 may be a LO frequency (fro).
  • FIG. 4 illustrates a functional block diagram of baseband processing circuitry 400 in accordance with some embodiments.
  • the baseband processing circuitry 400 is one example of circuitry that may be suitable for use as the baseband processing circuitry 108 (FIG. 1), although other circuitry configurations may also be suitable.
  • the baseband processing circuitry 400 may include a receive baseband processor (RX BBP) 402 for processing receive baseband signals 309 provided by the radio IC circuitry 106 (FIG. 1) and a transmit baseband processor (TX BBP) 404 for generating transmit baseband signals 311 for the radio IC circuitry 106.
  • the baseband processing circuitry 400 may also include control logic 406 for coordinating the operations of the baseband processing circuitry 400.
  • the baseband processing circuitry 400 may include ADC 410 to convert analog baseband signals received from the radio IC circuitry 106 to digital baseband signals for processing by the RX BBP 402.
  • the baseband processing circuitry 400 may also include DAC 412 to convert digital baseband signals from the TX BBP 404 to analog baseband signals.
  • the transmit baseband processor 404 may be configured to generate OFDM or OFDMA signals as appropriate for transmission by performing an inverse fast Fourier transform (IFFT).
  • IFFT inverse fast Fourier transform
  • the receive baseband processor 402 may be configured to process received OFDM signals or OFDMA signals by performing an FFT.
  • the receive baseband processor 402 may be configured to detect the presence of an OFDM signal or OFDMA signal by performing an autocorrelation, to detect a preamble, such as a short preamble, and by performing a cross-correlation, to detect a long preamble.
  • the preambles may be part of a predetermined frame structure for Wi-Fi communication.
  • the antennas 101 may each comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals.
  • the antennas may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result.
  • Antennas 101 may each include a set of phased-array antennas, although embodiments are not so limited.
  • the radio-architecture 100 is illustrated as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements, such as processing elements including digital signal processors (DSPs), and/or other hardware elements.
  • processing elements including digital signal processors (DSPs), and/or other hardware elements.
  • some elements may comprise one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs) and combinations of various hardware and logic circuitry for performing at least the functions described herein.
  • the functional elements may refer to one or more processes operating on one or more processing elements.
  • FIG. 5 illustrates a WLAN 500 in accordance with some embodiments.
  • the WLAN 500 may comprise a basis service set (BSS) that may include an access point (AP) 502, a plurality of stations (STAs) 504, and a plurality of legacy devices 506.
  • BSS basis service set
  • the STAs 504 and/or AP 502 are configured to operate in accordance with IEEE 802.1 Ibe extremely high throughput (EHT) and/or high efficiency (HE) IEEE 802.1 lax.
  • EHT extremely high throughput
  • HE high efficiency
  • the STAs 504 and/or AP 520 are configured to operate in accordance with IEEE 802.1 laz.
  • IEEE 802.11EHT may be termed Next Generation 802.11.
  • the STA 504 and AP 502 may be configured to operate in accordance with IEEE P802.1 lbeTM/Dl.1, July 2021, IEEE P802.1 laxTM/D8.0, October 2020, and/or IEEE Std 802.11TM-2020, which are incorporated herein by reference in their entirety.
  • the AP 502 may be an AP using the IEEE 802.11 to transmit and receive.
  • the AP 502 may be a base station.
  • the AP 502 may use other communications protocols as well as the IEEE 802.11 protocol.
  • the EHT protocol may be termed a different name in accordance with some embodiments.
  • the IEEE 802.11 protocol may include using orthogonal frequency division multiple-access (OFDMA), time division multiple access (TDMA), and/or code division multiple access (CDMA).
  • OFDMA orthogonal frequency division multiple-access
  • TDMA time division multiple access
  • CDMA code division multiple access
  • the IEEE 802.11 protocol may include a multiple access technique.
  • the IEEE 802.11 protocol may include space-division multiple access (SDMA) and/or multiple-user multiple-input multiple-output (MU-MIMO).
  • SDMA space-division multiple access
  • MU-MIMO multiple-user multiple-input multiple-output
  • EHT AP 502 There may be more than one EHT AP 502 that is part of an extended service set (ESS).
  • a controller (not illustrated) may store information that is common to the more than one APs 502 and may control more than one BSS, e.g., assign primary channels, colors, etc.
  • AP 502 may be connected to the internet.
  • the legacy devices 506 may operate in accordance with one or more of IEEE 802.11 a/b/g/n/ac/ad/af/ah/aj/ay/ax, or another legacy wireless communication standard.
  • the legacy devices 506 may be STAs or IEEE STAs.
  • the STAs 504 may be wireless transmit and receive devices such as cellular telephone, portable electronic wireless communication devices, smart telephone, handheld wireless device, wireless glasses, wireless watch, wireless personal device, tablet, or another device that may be transmitting and receiving using the IEEE 802.11 protocol such as IEEE 802.1 Ibe or another wireless protocol.
  • the AP 502 may communicate with legacy devices 506 in accordance with legacy IEEE 802.11 communication techniques.
  • the H AP 502 may also be configured to communicate with STAs 504 in accordance with legacy IEEE 802.11 communication techniques.
  • a HE or EHT frames may be configurable to have the same bandwidth as a channel.
  • the HE or EHT frame may be a physical Layer Convergence Procedure (PLCP) Protocol Data Unit (PPDU).
  • PPDU may be an abbreviation for physical layer protocol data unit (PPDU).
  • there may be different types of PPDUs that may have different fields and different physical layers and/or different media access control (MAC) layers.
  • SU single user
  • MU multiple-user
  • ER extended-range
  • TB trigger-based
  • EHT may be the same or similar as HE PPDUs.
  • the bandwidth of a channel may be 20MHz, 40MHz, or 80MHz, 80+SOMHz, 160MHz, 160+160MHz, 320MHz, 320+320MHz, 640MHz bandwidths.
  • the bandwidth of a channel less than 20 MHz may be 1 MHz, 1.25MHz, 2.03MHz, 2.5MHz, 4.06 MHz, 5MHz and 10MHz, or a combination thereof or another bandwidth that is less or equal to the available bandwidth may also be used.
  • the bandwidth of the channels may be based on a number of active data subcarriers. In some embodiments the bandwidth of the channels is based on 26, 52, 106, 242, 484, 996, or 2x996 active data subcarriers or tones that are spaced by 20 MHz.
  • the bandwidth of the channels is 256 tones spaced by 20 MHz. In some embodiments the channels are multiple of 26 tones or a multiple of 20 MHz. In some embodiments a 20 MHz channel may comprise 242 active data subcarriers or tones, which may determine the size of a Fast Fourier Transform (FFT). An allocation of a bandwidth or a number of tones or subcarriers may be termed a resource unit (RU) allocation in accordance with some embodiments.
  • FFT Fast Fourier Transform
  • the 26-subcarrier RU and 52-subcarrier RU are used in the 20 MHz, 40 MHz, 80 MHz, 160 MHz and 80+80 MHz OFDMA HE PPDU formats.
  • the 106-subcarrier RU is used in the 20 MHz, 40 MHz, 80 MHz, 160 MHz and 80+80 MHz OFDMA and MU-MIMO HE PPDU formats.
  • the 242-subcarrier RU is used in the 40 MHz, 80 MHz, 160 MHz and 80+80 MHz OFDMA and MU- MIMO HE PPDU formats.
  • the 484-subcarrier RU is used in the 80 MHz, 160 MHz and 80+80 MHz OFDMA and MU-MIMO HE PPDU formats.
  • the 996-subcarrier RU is used in the 160 MHz and 80+80 MHz OFDMA and MU-MIMO HE PPDU formats.
  • a HE or EHT frame may be configured for transmitting a number of spatial streams, which may be in accordance with MU-MIMO and may be in accordance with OFDMA.
  • the AP 502, STA 504, and/or legacy device 506 may also implement different technologies such as code division multiple access (CDMA) 2000, CDMA 2000 IX, CDMA 2000 Evolution-Data Optimized (EV-DO), Interim Standard 2000 (IS-2000), Interim Standard 95 (IS-95), Interim Standard 856 (IS-856), Long Term Evolution (LTE), Global System for Mobile communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), GSM EDGE (GERAN), IEEE 802.16 (i.e., Worldwide Interoperability for Microwave Access (WiMAX)), BlueTooth®, low-power BlueTooth®, or other technologies.
  • CDMA code division multiple access
  • CDMA 2000 IX CDMA 2000 Evolution-Data Optimized
  • EV-DO Evolution-Data Optimized
  • IS-2000 Interim Standard 2000
  • a HE AP 502 may operate as a master station which may be arranged to contend for a wireless medium (e.g., during a contention period) to receive exclusive control of the medium for a transmission opportunity (TXOP).
  • the AP 502 may transmit an EHT/HE trigger frame transmission, which may include a schedule for simultaneous UL/DL transmissions from STAs 504.
  • the AP 502 may transmit a time duration of the TXOP and sub-channel information.
  • STAs 504 may communicate with the AP 502 in accordance with a non-contention based multiple access technique such as OFDMA or MU-MIMO. This is unlike conventional WLAN communications in which devices communicate in accordance with a contention-based communication technique, rather than a multiple access technique.
  • the AP 502 may communicate with stations 504 using one or more HE or EHT frames.
  • the HE STAs 504 may operate on a sub-channel smaller than the operating range of the AP 502.
  • legacy stations refrain from communicating. The legacy stations may need to receive the communication from the HE AP 502 to defer from communicating.
  • the STAs 504 may contend for the wireless medium with the legacy devices 506 being excluded from contending for the wireless medium during the master-sync transmission.
  • the trigger frame may indicate an UL-MU- MIMO and/or UL OFDMA TXOP.
  • the trigger frame may include a DL UL-MU-MIMO and/or DL OFDMA with a schedule indicated in a preamble portion of trigger frame.
  • the multiple-access technique used during the HE or EHT TXOP may be a scheduled OFDMA technique, although this is not a requirement.
  • the multiple access technique may be a time-division multiple access (TDMA) technique or a frequency division multiple access (FDMA) technique.
  • the multiple access technique may be a space-division multiple access (SDMA) technique.
  • the multiple access technique may be a Code division multiple access (CDMA).
  • the AP 502 may also communicate with legacy stations 506 and/or STAs 504 in accordance with legacy IEEE 802.11 communication techniques.
  • the AP 502 may also be configurable to communicate with STAs 504 outside the TXOP in accordance with legacy IEEE 802.11 or IEEE 802.1 lEHT/ax communication techniques, although this is not a requirement.
  • the STA 504 may be a “group owner" (GO) for peer-to-peer modes of operation.
  • a wireless device may be a STA 502 or a HE AP 502.
  • the STA 504 and/or AP 502 may be configured to operate in accordance with IEEE 802.1 Imc.
  • the radio architecture of FIG. 1 is configured to implement the STA 504 and/or the AP 502.
  • the front-end module circuitry of FIG. 2 is configured to implement the STA 504 and/or the AP 502.
  • the radio IC circuitry of FIG. 3 is configured to implement the HE station 504 and/or the AP 502.
  • the base-band processing circuitry of FIG. 4 is configured to implement the STA 504 and/or the AP 502.
  • the STAs 504, AP 502, an apparatus of the STA 504, and/or an apparatus of the AP 502 may include one or more of the following: the radio architecture of FIG. 1, the front-end module circuitry of FIG. 2, the radio IC circuitry of FIG. 3, and/or the base-band processing circuitry of FIG. 4.
  • the radio architecture of FIG. 1, the front-end module circuitry of FIG. 2, the radio IC circuitry of FIG. 3, and/or the base-band processing circuitry of FIG. 4 may be configured to perform the methods and operations/functions herein described in conjunction with FIGS. 1- 11.
  • the STAs 504 and/or the HE AP 502 are configured to perform the methods and operations/functions described herein in conjunction with FIGS. 1-11.
  • an apparatus of the STA 504 and/or an apparatus of the AP 502 are configured to perform the methods and functions described herein in conjunction with FIGS. 1-11.
  • the term Wi-Fi may refer to one or more of the IEEE 802.11 communication standards.
  • AP and STA may refer to EHT/HE access point and/or EHT/HE station as well as legacy devices 506.
  • a HE AP STA may refer to a AP 502 and/or STAs 504 that are operating as EHT APs 502.
  • a STA 504 when a STA 504 is not operating as an AP, it may be referred to as a non-AP STA or non-AP.
  • STA 504 may be referred to as either an AP STA or a non-AP.
  • FIG. 6 illustrates a block diagram of an example machine 600 upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform.
  • the machine 600 may operate as a standalone device or may be connected (e.g., networked) to other machines.
  • the machine 600 may operate in the capacity of a server machine, a client machine, or both in server-client network environments.
  • the machine 600 may act as a peer machine in peer-to-peer (P2P) (or other distributed) network environment.
  • P2P peer-to-peer
  • the machine 600 may be a HE AP 502, EVT station 504, personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a portable communications device, a mobile telephone, a smart phone, a web appliance, a network router, switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine.
  • PC personal computer
  • PDA personal digital assistant
  • portable communications device a mobile telephone
  • smart phone a web appliance
  • network router switch or bridge
  • Machine 600 may include a hardware processor 602 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 604 and a static memory 606, some or all of which may communicate with each other via an interlink (e.g., bus) 608.
  • a hardware processor 602 e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof
  • main memory 604 e.g., main memory
  • static memory 606 e.g., static memory
  • main memoiy 604 include Random Access Memory (RAM), and semiconductor memory devices, which may include, in some embodiments, storage locations in semiconductors such as registers.
  • static memory 606 include non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; RAM; and CD-ROM and DVD-ROM disks.
  • EPROM Electrically Programmable Read-Only Memory
  • EEPROM Electrically Erasable Programmable Read-Only Memory
  • the machine 600 may further include a display device 610, an input device 612 (e.g., a keyboard), and a user interface (UI) navigation device 614 (e.g., a mouse).
  • the display device 610, input device 612 and UI navigation device 614 may be a touch screen display.
  • the machine 600 may additionally include a mass storage (e.g., drive unit) 616, a signal generation device 618 (e.g., a speaker), a network interface device 620, and one or more sensors 621, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor.
  • GPS global positioning system
  • the machine 600 may include an output controller 628, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared(IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).
  • a serial e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared(IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).
  • the processor 602 and/or instructions 624 may comprise processing circuitry and/or transceiver circuitry.
  • the storage device 616 may include a machine readable medium 622 on which is stored one or more sets of data structures or instructions 624
  • the instructions 624 may also reside, completely or at least partially, within the main memory 604, within static memory 606, or within the hardware processor 602 during execution thereof by the machine 600.
  • the hardware processor 602, the main memory 604, the static memory 606, or the storage device 616 may constitute machine readable media.
  • machine readable media may include: nonvolatile memory, such as semiconductor memory devices (e.g., EPROM or EEPROM) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; RAM; and CD-ROM and DVD-ROM disks.
  • nonvolatile memory such as semiconductor memory devices (e.g., EPROM or EEPROM) and flash memory devices
  • magnetic disks such as internal hard disks and removable disks
  • magneto-optical disks such as CD-ROM and DVD-ROM disks.
  • machine readable medium 622 is illustrated as a single medium, the term “machine readable medium” may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 624.
  • machine readable medium may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 624.
  • An apparatus of the machine 600 may be one or more of a hardware processor 602 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 604 and a static memory 606, sensors 621, network interface device 620, antennas 660, a display device 610, an input device 612, a UI navigation device 614, a mass storage 616, instructions 624, a signal generation device 618, and an output controller 628.
  • the apparatus may be configured to perform one or more of the methods and/or operations disclosed herein.
  • the apparatus may be intended as a component of the machine 600 to perform one or more of the methods and/or operations disclosed herein, and/or to perform a portion of one or more of the methods and/or operations disclosed herein.
  • the apparatus may include a pin or other means to receive power.
  • the apparatus may include power conditioning hardware.
  • machine readable medium may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 600 and that cause the machine 600 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding or carrying data structures used by or associated with such instructions.
  • Nonlimiting machine readable medium examples may include solid-state memories, and optical and magnetic media.
  • machine readable media may include: non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; Random Access Memory (RAM); and CD-ROM and DVD-ROM disks.
  • non-volatile memory such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices
  • magnetic disks such as internal hard disks and removable disks
  • magneto-optical disks such as internal hard disks and removable disks
  • RAM Random Access Memory
  • CD-ROM and DVD-ROM disks CD-ROM and DVD-ROM disks.
  • machine readable media may include non-transitory machine- readable media.
  • machine readable media may include machine readable media that is not a transitor
  • the instructions 624 may further be transmitted or received over a communications network 626 using a transmission medium via the network interface device 620 utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.).
  • transfer protocols e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.
  • Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®), IEEE 802.15.4 family of standards, a Long Term Evolution (LTE) family of standards, a Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, among others.
  • LAN local area network
  • WAN wide area network
  • POTS Plain Old Telephone
  • wireless data networks e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®
  • IEEE 802.15.4 family of standards e.g., Institute of Electrical and Electronics Engineers (IEEE
  • the network interface device 620 may include one or more physical jacks (e.g., Ethernet, coaxial, or phonejacks) or one or more antennas to connect to the communications network 626.
  • the network interface device 620 may include one or more antennas 660 to wirelessly communicate using at least one of single-input multiple-output (SIMO), multiple-input multiple-output (MIMO), or multiple-input single-output (MISO) techniques.
  • SIMO single-input multiple-output
  • MIMO multiple-input multiple-output
  • MISO multiple-input single-output
  • the network interface device 620 may wirelessly communicate using Multiple User MIMO techniques.
  • transmission medium shall be taken to include any intangible medium that is capable of storing, encoding or carrying instructions for execution by the machine 600, and includes digital or analog communications signals or other intangible medium to facilitate communication of such software.
  • Examples, as described herein, may include, or may operate on, logic or a number of components, modules, or mechanisms.
  • Modules are tangible entities (e.g., hardware) capable of performing specified operations and may be configured or arranged in a certain manner.
  • circuits may be arranged (e.g., internally or with respect to external entities such as other circuits) in a specified manner as a module.
  • the whole or part of one or more computer systems e.g., a standalone, client or server computer system
  • one or more hardware processors may be configured by firmware or software (e.g., instructions, an application portion, or an application) as a module that operates to perform specified operations.
  • the software may reside on a machine readable medium.
  • the software when executed by the underlying hardware of the module, causes the hardware to perform the specified operations.
  • module is understood to encompass a tangible entity, be that an entity that is physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., transitorily) configured (e.g., programmed) to operate in a specified manner or to perform part or all of any operation described herein.
  • each of the modules need not be instantiated at any one moment in time.
  • the modules comprise a general-purpose hardware processor configured using software
  • the general-purpose hardware processor may be configured as respective different modules at different times.
  • Software may accordingly configure a hardware processor, for example, to constitute a particular module at one instance of time and to constitute a different module at a different instance of time.
  • Some embodiments may be implemented fully or partially in software and/or firmware.
  • This software and/or firmware may take the form of instructions contained in or on a non-transitoiy computer-readable storage medium. Those instructions may then be read and executed by one or more processors to enable performance of the operations described herein.
  • the instructions may be in any suitable form, such as but not limited to source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like.
  • Such a computer-readable medium may include any tangible non- transitoiy medium for storing information in a form readable by one or more computers, such as but not limited to read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory, etc.
  • the wireless device 700 may be a HE device or HE wireless device.
  • the wireless device 700 may be a HE STA 504, HE AP 502, and/or a HE STA or HE AP.
  • a HE STA 504, HE AP 502, and/or a HE AP or HE STA may include some or all of the components shown in FIGS. 1-7.
  • the wireless device 700 may be an example machine 600 as disclosed in conjunction with FIG. 6.
  • the wireless device 700 may include processing circuitry 708.
  • the processing circuitry 708 may include a transceiver 702, physical layer circuitry (PHY circuitry) 704, and MAC layer circuitry (MAC circuitry) 706, one or more of which may enable transmission and reception of signals to and from other wireless devices 700 (e.g., HE AP 502, HE STA 504, and/or legacy devices 506) using one or more antennas 712.
  • the PHY circuitry 704 may perform various encoding and decoding functions that may include formation of baseband signals for transmission and decoding of received signals.
  • the transceiver 702 may perform various transmission and reception functions such as conversion of signals between a baseband range and a Radio Frequency (RF) range.
  • RF Radio Frequency
  • the PHY circuitry 704 and the transceiver 702 may be separate components or may be part of a combined component, e.g., processing circuitry 708.
  • some of the described functionality related to transmission and reception of signals may be performed by a combination that may include one, any or all of the PHY circuitry 704 the transceiver 702, MAC circuitry 706, memory 710, and other components or layers.
  • the MAC circuitry 706 may control access to the wireless medium.
  • the wireless device 700 may also include memory 710 arranged to perform the operations described herein, e.g., some of the operations described herein may be performed by instructions stored in the memory 710.
  • the antennas 712 may comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals. In some multiple-input multiple-output (MIMO) embodiments, the antennas 712 may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result.
  • One or more of the memory 710, the transceiver 702, the PHY circuitry 704, the MAC circuitry 706, the antennas 712, and/or the processing circuitry 708 may be coupled with one another.
  • memory 710, the transceiver 702, the PHY circuitry 704, the MAC circuitry 706, the antennas 712 are illustrated as separate components, one or more of memory 710, the transceiver 702, the PHY circuitry 704, the MAC circuitry 706, the antennas 712 may be integrated in an electronic package or chip.
  • the wireless device 700 may be a mobile device as described in conjunction with FIG. 6.
  • the wireless device 700 may be configured to operate in accordance with one or more wireless communication standards as described herein (e.g., as described in conjunction with FIGS. 1-6, IEEE 802.11).
  • the wireless device 700 may include one or more of the components as described in conjunction with FIG. 6 (e.g., display device 610, input device 612, etc.)
  • the wireless device 700 is illustrated as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements, such as processing elements including digital signal processors (DSPs), and/or other hardware elements.
  • DSPs digital signal processors
  • some elements may comprise one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs) and combinations of various hardware and logic circuitry for performing at least the functions described herein.
  • the functional elements may refer to one or more processes operating on one or more processing elements.
  • an apparatus of or used by the wireless device 700 may include various components of the wireless device 700 as shown in FIG. 7 and/or components from FIGS. 1-6. Accordingly, techniques and operations described herein that refer to the wireless device 700 may be applicable to an apparatus for a wireless device 700 (e.g., HE AP 502 and/or HE STA 504), m some embodiments.
  • the wireless device 700 is configured to decode and/or encode signals, packets, and/or frames as described herein, e.g., PPDUs.
  • the MAC circuitry' 706 may be arranged to contend for a wireless medium during a contention period to receive control of the medium for a HE TXOP and encode or decode an HE PPDU. In some embodiments, the MAC circuitry 706 may be arranged to contend for the wireless medium based on channel contention settings, a transmitting power level, and a clear channel assessment level (e.g., an energy detect level).
  • a clear channel assessment level e.g., an energy detect level
  • the PHY circuitry 704 may be arranged to transmit signals in accordance with one or more communication standards described herein.
  • the PHY circuitry 704 may be configured to transmit a HE PPDU.
  • the PHY circuitry' 704 may include circuitry for modulation/demodulation, upconversion/downconversion, filtering, amplification, etc.
  • the processing circuitry 708 may include one or more processors.
  • the processing circuitry'- 708 may be configured to perform functions based on instructions being stored in a RAM or ROM, or based on special purpose circuitry'.
  • the processing circuitry' 708 may include a processor such as a general purpose processor or special purpose processor.
  • the processing circuitry 708 may implement one or more functions associated with antennas 712, the transceiver 702, the PHY circuitry' 704, the MAC circuitry 706, and/or the memory' 710. In some embodiments, the processing circuitry 708 may be configured to perform one or more of the functions/operations and/or methods described herein.
  • communication between a station e.g.. the HE stations 504 of FIG. 5 or wireless device 700
  • an access point e.g., the HE AP 502 of FIG. 5 or wireless device 700
  • a station e.g. the HE stations 504 of FIG. 5 or wireless device 700
  • an access point e.g., the HE AP 502 of FIG. 5 or wireless device 700
  • beamfomiing techniques may be utilized to radiate energy in a certain direction with certain beam width to communicate between two devices.
  • the directed propagation concentrates transmitted energy toward a target device in order to compensate for significant energy loss in the channel between the two communicating devices.
  • Using directed transmission may extend the range of the muh meter- wave communication versus utilizing the same transmitted energy m omni-directional propagation.
  • a multi-link device is a logical entity that contains one or more STAs.
  • the logical entity has one MAC data service interface and primitives to the LLC and a single address associated with the interface, which can be used to communicate on the DSM.
  • An MLD allows STAs within the multi-link logical entity to have the same MAC address. Different terms may be used for the terms such as MLD.
  • MLD For an infrastructure framework, there is an Multi-link AP device, which includes APs on one side, and Multi-link non-AP device, which includes non-APs on the other side.
  • a Multi-link AP device is a multi-link device, where each STA within the multi-link device is an EHT AP.
  • a Multi-link non-AP device is a multi-link device, where each STA within the multi-link device is a non-AP EHT STA.
  • a technical problem is how to handle multi-link state machine mismatches between non-AP MLD and AP MLDs or another non-AP MLD.
  • a non-AP MLD and AP MLD go through a series of exchanges of information that brings the non-.AP MLD and AP MUD into a state of a state machine where they can exchange data and provide services, classes indicating their relationship.
  • the states may be where different sendees may be provided by the AP MLD to the non-AP MLD.
  • a problem may arise where the mutual understanding between the non-AP MLD and the AP MLD or another non-AP MLD may be mismatched.
  • Embodiments disclosed address the technical problem by resetting the non-AP MLD or AP MID to a common state as described herein.
  • FIG. 8 illustrates MLDs 800, in accordance with some embodiments. Illustrated in FIG. 8 is ML logical entity 1 or non-AP MLD I 806, ML logical entity 2 or non-AP MLD 2 807, ML AP logical entity or AP MLD 808, and ML non-AP logical entity or non-AP MLD 3 809.
  • the non-AP MLD 1 806 includes three STAs, STA1.1 814.1, STA1.2 814.2, and STA1.3 814.3 that operate in accordance with link 1 802.1, link 2 802.2, and link 3 802.3, respectively.
  • non-AP MLD 2 807 includes STA2.1 816.1 , STA2.2 816.2, and STA2.3 816.3 that operate in accordance with link 1 802.1, link 2 802.2, and link 3 802.3, respectively.
  • non-AP MLD 1 806 and non-AP MLD 2 807 operate in accordance with a mesh network. Using three links enables the non-AP MLD 1 806 and non-AP MLD 2
  • the distribution system (DS) 810 indicates how communications are distributed and the DS medium (DSM) 812 indicates the medium that is used for the DS 810, which in this case is the wireless spectrum.
  • AP MLD 808 includes API 830, AP2 832, and AP3 834 operating on link 1 804.1, link 2 804.2, and link 3 804.3, respectively.
  • API 830, AP2 832, and AP3 834 operating on link 1 804.1, link 2 804.2, and link 3 804.3, respectively.
  • MAC address 854 that may be used by applications to transmit and receive data across one or more of API 830, AP2 832, and AP3 834.
  • API 830, AP2 832, and AP3 834 include a frequency band, which are 2.4 GHz band 836, 5 GHz band 838, and 6 GHz band 840, respectively.
  • API 830, AP2 832, and AP3 834 includes different BSSIDs, which are BSSID 842, BSSID 844, and BSSID 846, respectively.
  • API 830, AP2 832, and APS 834 include different media access control (MAC) address (addr), which are MAC adder 848, MAC addr 850, and MAC addr 852, respectively.
  • the AP 502 is an AP MLD 808, in accordance with some embodiments.
  • the STA 504 is a non-AP MLD 3 809, in accordance with some embodiments, [00100]
  • the non-AP MLD 3 809 includes non-AP STA1 818, non-AP STA2 820, and non-AP STA3 822.
  • Each of the non-AP STAs have a MAC address (not illustrated) and the non-AP MLD 3 809 has a MAC address 855 that is different and used by application programs where the data traffic is split up among non-AP STA1 818, non-AP STA2 820, and non-AP ST A3 822.
  • the STA 504 is a non-AP STA1 818, non-AP STA2 820, or non- AP ST A3 822, in accordance with some embodiments.
  • the non-AP STA1 818, non-AP STA2 820, and non-AP STA3 822 may operate as if they are associated with a BSS of API 830, AP2 832, or AP3 834, respectively, over link 1 804.1, link 2 804.2, and link 3 804.3, respectively.
  • a Multi-link device such as non-AP MLD 1 806 or non-AP MLD 2 807, is a logical entity that contains one or more STAs 814, 816.
  • the non-AP MLD 1 806 and non-AP MLD 2 807 each has one MAC data service interface and primitives to the logical link control (LLC) and a single address associated with the interface, which can be used to communicate on the DSM 812.
  • LLC logical link control
  • Multilink logical entity allows STAs 814, 816 within the multi-link logical entity to have the same MAC address, in accordance with some embodiments. In some embodiments a same MAC address is used for application layers and a different MAC address is used per link 802.
  • AP MLD 808 includes APs 830, 838, 840, on one side, and non-AP MLD 3 809 includes non-APs STAs 818, 820, 822 on the other side.
  • AP MLD 808 is a ML logical entity, where each STA within the multi-link logical entity is an EHT AP 502, in accordance with some embodiments.
  • Non-AP MLD 1 806, non-AP MLD 2 807, non-AP MLD 809 are multi-link logical entities, where each STA within the multi-link logical entity is a non-AP EHT STA 504.
  • FIG. 9 illustrates a schematic diagram for states and services between STAs or MLDs, in accordance with some embodiments. Illustrated in FIG. 9 is the relationship between states 902, 904, 906, and 908, and services between a given pair of nonmesh STAs or nonmesh MLDs, e.g., AP MLD 808 and non-AP MLD 3 809.
  • State 1 902 State 2 904, state 3 906, and state 4 908 represent the progress of the steps being performed.
  • MLDs e.g., the AP MLD 808 and the non-MLD 3 809 maintain an enumerated state variable for each remote MLD with which direct communication between the two MLD through affiliated STAs, which includes non-APs and AP, of the two MLDs is performed.
  • the states are the four states of FIG. 9.
  • State 1 902, state 2 904, state 3 906, and state 4 908 illustrate the relationship between an AP MLD 808 and a non-AP MLD 3 809.
  • State 1 902 is unauthenticated and unassociated where class 1 frames may be exchanged.
  • State 2 904 is authenticated and unassociated where class 1 and 2 frames may be exchanged.
  • State 3 906 is authenticated and associated where class 1, 2, and 3 frames may be exchanged.
  • State 4 908 is authenticated, associated, and IEEE 802. IX controlled port is unblock where class 1, 2, 3 frames may be exchanged and where port 802. IX is unblocked for forwarding data frames to higher layers.
  • State transition 922 indicates successful IEEE 802.11 authentication or FLS authentication.
  • State transition 924 indicates successful association or reassociation where Robust Security Network Association (RSNA) may be required.
  • RSNA Robust Security Network Association
  • the multi -link element may be exchanged that includes information on the links, e.g., link 1 804.1, link 2 804.2, and link 804.3, that are used between AP MLD 808 and non-AP MLD 3 809.
  • State transition 926 indicates a successful 4-way handshake. If RSNA is not required, then State transition 924 may move the state to state 4 rather than state 3.
  • State transition 910 indicates successful association or reassociation, fast BSS/ML transition, PBSS -4 -way handshake was successful, or FILS reassociation or association and key confirmation.
  • State transitions 912, 918 indicate unsuccessful association or reassociation or dissociation.
  • State transitions 914, 916, and 920 indicate deauthentication.
  • Class 1 frames include control frames, which include RTS, CTS, DMG Clear to send (DMG CTS), Ack, Grant, SSW, SSW-Feedback, SSW-Ack, Grant Ack, CF-End, Block Ack (BlockAck)( in an IBSS and in a PBSS when dotl 1 RSNA Activated is false), and Block Ack Request (BlockAckReq)(when dotl 1 RSNA Activated is false in an IBSS and in a PBSS).
  • control frames include RTS, CTS, DMG Clear to send (DMG CTS), Ack, Grant, SSW, SSW-Feedback, SSW-Ack, Grant Ack, CF-End, Block Ack (BlockAck)( in an IBSS and in a PBSS when dotl 1 RSNA Activated is false), and Block Ack Request (BlockAckReq)(when dotl 1 RSNA Activated is false in an IBSS
  • Class 1 frames further include Management frames, which include Probe Request/Response, Beacon, Authentication, Deauthentication, ATIM, Public Action, Self-protected Action, all .Action frames and all Action No Ack frames (in an IBSS), Unprotected DMG Action frames, and all Action and Action No Ack frames (In a PBSS when dotl IRSNAActivated is false) except the following frames: ADDTS Request, ADDTS Response, and DELTS.
  • Class 1 frames further include data frames, which include data frames between IBSS STAs and data frame within a PBSS.
  • Class 1 frames include (Ed) Extension frames, which includes DMG Beacon frames.
  • Class 2 frames include management frames, which includes Association Request/Response, Reassociation Request/Response, and Disassociation.
  • Class 3 frames include data frames, which include data frames between STAs in an infrastructure BSS or in an MBSS, and Data frames between an AP MLD and a non-AP MLD associated with the .Al 5 MLD.
  • Class 3 frames include Management frames, which includes in an infrastructure BSS, an MBSS, or a PBSS, all Action and Action No Ack frames except those that are declared to be Class 1 or Class 2 frames. And management frames Between an AP MLD and a non-AP MLD associated with the AP MLD, all Action and Action No Ack frames except those that are declared to be Class 1 or Class 2 frames.
  • Class 3 frames further include control frames, which include PS-Poll, Poll, SPR, DMG DPS, Block Ack (BlockAck), except those that are declared to be Class 1, and Block Ack Request (BlockAckReq), except those that are declared to be Class 1 frames.
  • control frames which include PS-Poll, Poll, SPR, DMG DPS, Block Ack (BlockAck), except those that are declared to be Class 1, and Block Ack Request (BlockAckReq), except those that are declared to be Class 1 frames.
  • a state mismatch from the perspective of the AP MLD 808 and non-AP MLD 3 809 which, in some embodiments, is referred to as a non-AP STA MLD, is when frames are received that are in a higher class than indicated by the state.
  • a state mismatch occurs when an AP MLD or non-AP MLD receives class 2 or class 3 frame from an AP MLD or non-AP MLD that the receiving AP MLD or non-AP MLD considers as state 1, or when receiving a class 3 frame from a peer AP MLD or non-AP MLD that the receiving AP MLD or non-AP MLD considers as state 2.
  • the response is to send a dis-authentication frame or a disassociation frame to correct the state of the peer .
  • AP MLD or non- AP MLD or STA. For example, if STA A in an infrastructure BSS receives a Class 2 or Class 3 frame from STA B that is not authenticated with STA A (i.e., the state for STA B is State 1), STA A discards the frame. If the frame has an individual address in the Address 1 field, the MLME of STA A sends a Deauthentication frame to STA B.
  • a non-DMG STA A in an infrastructure BSS receives a Class 3 frame from STA B that is authenticated but not associated with STA A (i.e., the state for STA B is State 2)
  • STA A shall discard the frame. If the frame has an individual address m the Address 1 field, the MLME of STA A shall send a Disassociation frame to STA B.
  • an AP MLD 808 to exchange data with the non-AP MLD 3 809, there are several steps to be done before data frame can be exchanged.
  • the non-AP MLD 808 is in state 1 902 (unauthenticated, unassociated) from the perspective of AP MLD 808 and non-AP MLD 3 809.
  • state 1 902 class 1 frames can be transmitted between the AP MLD 808 and non-AP MLD 3 809.
  • there is a successful authentication process that changes the state of non-AP MLD 3 809 to state 2 (authenticated, unassociated) from the perspective of the AP M LD 808 and the non-AP MLD 3 809.
  • class 1 & 2 frames can be transmitted between the AP MLD 808 and the non-AP MLD 809.
  • state 3 906 authentication, associated, pending RSNA
  • class 1 & 2 & 3 frames can be transmitted between AP MLD 808 and non-AP MLD 3 809.
  • 4- way handshake that changes the state of non-AP MLD 3 809 to state 4 908 (authenticated, associated, RSNA established) from the perspective of AP MLD
  • class 1 & 2 & 3 frames can be transmitted between the AP MLD 808 and the non-AP MLD 809, and the 802. IX controlled port is unblocked to forward data frames to higher layers.
  • AP MLD 808 and the non-AP MLD 3 809 determine which links are setup or re-setup between the AP MLD 808 and the non-AP MLD 3 809.
  • the multi-link setup or re-setup method is built on top of the association or reassociation request/ response frame exchange. After the multilink setup or re-setup, i.e., state 3 906, the AP MLD 808 and the non-AP M LD 3
  • An example state mismatch is that MLD A thinks MLD B is in state 1 or 2, but MLD B thinks MLD A is in state 3. If MLD A receives a class 2 or a class 3 frames from MLD B, then MLD A cannot map the frame to be from MLD B since MLD A does not have any link information at this point for MLD B. As a result, MLD A cannot send back disassociation frame and di sauthenti cation frame directly to MLD B because the multi-link element has not been exchanged or the information is not associated with MLD B.
  • the AP MLD 808 or the non-AP MLD 3 809 For a received class 3 frame, if the AP MLD 808 or the non-AP MLD 3 809 cannot identify the MLD that sends the class 3 frame, then the AP MLD 808 or the non-AP MLD 3 809 sends back a disassociation frame. This will correct the peer MLD to state 2. If there is still a. state mismatch, a class 2 frame will be received, and a dis-authentication frame can then be sent to correct the peer MLD to state 1. In some embodiments, the state mismatch problem for two MLDs is resolved by carrying the MLD address in a disassociation frame. [00119] The MLD that sends the disassociation frame through any of its affiliated STAs or APs will carry 7 its MLD address in the disassociation frame. The MLD address can be carried in the Multi -link element in the disassociation frame.
  • any affiliated STA of MLD A receives a Class 2 frame from a STA affiliated with an MLD B that is not authenticated with MLD A (i.e., the state for MLD B is State 1)
  • MLD A shall discard the frame.
  • the MLME of MLD A shall send a Deauthentication frame to the MLD B.
  • the dis-authentication frame can be sent to any STA affiliated with the MLD B
  • the RA of the dis-authentication frame can be the TA of the received class 2 frame.
  • the TA of the dis-authentication frame can be the RA of the received class 2 frame.
  • the address 1 field corresponds to the receiver address (RA) field.
  • MLD A shall discard the frame. If the frame has an individual address in the Address 1 field, the Ml, Mb. of MLD A shall send a
  • FIG. 10 illustrates a basic multi-lmk element 1000, in accordance with some embodiments.
  • the multi-link element 1000 may be encoded within a management frame, e.g., association or re-association, or another frame.
  • the multi -link element 1000 may include MAC address 1002, which is the MAC address that may be used to address the MLD such as MAC address 854 and MAC address 855.
  • the multi-link element 1000 includes a per-STA profile 1004, which includes operating information per-STA profile 1004 including a MAC address 1006.
  • non-AP MLD 3 809 has a MAC address 855 and each of non-AP STA1 818, non-AP STA2 820, and non-AP STA3 822 has a MAC address (not associated).
  • AP MLD 808 has a MAC address 854 corresponding to MAC address 1002.
  • the multi-link element 1000 is exchanged during the change from state 2 904 and state 3 906.
  • frames may use the MAC address 854 as the receiver address or the destination address.
  • the AP MLD 808 and non-AP MLD 3 809 maintain the MAC addresses and frames are addressed to the MLD MAC address, MAC address 854 or MAC address 855, and then a decision is made which link to use and the frame addressing is changed appropriately for the selected link, e.g., MAC address 852 as the RA or TA if link 3 804.3 is selected.
  • the MLD MAC address 854 or 855 is used as the destination or source address and the RA or TA address is the MAC address associated with the link that is actually receiving or transmitting, respectively, the frame.
  • the MLD may identify another MLD based on the MAC addresses associated with the links, e.g., non-AP MLD 3 809 may identify AP MLD 808 based on MAC address 848, MAC address 850, and MAC address 852,
  • the MLD cannot identify the other MLD, though, if the MLD has not received the multi-link element 1000 and considers the other MLD and itself to be in state 3.
  • Each MLD maintains a state variable for each MLD it is communicating with.
  • the state variable includes an indication for the following: State 1: Initial start state for MLDs that perform IEEE 802.1 1 authentication. Unauthenticated and unassociated. Only Class 1 frames allowed. State 2: Authenticated but unassociated. Only Class 1 and 2 frames allowed.
  • State 3 Authenticated and associated (Pending RSNA Authentication).
  • the IEEE 802. IX Controlled Port is blocked. Class 1, 2, and 3 frames are allowed.
  • State 4 Authenticated and associated (RSNA Established or Not Required).
  • the IEEE 802. IX Controlled Port is unblocked, or not present.
  • a STA affiliated with the MED does not transmit Class 2 frames unless the MLD is in State 2 or State 3 or State 4.
  • a STA affdiated with an MLD does not transmit Class 3 frames unless the MLD is in State 3 or State 4.
  • FIG. 11 illustrates a method 1100 of multi-link state machine mismatch resolution, in accordance with some embodiments.
  • the method 1100 begins at operation 1102 with decoding a frame.
  • the AP MLD 808 or the non-AP MLD 809 may decode a frame of class 1, 2, 3, or 4.
  • the method 1100 continues at operation 1104 with retrieving a class of the frame.
  • the AP MLD 808 or the non-AP MLD 809 may store the information regarding the classes of frames and determine or retrieve the class of the frame decoded.
  • the method 1100 continues at operation 1106 with in response to the frame being a class 2 frame from a station of a second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authenti cation frame with a receiver address of a transmitter address of the frame.
  • the AP MLD 808 or the non-AP MLD 809 may as indicated in rows 1 and 3 of Table 1 discard the frame and, if the frame is individually addressed, encode and transmit a de-authentication frame where the receiver address is based on a transmitter address of the received frame.
  • the method 1100 continues at operation 1108 with in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
  • the AP MLD 808 or the non-AP MLD 809 may as indicated in rows 2 and 4 of Table 1 discard the frame and, if the frame is individually addressed, encode and transmit a disassociation frame where the receiver address is based on a transmitter address of the received frame.
  • the method 2000 may be performed by an apparatus of a non-AP of a non-AP MLD or an apparatus of a non-AP MLD.
  • the method 1100 may include one or more additional instructions.
  • the method 1100 may be performed in a different order.
  • One or more of the operations of method 1100 may be optional.
  • Example 1 is an apparatus for a first multi-link device (MLD), the apparatus including memory; and processing circuitry coupled to the memory, the processing circuitry configured to: decode a frame, retrieve a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
  • MLD multi-link device
  • Example 2 the subject matter of Example 1 includes wherein the state of 1 indicates an initial start state between the first MLD and the second MLD, the state of 2 indicates that the first MLD and the second MLD are authenticated and unassociated, the state of 3 indicates that the first MLD and the second MLD are authenticated and associated with the Institute for Electrical and Electronic Engineers (IEEE) controlled port being blocked, and a state of 4 indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
  • the state of 1 indicates an initial start state between the first MLD and the second MLD
  • the state of 2 indicates that the first MLD and the second MLD are authenticated and unassociated
  • the state of 3 indicates that the first MLD and the second MLD are authenticated and associated with the Institute for Electrical and Electronic Engineers (IEEE) controlled port being blocked
  • IEEE Institute for Electrical and Electronic Engineers
  • Example 3 the subject matter of Examples 1 -2 includes, wherein the first MLD stores the state of the second MLD in the memory, and wherein the state indicates a relationship between the first MLD and the second MLD.
  • Example 4 the subject matter of Examples 1-3 includes, wherein the first MLD and the second MLD are configured to refrain from transmitting frames having the class with a greater number than the state.
  • Example 5 the subject matter of Example 4 includes, wherein the state is 1, 2, 3, or 4.
  • Example 6 the subject matter of Examples I -5 includes, wherein the first MLD and the second MLD are one of the following group: a non-access point (AP) MLD or an AP MLD, and wherein the first MLD and the second MLD are configured to operate on at least one of the following bands: 2.4 GHz, 5 GHz, and 6 GHz.
  • AP non-access point
  • Example 7 the subject matter of Examples 1-6 includes, wherein the processing circuitry is further configured to: decode an association request frame or a reassociation request frame from the second MLD, the association request frame or the reassociation request frame including a multilink element; encode, for transmission, an association response frame or reassociation response frame to the second MLD; and change the value of the state of the second MLD from 2 to 3 if a Robust Security Network Association (RSNA) is pending and from 2 to 4 if the RSNA is not pending.
  • RSNA Robust Security Network Association
  • Example 8 the subject matter of Examples 1-7 includes, wherein the processing circuitry is further configured to: send a disassociation frame to the station of the second MLD that is not in state 1, the disassociation frame including a multi-link element with the MLD MAC address of the first MLD.
  • Example 9 the subject matter of Examples 1-8 includes, wherein the processing circuitry' is further configured to: send a disassociation frame with a value of the broadcast address in an address 1 subfield of the disassociation frame, the disassociation frame including a multi-link element with the MLD M AC address of the first MLD.
  • Example 10 the subject matter of Examples 1-9 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station; decode, from the second station, a de-authenti cation frame, and set the state of the second MLD to 1.
  • Example 11 the subject matter of Examples 1-10 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a ciass 3 frame to the station of the second MLD, wherein a receiver address of the class 3 frame comprises the media access control address of the station, decode, from the second station, a dissociation frame, and set the state of the second MLD to 2.
  • Example 12 the subject matter of Examples 1-11 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station; decode, from the second station, a de-authenti cation frame; and set the state of the second MLD to 1.
  • Example 13 the subject matter of Examples 1—12 includes, frame, and Block Ack Request (BlockAckReq).
  • Example 14 the subject matter of Examples 1-13 includes, transceiver circuitry coupled to the processing circuitry, the transceiver circuitry’ coupled to two or more patch antennas for receiving signalling in accordance with a multiple-input multiple-output (MIMO) technique.
  • MIMO multiple-input multiple-output
  • Example 15 the subject matter of Examples 1—14 includes, transceiver circuitry' coupled to the processing circuitry', the transceiver circuitry’ coupled to two or more microstrip antennas for receiving signaling in accordance with a multiple-input multiple-output (MIMO) technique.
  • MIMO multiple-input multiple-output
  • Example 16 is a non-transitory computer-readable storage medium that stores instructions for execution by one or more processors of an apparatus for a first multi-link device (MLD), the instructions to configure the one or more processors to: decode a frame; retrieve a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a deauthentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD m the state of 1 or 2 with the first MLD, discard the frame, and m response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
  • MLD multi-link device
  • Example 17 the subject matter of Example 16 includes, indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
  • Example 18 the subject matter of Examples 16—17 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station, decode, from the second station, a de-authentication frame; and set the state of the second MLD to 1.
  • Example 19 is a method performed by an apparatus for a first multi-link device (MLD), the method including: decoding a frame; retrieving a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassoci ation frame, for transmissi on, with the receiver address of the transmitter address of the frame.
  • MLD multi-link device
  • Example 20 the subject matter of Example 19 includes, indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
  • Example 21 is at least one machine-readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations to implement of any of Exampl es 1—20.
  • Example 22 is an apparatus including means to implement of any of Examples 1-20.
  • Example 23 is a system to implement of any of Examples 1- 20.
  • Example 24 is a method to implement of any of Examples 1-20.

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Abstract

Methods, apparatuses, and computer readable media for communicating elements between multi-link devices are disclosed. Apparatuses of a first multi-link device (MLD) are disclosed, where the apparatuses comprise processing circuitry configured to decode a frame, determine a class of the frame, and if a determination indicates the frame is a class 2 frame from a second MLD in a state of 1 with the first MLD, discard the frame, and if the frame is an individually addressed frame, encode a de-authentication frame with a receiver address of a transmitter address of the frame. The processing circuitry may be further configured to if a determination indicates the frame is a class 3 frame from the second MLD in the state of 1 or 2, discard the frame, and if the frame is individually addressed frame, encode a disassociation frame with the receiver address of the transmitter address of the frame.

Description

MULTI-LINK STATE MACHINE MISMATCH RESOLUTION
PRIORITY CLAIM
[0001] This application claims the benefit of priority to United States Provisional Patent Application Serial No. 63/091,613, filed October 14, 2020, which is incorporated herein by reference in their entirety.
TECHNICAL FIELD
[0002] Embodiments relate to multi-link devices (MLDs) operating in accordance with wireless local area networks (WLANs) and Wi-Fi networks including networks operating in accordance with different versions or generations of the IEEE 802.11 family of standards. Some embodiments relate to resolving multi-link state machine mismatches between an access point (AP) MLD and non-APs MLDs.
BACKGROUND
[0003] Efficient use of the resources of a wireless local-area network
(WLAN) is important to provide bandwidth and acceptable response times to the users of the WLAN. However, often there are many devices tiying to share the same resources and some devices may be limited by the communication protocol they use or by their hardware bandwidth. Moreover, wireless devices may need to operate with both newer protocols and with legacy device protocols.
BRIEF DESCRIPTION OF THE DRAWINGS
[0004] The present disclosure is illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:
[0005] FIG. 1 is a block diagram of a radio architecture in accordance with some embodiments.
[0006] FIG. 2 illustrates a front-end module circuitry for use in the radio architecture of FIG. 1 in accordance with some embodiments. [0007] FIG. 3 illustrates a radio IC circuitry for use in the radio architecture of FIG. 1 in accordance with some embodiments.
[0008] FIG. 4 illustrates a baseband processing circuitry for use in the radio architecture of FIG.1 in accordance with some embodiments.
[0009] FIG. 5 illustrates a WLAN in accordance with some embodiments.
[0010] FIG. 6 illustrates a block diagram of an example machine upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform.
[0011] FIG. 7 illustrates a block diagram of an example wireless device upon which any one or more of the techniques (e.g., methodologies or operations) discussed herein may perform.
[0012] FIG. 8 illustrates a MLDs, in accordance with some embodiments.
[0013] FIG. 9 illustrates a schematic diagram for states and services between ST As or MLDs, in accordance with some embodiments.
[0014] FIG. 10 illustrates a basic multi-link element, in accordance with some embodiments.
[0015] FIG. 11 illustrates a method of multi-link state machine mismatch resolution, in accordance with some embodiments.
DESCRIPTION
[0016] The following description and the drawings sufficiently illustrate specific embodiments to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. Portions and features of some embodiments may be included in, or substituted for, those of other embodiments. Embodiments set forth in the claims encompass all available equivalents of those claims.
[0017] Some embodiments relate to methods, computer readable media, and apparatus for ordering or scheduling location measurement reports, traffic indication maps (TIMs), and other information during SPs. Some embodiments relate to methods, computer readable media, and apparatus for extending TIMs. Some embodiments relate to methods, computer readable media, and apparatus for defining SPs during beacon intervals (BI), which may be based on TWTs. [0018] FIG. 1 is a block diagram of a radio architecture 100 in accordance with some embodiments. Radio architecture 100 may include radio front-end module (FEM) circuitry 104, radio IC circuitry 106 and baseband processing circuitry 108. Radio architecture 100 as shown includes both Wireless Local Area Network (WLAN) functionality and Bluetooth (BT) functionality although embodiments are not so limited. In this disclosure, “WLAN” and “Wi-Fi” are used interchangeably.
[0019] FEM circuitry 104 may include a WLAN or Wi-Fi FEM circuitry 104A and a Bluetooth (BT) FEM circuitry 104B. The WLAN FEM circuitry 104A may include a receive signal path comprising circuitry configured to operate on WLAN RF signals received from one or more antennas 101, to amplify the received signals and to provide the amplified versions of the received signals to the WLAN radio IC circuitry 106A for further processing. The BT FEM circuitry 104B may include a receive signal path which may include circuitry configured to operate on BT RF signals received from one or more antennas 101, to amplify the received signals and to provide the amplified versions of the received signals to the BT radio IC circuitry 106B for further processing. FEM circuitry 104A may also include a transmit signal path which may include circuitry configured to amplify WLAN signals provided by the radio IC circuitry 106A for wireless transmission by one or more of the antennas 101. In addition, FEM circuitry 104B may also include a transmit signal path which may include circuitry configured to amplify BT signals provided by the radio IC circuitry 106B for wireless transmission by the one or more antennas. In the embodiment of FIG. 1, although FEM 104A and FEM 104B are shown as being distinct from one another, embodiments are not so limited, and include within their scope the use of an FEM (not shown) that includes a transmit path and/or a receive path for both WLAN and BT signals, or the use of one or more FEM circuitries where at least some of the FEM circuitries share transmit and/or receive signal paths for both WLAN and BT signals.
[0020] Radio IC circuitry 106 as shown may include WLAN radio IC circuitry 106A and BT radio IC circuitry 106B. The WLAN radio IC circuitry 106A may include a receive signal path which may include circuitry to downconvert WLAN RF signals received from the FEM circuitry 104A and provide baseband signals to WLAN baseband processing circuitry 108A. BT radio IC circuitry 106B may in turn include a receive signal path which may include circuitry to down-convert BT RF signals received from the FEM circuitry 104B and provide baseband signals to BT baseband processing circuitry 108B. WLAN radio IC circuitry 106A may also include a transmit signal path which may include circuitry to up-convert WLAN baseband signals provided by the WLAN baseband processing circuitry 108A and provide WLAN RF output signals to the FEM circuitry 104A for subsequent wireless transmission by the one or more antennas 101. BT radio IC circuitry 106B may also include a transmit signal path which may include circuitry to up-convert BT baseband signals provided by the BT baseband processing circuitry 108B and provide BT RF output signals to the FEM circuitry 104B for subsequent wireless transmission by the one or more antennas 101. In the embodiment of FIG. 1, although radio IC circuitries 106A and 106B are shown as being distinct from one another, embodiments are not so limited, and include within their scope the use of a radio IC circuitry (not shown) that includes a transmit signal path and/or a receive signal path for both WLAN and BT signals, or the use of one or more radio IC circuitries where at least some of the radio IC circuitries share transmit and/or receive signal paths for both WLAN and BT signals.
[0021] Baseband processing circuity 108 may include a WLAN baseband processing circuitry 108A and a BT baseband processing circuitry 108B. The WLAN baseband processing circuitry 108A may include a memory, such as, for example, a set of RAM arrays in a Fast Fourier Transform or Inverse Fast Fourier Transform block (not shown) of the WLAN baseband processing circuitry 108A. Each of the WLAN baseband circuitry 108A and the BT baseband circuitry 108B may further include one or more processors and control logic to process the signals received from the corresponding WLAN or BT receive signal path of the radio IC circuitry 106, and to also generate corresponding WLAN or BT baseband signals for the transmit signal path of the radio IC circuitry 106. Each of the baseband processing circuitries 108A and 108B may further include physical layer (PHY) and medium access control layer (MAC) circuitry, and may further interface with application processor 111 for generation and processing of the baseband signals and for controlling operations of the radio IC circuitry 106.
[0022] Referring still to FIG. 1, according to the shown embodiment, WLAN-BT coexistence circuitry 113 may include logic providing an interface between the WLAN baseband circuitry 108A and the BT baseband circuitry 108B to enable use cases requiring WLAN and BT coexistence. In addition, a switch 103 may be provided between the WLAN FEM circuitry 104 A and the BT FEM circuitry 104B to allow switching between the WLAN and BT radios according to application needs. In addition, although the antennas 101 are depicted as being respectively connected to the WLAN FEM circuitry 104 A and the BT FEM circuitry 104B, embodiments include within their scope the sharing of one or more antennas as between the WLAN and BT FEMs, or the provision of more than one antenna connected to each of FEM 104A or 104B.
[0023] In some embodiments, the front-end module circuitry 104, the radio IC circuitry 106, and baseband processing circuitry 108 may be provided on a single radio card, such as wireless radio card 102. In some other embodiments, the one or more antennas 101, the FEM circuitry 104 and the radio IC circuitry 106 may be provided on a single radio card. In some other embodiments, the radio IC circuitry 106 and the baseband processing circuitry 108 may be provided on a single chip or IC, such as IC 112.
[0024] In some embodiments, the wireless radio card 102 may include a WLAN radio card and may be configured for Wi-Fi communications, although the scope of the embodiments is not limited in this respect. In some of these embodiments, the radio architecture 100 may be configured to receive and transmit orthogonal frequency division multiplexed (OFDM) or orthogonal frequency division multiple access (OFDMA) communication signals over a multicarrier communication channel. The OFDM or OFDMA signals may comprise a plurality of orthogonal subcarriers.
[0025] In some of these multi carrier embodiments, radio architecture 100 may be part of a Wi-Fi communication station (STA) such as a wireless access point (AP), a base station or a mobile device including a Wi-Fi device. In some of these embodiments, radio architecture 100 may be configured to transmit and receive signals in accordance with specific communication standards and/or protocols, such as any of the Institute of Electrical and Electronics Engineers (IEEE) standards including, IEEE 802.1 ln-2009, IEEE 802.11-2012, IEEE 802.11-2016, IEEE 802.1 lac, and/or IEEE 802.1 lax standards and/or proposed specifications for WLANs, although the scope of embodiments is not limited in this respect. Radio architecture 100 may also be suitable to transmit and/or receive communications in accordance with other techniques and standards. [0026] In some embodiments, the radio architecture 100 may be configured for high-efficiency (HE) Wi-Fi (HEW) communications in accordance with the IEEE 802.1 lax standard. In these embodiments, the radio architecture 100 may be configured to communicate in accordance with an OFDMA technique, although the scope of the embodiments is not limited in this respect.
[0027] In some other embodiments, the radio architecture 100 may be configured to transmit and receive signals transmitted using one or more other modulation techniques such as spread spectrum modulation (e.g., direct sequence code division multiple access (DS-CDMA) and/or frequency hopping code division multiple access (FH-CDMA)), time-division multiplexing (TDM) modulation, and/or frequency-division multiplexing (FDM) modulation, although the scope of the embodiments is not limited in this respect.
[0028] In some embodiments, as further shown in FIG. 1 , the BT baseband circuitry 108B may be compliant with a Bluetooth (BT) connectivity standard such as Bluetooth, Bluetooth 4.0 or Bluetooth 5.0, or any other iteration of the Bluetooth Standard. In embodiments that include BT functionality as shown for example in Fig. 1, the radio architecture 100 may be configured to establish a BT synchronous connection oriented (SCO) link and/or a BT low energy (BT LE) link. In some of the embodiments that include functionality, the radio architecture 100 may be configured to establish an extended SCO (eSCO) link for BT communications, although the scope of the embodiments is not limited in this respect. In some of these embodiments that include a BT functionality, the radio architecture may be configured to engage in a BT Asynchronous Connection-Less (ACL) communications, although the scope of the embodiments is not limited in this respect. In some embodiments, as shown in FIG. 1, the functions of a BT radio card and WLAN radio card may be combined on a single wireless radio card, such as single wireless radio card 102, although embodiments are not so limited, and include within their scope discrete WLAN and BT radio cards
[0029] In some embodiments, the radio-architecture 100 may include other radio cards, such as a cellular radio card configured for cellular (e.g., 3 GPP such as LTE, LTE- Advanced or 5G communications).
[0030] In some IEEE 802.11 embodiments, the radio architecture 100 may be configured for communication over various channel bandwidths including bandwidths having center frequencies of about 900 MHz, 2.4 GHz, 5 GHz, and bandwidths of about 1 MHz, 2 MHz, 2.5 MHz, 4 MHz, 5MHz, 8 MHz, 10 MHz, 16 MHz, 20 MHz, 40MHz, 80MHz (with contiguous bandwidths) or 80+80MHz (160MHz) (with non-contiguous bandwidths). In some embodiments, a 320 MHz channel bandwidth may be used. The scope of the embodiments is not limited with respect to the above center frequencies however.
[0031] FIG. 2 illustrates FEM circuitry 200 in accordance with some embodiments. The FEM circuitry 200 is one example of circuitry that may be suitable for use as the WLAN and/or BT FEM circuitry 104A/104B (FIG. 1), although other circuitry configurations may also be suitable.
[0032] In some embodiments, the FEM circuitry 200 may include a TX/RX switch 202 to switch between transmit mode and receive mode operation. The FEM circuitry 200 may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry 200 may include a low-noise amplifier (LNA) 206 to amplify received RF signals 203 and provide the amplified received RF signals 207 as an output (e.g., to the radio IC circuitry 106 (FIG. 1)). The transmit signal path of the circuitry 200 may include a power amplifier (PA) to amplify input RF signals 209 (e.g., provided by the radio IC circuitry 106), and one or more filters 212, such as band-pass filters (BPFs), low-pass filters (LPFs) or other types of filters, to generate RF signals 215 for subsequent transmission (e.g., by one or more of the antennas 101 (FIG. 1)). [0033] In some dual-mode embodiments for Wi-Fi communication, the FEM circuitry 200 may be configured to operate in either the 2.4 GHz frequency spectrum or the 5 GHz frequency spectrum. In these embodiments, the receive signal path of the FEM circuitry 200 may include a receive signal path duplexer 204 to separate the signals from each spectrum as well as provide a separate LNA 206 for each spectrum as shown. In these embodiments, the transmit signal path of the FEM circuitry 200 may also include a power amplifier 210 and a filter 212, such as a BPF, a LPF or another type of filter for each frequency spectrum and a transmit signal path duplexer 214 to provide the signals of one of the different spectrums onto a single transmit path for subsequent transmission by the one or more of the antennas 101 (FIG. 1). In some embodiments, BT communications may utilize the 2.4 GHZ signal paths and may utilize the same FEM circuitry 200 as the one used for WLAN communications.
[0034] FIG. 3 illustrates radio integrated circuit (IC) circuitry 300 in accordance with some embodiments. The radio IC circuitry 300 is one example of circuitry that may be suitable for use as the WLAN or BT radio IC circuitry 106A/106B (FIG. 1), although other circuitry configurations may also be suitable.
[0035] In some embodiments, the radio IC circuitry 300 may include a receive signal path and a transmit signal path. The receive signal path of the radio IC circuitry 300 may include at least mixer circuitry 302, such as, for example, down-conversion mixer circuitry, amplifier circuitry 306 and filter circuitry 308. The transmit signal path of the radio IC circuitry 300 may include at least filter circuitry 312 and mixer circuitry 314, such as, for example, up- conversion mixer circuitry. Radio IC circuitry 300 may also include synthesizer circuitry 304 for synthesizing a frequency 305 for use by the mixer circuitry 302 and the mixer circuitry 314. The mixer circuitry 302 and/or 314 may each, according to some embodiments, be configured to provide direct conversion functionality. The latter type of circuitry presents a much simpler architecture as compared with standard super-heterodyne mixer circuitries, and any flicker noise brought about by the same may be alleviated for example through the use of OFDM modulation. Fig. 3 illustrates only a simplified version of a radio IC circuitry, and may include, although not shown, embodiments where each of the depicted circuitries may include more than one component. For instance, mixer circuitry 320 and/or 314 may each include one or more mixers, and filter circuitries 308 and/or 312 may each include one or more filters, such as one or more BPFs and/or LPFs according to application needs. For example, when mixer circuitries are of the direct-conversion type, they may each include two or more mixers.
[0036] In some embodiments, mixer circuitry 302 may be configured to down-convert RF signals 207 received from the FEM circuitry 104 (FIG. 1) based on the synthesized frequency 305 provided by synthesizer circuitry 304. The amplifier circuitry 306 may be configured to amplify the down-converted signals and the filter circuitry 308 may include a LPF configured to remove unwanted signals from the down-converted signals to generate output baseband signals 307. Output baseband signals 307 may be provided to the baseband processing circuitry 108 (FIG. 1) for further processing. In some embodiments, the output baseband signals 307 may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 302 may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
[0037] In some embodiments, the mixer circuitry 314 may be configured to up-convert input baseband signals 311 based on the synthesized frequency 305 provided by the synthesizer circuitry 304 to generate RF output signals 209 for the FEM circuitry 104. The baseband signals 311 may be provided by the baseband processing circuitry 108 and may be filtered by filter circuitry 312. The filter circuitry 312 may include a LPF or a BPF, although the scope of the embodiments is not limited in this respect.
[0038] In some embodiments, the mixer circuitry 302 and the mixer circuitry 314 may each include two or more mixers and may be arranged for quadrature down-conversion and/or up-conversion respectively with the help of synthesizer 304. In some embodiments, the mixer circuitry 302 and the mixer circuitry 314 may each include two or more mixers each configured for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 302 and the mixer circuitry 314 may be arranged for direct downconversion and/or direct up-conversion, respectively. In some embodiments, the mixer circuitry 302 and the mixer circuitry 314 may be configured for superheterodyne operation, although this is not a requirement.
[0039] Mixer circuitry 302 may comprise, according to one embodiment: quadrature passive mixers (e.g., for the in-phase (I) and quadrature phase (Q) paths). In such an embodiment, RF input signal 207 from Fig. 3 may be down- converted to provide I and Q baseband output signals to be sent to the baseband processor
[0040] Quadrature passive mixers may be driven by zero and ninetydegree time-varying LO switching signals provided by a quadrature circuitry which may be configured to receive a LO frequency (fro) from a local oscillator or a synthesizer, such as LO frequency 305 of synthesizer 304 (FIG. 3). In some embodiments, the LO frequency may be the carrier frequency, while in other embodiments, the LO frequency may be a fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency). In some embodiments, the zero and ninety-degree time-varying switching signals may be generated by the synthesizer, although the scope of the embodiments is not limited in this respect.
[0041] In some embodiments, the LO signals may differ in duty cycle (the percentage of one period in which the LO signal is high) and/or offset (the difference between start points of the period). In some embodiments, the LO signals may have a 25% duty cycle and a 50% offset. In some embodiments, each branch of the mixer circuitry (e.g., the in-phase (I) and quadrature phase (Q) path) may operate at a 25% duty cycle, which may result in a significant reduction is power consumption.
[0042] The RF input signal 207 (FIG. 2) may comprise a balanced signal, although the scope of the embodiments is not limited in this respect. The I and Q baseband output signals may be provided to low-nose amplifier, such as amplifier circuitry 306 (FIG. 3) or to filter circuitry 308 (FIG. 3).
[0043] In some embodiments, the output baseband signals 307 and the input baseband signals 311 may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals 307 and the input baseband signals 311 may be digital baseband signals. In these alternate embodiments, the radio IC circuitry may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry.
[0044] In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, or for other spectrums not mentioned here, although the scope of the embodiments is not limited in this respect.
[0045] In some embodiments, the synthesizer circuitry 304 may be a fractional-N synthesizer or a fractional N/N+l synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 304 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider. According to some embodiments, the synthesizer circuitry 304 may include digital synthesizer circuitry. An advantage of using a digital synthesizer circuitry is that, although it may still include some analog components, its footprint may be scaled down much more than the footprint of an analog synthesizer circuitry. In some embodiments, frequency input into synthesizer circuity 304 may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. A divider control input may further be provided by either the baseband processing circuitry 108 (FIG. 1) or the application processor 111 (FIG. 1) depending on the desired output frequency 305. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table (e.g., within a Wi-Fi card) based on a channel number and a channel center frequency as determined or indicated by the application processor 111.
[0046] In some embodiments, synthesizer circuitry 304 may be configured to generate a carrier frequency as the output frequency 305, while in other embodiments, the output frequency 305 may be a fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency). In some embodiments, the output frequency 305 may be a LO frequency (fro). [0047] FIG. 4 illustrates a functional block diagram of baseband processing circuitry 400 in accordance with some embodiments. The baseband processing circuitry 400 is one example of circuitry that may be suitable for use as the baseband processing circuitry 108 (FIG. 1), although other circuitry configurations may also be suitable. The baseband processing circuitry 400 may include a receive baseband processor (RX BBP) 402 for processing receive baseband signals 309 provided by the radio IC circuitry 106 (FIG. 1) and a transmit baseband processor (TX BBP) 404 for generating transmit baseband signals 311 for the radio IC circuitry 106. The baseband processing circuitry 400 may also include control logic 406 for coordinating the operations of the baseband processing circuitry 400.
[0048] In some embodiments (e.g., when analog baseband signals are exchanged between the baseband processing circuitry 400 and the radio IC circuitry 106), the baseband processing circuitry 400 may include ADC 410 to convert analog baseband signals received from the radio IC circuitry 106 to digital baseband signals for processing by the RX BBP 402. In these embodiments, the baseband processing circuitry 400 may also include DAC 412 to convert digital baseband signals from the TX BBP 404 to analog baseband signals.
[0049] In some embodiments that communicate OFDM signals or OFDMA signals, such as through baseband processor 108A, the transmit baseband processor 404 may be configured to generate OFDM or OFDMA signals as appropriate for transmission by performing an inverse fast Fourier transform (IFFT). The receive baseband processor 402 may be configured to process received OFDM signals or OFDMA signals by performing an FFT. In some embodiments, the receive baseband processor 402 may be configured to detect the presence of an OFDM signal or OFDMA signal by performing an autocorrelation, to detect a preamble, such as a short preamble, and by performing a cross-correlation, to detect a long preamble. The preambles may be part of a predetermined frame structure for Wi-Fi communication.
[0050] Referring to FIG. 1, in some embodiments, the antennas 101 (FIG. 1) may each comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals. In some multiple-input multiple-output (MIMO) embodiments, the antennas may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result. Antennas 101 may each include a set of phased-array antennas, although embodiments are not so limited.
[0051] Although the radio-architecture 100 is illustrated as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements, such as processing elements including digital signal processors (DSPs), and/or other hardware elements. For example, some elements may comprise one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs) and combinations of various hardware and logic circuitry for performing at least the functions described herein. In some embodiments, the functional elements may refer to one or more processes operating on one or more processing elements.
[0052] FIG. 5 illustrates a WLAN 500 in accordance with some embodiments. The WLAN 500 may comprise a basis service set (BSS) that may include an access point (AP) 502, a plurality of stations (STAs) 504, and a plurality of legacy devices 506. In some embodiments, the STAs 504 and/or AP 502 are configured to operate in accordance with IEEE 802.1 Ibe extremely high throughput (EHT) and/or high efficiency (HE) IEEE 802.1 lax. In some embodiments, the STAs 504 and/or AP 520 are configured to operate in accordance with IEEE 802.1 laz. In some embodiments, IEEE 802.11EHT may be termed Next Generation 802.11. The STA 504 and AP 502 (or apparatuses of) may be configured to operate in accordance with IEEE P802.1 lbe™/Dl.1, July 2021, IEEE P802.1 lax™/D8.0, October 2020, and/or IEEE Std 802.11™-2020, which are incorporated herein by reference in their entirety.
[0053] The AP 502 may be an AP using the IEEE 802.11 to transmit and receive. The AP 502 may be a base station. The AP 502 may use other communications protocols as well as the IEEE 802.11 protocol. The EHT protocol may be termed a different name in accordance with some embodiments. The IEEE 802.11 protocol may include using orthogonal frequency division multiple-access (OFDMA), time division multiple access (TDMA), and/or code division multiple access (CDMA). The IEEE 802.11 protocol may include a multiple access technique. For example, the IEEE 802.11 protocol may include space-division multiple access (SDMA) and/or multiple-user multiple-input multiple-output (MU-MIMO). There may be more than one EHT AP 502 that is part of an extended service set (ESS). A controller (not illustrated) may store information that is common to the more than one APs 502 and may control more than one BSS, e.g., assign primary channels, colors, etc. AP 502 may be connected to the internet.
[0054] The legacy devices 506 may operate in accordance with one or more of IEEE 802.11 a/b/g/n/ac/ad/af/ah/aj/ay/ax, or another legacy wireless communication standard. The legacy devices 506 may be STAs or IEEE STAs. The STAs 504 may be wireless transmit and receive devices such as cellular telephone, portable electronic wireless communication devices, smart telephone, handheld wireless device, wireless glasses, wireless watch, wireless personal device, tablet, or another device that may be transmitting and receiving using the IEEE 802.11 protocol such as IEEE 802.1 Ibe or another wireless protocol. [0055] The AP 502 may communicate with legacy devices 506 in accordance with legacy IEEE 802.11 communication techniques. In example embodiments, the H AP 502 may also be configured to communicate with STAs 504 in accordance with legacy IEEE 802.11 communication techniques.
[0056] In some embodiments, a HE or EHT frames may be configurable to have the same bandwidth as a channel. The HE or EHT frame may be a physical Layer Convergence Procedure (PLCP) Protocol Data Unit (PPDU). In some embodiments, PPDU may be an abbreviation for physical layer protocol data unit (PPDU). In some embodiments, there may be different types of PPDUs that may have different fields and different physical layers and/or different media access control (MAC) layers. For example, a single user (SU) PPDU, multiple-user (MU) PPDU, extended-range (ER) SU PPDU, and/or trigger-based (TB) PPDU. In some embodiments EHT may be the same or similar as HE PPDUs.
[0057] The bandwidth of a channel may be 20MHz, 40MHz, or 80MHz, 80+SOMHz, 160MHz, 160+160MHz, 320MHz, 320+320MHz, 640MHz bandwidths. In some embodiments, the bandwidth of a channel less than 20 MHz may be 1 MHz, 1.25MHz, 2.03MHz, 2.5MHz, 4.06 MHz, 5MHz and 10MHz, or a combination thereof or another bandwidth that is less or equal to the available bandwidth may also be used. In some embodiments the bandwidth of the channels may be based on a number of active data subcarriers. In some embodiments the bandwidth of the channels is based on 26, 52, 106, 242, 484, 996, or 2x996 active data subcarriers or tones that are spaced by 20 MHz. In some embodiments the bandwidth of the channels is 256 tones spaced by 20 MHz. In some embodiments the channels are multiple of 26 tones or a multiple of 20 MHz. In some embodiments a 20 MHz channel may comprise 242 active data subcarriers or tones, which may determine the size of a Fast Fourier Transform (FFT). An allocation of a bandwidth or a number of tones or subcarriers may be termed a resource unit (RU) allocation in accordance with some embodiments.
[0058] In some embodiments, the 26-subcarrier RU and 52-subcarrier RU are used in the 20 MHz, 40 MHz, 80 MHz, 160 MHz and 80+80 MHz OFDMA HE PPDU formats. In some embodiments, the 106-subcarrier RU is used in the 20 MHz, 40 MHz, 80 MHz, 160 MHz and 80+80 MHz OFDMA and MU-MIMO HE PPDU formats. In some embodiments, the 242-subcarrier RU is used in the 40 MHz, 80 MHz, 160 MHz and 80+80 MHz OFDMA and MU- MIMO HE PPDU formats. In some embodiments, the 484-subcarrier RU is used in the 80 MHz, 160 MHz and 80+80 MHz OFDMA and MU-MIMO HE PPDU formats. In some embodiments, the 996-subcarrier RU is used in the 160 MHz and 80+80 MHz OFDMA and MU-MIMO HE PPDU formats.
[0059] A HE or EHT frame may be configured for transmitting a number of spatial streams, which may be in accordance with MU-MIMO and may be in accordance with OFDMA. In other embodiments, the AP 502, STA 504, and/or legacy device 506 may also implement different technologies such as code division multiple access (CDMA) 2000, CDMA 2000 IX, CDMA 2000 Evolution-Data Optimized (EV-DO), Interim Standard 2000 (IS-2000), Interim Standard 95 (IS-95), Interim Standard 856 (IS-856), Long Term Evolution (LTE), Global System for Mobile communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), GSM EDGE (GERAN), IEEE 802.16 (i.e., Worldwide Interoperability for Microwave Access (WiMAX)), BlueTooth®, low-power BlueTooth®, or other technologies. [0060] In accordance with some IEEE 802.11 embodiments, e.g, IEEE 802.1 lEHT/ax embodiments, a HE AP 502 may operate as a master station which may be arranged to contend for a wireless medium (e.g., during a contention period) to receive exclusive control of the medium for a transmission opportunity (TXOP). The AP 502 may transmit an EHT/HE trigger frame transmission, which may include a schedule for simultaneous UL/DL transmissions from STAs 504. The AP 502 may transmit a time duration of the TXOP and sub-channel information. During the TXOP, STAs 504 may communicate with the AP 502 in accordance with a non-contention based multiple access technique such as OFDMA or MU-MIMO. This is unlike conventional WLAN communications in which devices communicate in accordance with a contention-based communication technique, rather than a multiple access technique. During the HE or EHT control period, the AP 502 may communicate with stations 504 using one or more HE or EHT frames. During the TXOP, the HE STAs 504 may operate on a sub-channel smaller than the operating range of the AP 502. During the TXOP, legacy stations refrain from communicating. The legacy stations may need to receive the communication from the HE AP 502 to defer from communicating.
[0061] In accordance with some embodiments, during the TXOP the STAs 504 may contend for the wireless medium with the legacy devices 506 being excluded from contending for the wireless medium during the master-sync transmission. In some embodiments the trigger frame may indicate an UL-MU- MIMO and/or UL OFDMA TXOP. In some embodiments, the trigger frame may include a DL UL-MU-MIMO and/or DL OFDMA with a schedule indicated in a preamble portion of trigger frame.
[0062] In some embodiments, the multiple-access technique used during the HE or EHT TXOP may be a scheduled OFDMA technique, although this is not a requirement. In some embodiments, the multiple access technique may be a time-division multiple access (TDMA) technique or a frequency division multiple access (FDMA) technique. In some embodiments, the multiple access technique may be a space-division multiple access (SDMA) technique. In some embodiments, the multiple access technique may be a Code division multiple access (CDMA). [0063] The AP 502 may also communicate with legacy stations 506 and/or STAs 504 in accordance with legacy IEEE 802.11 communication techniques. In some embodiments, the AP 502 may also be configurable to communicate with STAs 504 outside the TXOP in accordance with legacy IEEE 802.11 or IEEE 802.1 lEHT/ax communication techniques, although this is not a requirement.
[0064] In some embodiments the STA 504 may be a “group owner" (GO) for peer-to-peer modes of operation. A wireless device may be a STA 502 or a HE AP 502.
[0065] In some embodiments, the STA 504 and/or AP 502 may be configured to operate in accordance with IEEE 802.1 Imc. In example embodiments, the radio architecture of FIG. 1 is configured to implement the STA 504 and/or the AP 502. In example embodiments, the front-end module circuitry of FIG. 2 is configured to implement the STA 504 and/or the AP 502. In example embodiments, the radio IC circuitry of FIG. 3 is configured to implement the HE station 504 and/or the AP 502. In example embodiments, the base-band processing circuitry of FIG. 4 is configured to implement the STA 504 and/or the AP 502.
[0066] In example embodiments, the STAs 504, AP 502, an apparatus of the STA 504, and/or an apparatus of the AP 502 may include one or more of the following: the radio architecture of FIG. 1, the front-end module circuitry of FIG. 2, the radio IC circuitry of FIG. 3, and/or the base-band processing circuitry of FIG. 4.
[0067] In example embodiments, the radio architecture of FIG. 1, the front-end module circuitry of FIG. 2, the radio IC circuitry of FIG. 3, and/or the base-band processing circuitry of FIG. 4 may be configured to perform the methods and operations/functions herein described in conjunction with FIGS. 1- 11.
[0068] In example embodiments, the STAs 504 and/or the HE AP 502 are configured to perform the methods and operations/functions described herein in conjunction with FIGS. 1-11. In example embodiments, an apparatus of the STA 504 and/or an apparatus of the AP 502 are configured to perform the methods and functions described herein in conjunction with FIGS. 1-11. The term Wi-Fi may refer to one or more of the IEEE 802.11 communication standards. AP and STA may refer to EHT/HE access point and/or EHT/HE station as well as legacy devices 506.
[0069] In some embodiments, a HE AP STA may refer to a AP 502 and/or STAs 504 that are operating as EHT APs 502. In some embodiments, when a STA 504 is not operating as an AP, it may be referred to as a non-AP STA or non-AP. In some embodiments, STA 504 may be referred to as either an AP STA or a non-AP.
[0070] FIG. 6 illustrates a block diagram of an example machine 600 upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform. In alternative embodiments, the machine 600 may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine 600 may operate in the capacity of a server machine, a client machine, or both in server-client network environments. In an example, the machine 600 may act as a peer machine in peer-to-peer (P2P) (or other distributed) network environment. The machine 600 may be a HE AP 502, EVT station 504, personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a portable communications device, a mobile telephone, a smart phone, a web appliance, a network router, switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while only a single machine is illustrated, the term “machine” shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein, such as cloud computing, software as a service (SaaS), other computer cluster configurations.
[0071] Machine (e.g., computer system) 600 may include a hardware processor 602 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 604 and a static memory 606, some or all of which may communicate with each other via an interlink (e.g., bus) 608.
[0072] Specific examples of main memoiy 604 include Random Access Memory (RAM), and semiconductor memory devices, which may include, in some embodiments, storage locations in semiconductors such as registers. Specific examples of static memory 606 include non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; RAM; and CD-ROM and DVD-ROM disks.
[0073] The machine 600 may further include a display device 610, an input device 612 (e.g., a keyboard), and a user interface (UI) navigation device 614 (e.g., a mouse). In an example, the display device 610, input device 612 and UI navigation device 614 may be a touch screen display. The machine 600 may additionally include a mass storage (e.g., drive unit) 616, a signal generation device 618 (e.g., a speaker), a network interface device 620, and one or more sensors 621, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor. The machine 600 may include an output controller 628, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared(IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.). In some embodiments the processor 602 and/or instructions 624 may comprise processing circuitry and/or transceiver circuitry. [0074] The storage device 616 may include a machine readable medium 622 on which is stored one or more sets of data structures or instructions 624
(e.g., software) embodying or utilized by any one or more of the techniques or functions described herein. The instructions 624 may also reside, completely or at least partially, within the main memory 604, within static memory 606, or within the hardware processor 602 during execution thereof by the machine 600. In an example, one or any combination of the hardware processor 602, the main memory 604, the static memory 606, or the storage device 616 may constitute machine readable media.
[0075] Specific examples of machine readable media may include: nonvolatile memory, such as semiconductor memory devices (e.g., EPROM or EEPROM) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; RAM; and CD-ROM and DVD-ROM disks.
[0076] While the machine readable medium 622 is illustrated as a single medium, the term "machine readable medium" may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 624. [0077] An apparatus of the machine 600 may be one or more of a hardware processor 602 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 604 and a static memory 606, sensors 621, network interface device 620, antennas 660, a display device 610, an input device 612, a UI navigation device 614, a mass storage 616, instructions 624, a signal generation device 618, and an output controller 628. The apparatus may be configured to perform one or more of the methods and/or operations disclosed herein. The apparatus may be intended as a component of the machine 600 to perform one or more of the methods and/or operations disclosed herein, and/or to perform a portion of one or more of the methods and/or operations disclosed herein. In some embodiments, the apparatus may include a pin or other means to receive power. In some embodiments, the apparatus may include power conditioning hardware.
[0078] The term “machine readable medium” may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 600 and that cause the machine 600 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding or carrying data structures used by or associated with such instructions. Nonlimiting machine readable medium examples may include solid-state memories, and optical and magnetic media. Specific examples of machine readable media may include: non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; Random Access Memory (RAM); and CD-ROM and DVD-ROM disks. In some examples, machine readable media may include non-transitory machine- readable media. In some examples, machine readable media may include machine readable media that is not a transitory propagating signal.
[0079] The instructions 624 may further be transmitted or received over a communications network 626 using a transmission medium via the network interface device 620 utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®), IEEE 802.15.4 family of standards, a Long Term Evolution (LTE) family of standards, a Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, among others.
[0080] In an example, the network interface device 620 may include one or more physical jacks (e.g., Ethernet, coaxial, or phonejacks) or one or more antennas to connect to the communications network 626. In an example, the network interface device 620 may include one or more antennas 660 to wirelessly communicate using at least one of single-input multiple-output (SIMO), multiple-input multiple-output (MIMO), or multiple-input single-output (MISO) techniques. In some examples, the network interface device 620 may wirelessly communicate using Multiple User MIMO techniques. The term “transmission medium” shall be taken to include any intangible medium that is capable of storing, encoding or carrying instructions for execution by the machine 600, and includes digital or analog communications signals or other intangible medium to facilitate communication of such software.
[0081] Examples, as described herein, may include, or may operate on, logic or a number of components, modules, or mechanisms. Modules are tangible entities (e.g., hardware) capable of performing specified operations and may be configured or arranged in a certain manner. In an example, circuits may be arranged (e.g., internally or with respect to external entities such as other circuits) in a specified manner as a module. In an example, the whole or part of one or more computer systems (e.g., a standalone, client or server computer system) or one or more hardware processors may be configured by firmware or software (e.g., instructions, an application portion, or an application) as a module that operates to perform specified operations. In an example, the software may reside on a machine readable medium. In an example, the software, when executed by the underlying hardware of the module, causes the hardware to perform the specified operations.
[0082] Accordingly, the term “module” is understood to encompass a tangible entity, be that an entity that is physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., transitorily) configured (e.g., programmed) to operate in a specified manner or to perform part or all of any operation described herein. Considering examples in which modules are temporarily configured, each of the modules need not be instantiated at any one moment in time. For example, where the modules comprise a general-purpose hardware processor configured using software, the general-purpose hardware processor may be configured as respective different modules at different times. Software may accordingly configure a hardware processor, for example, to constitute a particular module at one instance of time and to constitute a different module at a different instance of time.
[0083] Some embodiments may be implemented fully or partially in software and/or firmware. This software and/or firmware may take the form of instructions contained in or on a non-transitoiy computer-readable storage medium. Those instructions may then be read and executed by one or more processors to enable performance of the operations described herein. The instructions may be in any suitable form, such as but not limited to source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. Such a computer-readable medium may include any tangible non- transitoiy medium for storing information in a form readable by one or more computers, such as but not limited to read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory, etc. [0084] FIG. 7 illustrates a block diagram of an example wireless device 700 upon which any one or more of the techniques (e.g., methodologies or operations) discussed herein may perform. The wireless device 700 may be a HE device or HE wireless device. The wireless device 700 may be a HE STA 504, HE AP 502, and/or a HE STA or HE AP. A HE STA 504, HE AP 502, and/or a HE AP or HE STA may include some or all of the components shown in FIGS. 1-7. The wireless device 700 may be an example machine 600 as disclosed in conjunction with FIG. 6.
[0085] The wireless device 700 may include processing circuitry 708. The processing circuitry 708 may include a transceiver 702, physical layer circuitry (PHY circuitry) 704, and MAC layer circuitry (MAC circuitry) 706, one or more of which may enable transmission and reception of signals to and from other wireless devices 700 (e.g., HE AP 502, HE STA 504, and/or legacy devices 506) using one or more antennas 712. As an example, the PHY circuitry 704 may perform various encoding and decoding functions that may include formation of baseband signals for transmission and decoding of received signals. As another example, the transceiver 702 may perform various transmission and reception functions such as conversion of signals between a baseband range and a Radio Frequency (RF) range.
[0086] Accordingly, the PHY circuitry 704 and the transceiver 702 may be separate components or may be part of a combined component, e.g., processing circuitry 708. In addition, some of the described functionality related to transmission and reception of signals may be performed by a combination that may include one, any or all of the PHY circuitry 704 the transceiver 702, MAC circuitry 706, memory 710, and other components or layers. The MAC circuitry 706 may control access to the wireless medium. The wireless device 700 may also include memory 710 arranged to perform the operations described herein, e.g., some of the operations described herein may be performed by instructions stored in the memory 710.
[0087] The antennas 712 (some embodiments may include only one antenna) may comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals. In some multiple-input multiple-output (MIMO) embodiments, the antennas 712 may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result. [0088] One or more of the memory 710, the transceiver 702, the PHY circuitry 704, the MAC circuitry 706, the antennas 712, and/or the processing circuitry 708 may be coupled with one another. Moreover, although memory 710, the transceiver 702, the PHY circuitry 704, the MAC circuitry 706, the antennas 712 are illustrated as separate components, one or more of memory 710, the transceiver 702, the PHY circuitry 704, the MAC circuitry 706, the antennas 712 may be integrated in an electronic package or chip.
[0089] In some embodiments, the wireless device 700 may be a mobile device as described in conjunction with FIG. 6. In some embodiments the wireless device 700 may be configured to operate in accordance with one or more wireless communication standards as described herein (e.g., as described in conjunction with FIGS. 1-6, IEEE 802.11). In some embodiments, the wireless device 700 may include one or more of the components as described in conjunction with FIG. 6 (e.g., display device 610, input device 612, etc.) Although the wireless device 700 is illustrated as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements, such as processing elements including digital signal processors (DSPs), and/or other hardware elements. For example, some elements may comprise one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs) and combinations of various hardware and logic circuitry for performing at least the functions described herein. In some embodiments, the functional elements may refer to one or more processes operating on one or more processing elements.
[0090] In some embodiments, an apparatus of or used by the wireless device 700 may include various components of the wireless device 700 as shown in FIG. 7 and/or components from FIGS. 1-6. Accordingly, techniques and operations described herein that refer to the wireless device 700 may be applicable to an apparatus for a wireless device 700 (e.g., HE AP 502 and/or HE STA 504), m some embodiments. In some embodiments, the wireless device 700 is configured to decode and/or encode signals, packets, and/or frames as described herein, e.g., PPDUs.
[0091] In some embodiments, the MAC circuitry' 706 may be arranged to contend for a wireless medium during a contention period to receive control of the medium for a HE TXOP and encode or decode an HE PPDU. In some embodiments, the MAC circuitry 706 may be arranged to contend for the wireless medium based on channel contention settings, a transmitting power level, and a clear channel assessment level (e.g., an energy detect level).
[0092] The PHY circuitry 704 may be arranged to transmit signals in accordance with one or more communication standards described herein. For example, the PHY circuitry 704 may be configured to transmit a HE PPDU. The PHY circuitry' 704 may include circuitry for modulation/demodulation, upconversion/downconversion, filtering, amplification, etc. In some embodiments, the processing circuitry 708 may include one or more processors. The processing circuitry'- 708 may be configured to perform functions based on instructions being stored in a RAM or ROM, or based on special purpose circuitry'. The processing circuitry' 708 may include a processor such as a general purpose processor or special purpose processor. The processing circuitry 708 may implement one or more functions associated with antennas 712, the transceiver 702, the PHY circuitry' 704, the MAC circuitry 706, and/or the memory' 710. In some embodiments, the processing circuitry 708 may be configured to perform one or more of the functions/operations and/or methods described herein.
[0093] In mmWave technology, communication between a station (e.g.. the HE stations 504 of FIG. 5 or wireless device 700) and an access point (e.g., the HE AP 502 of FIG. 5 or wireless device 700) may use associated effective wireless channels that, are highly directionally dependent. To accommodate the directionality, beamfomiing techniques may be utilized to radiate energy in a certain direction with certain beam width to communicate between two devices. The directed propagation concentrates transmitted energy toward a target device in order to compensate for significant energy loss in the channel between the two communicating devices. Using directed transmission may extend the range of the muh meter- wave communication versus utilizing the same transmitted energy m omni-directional propagation.
[0094] A multi-link device (MLD) is a logical entity that contains one or more STAs. The logical entity has one MAC data service interface and primitives to the LLC and a single address associated with the interface, which can be used to communicate on the DSM. An MLD allows STAs within the multi-link logical entity to have the same MAC address. Different terms may be used for the terms such as MLD. For an infrastructure framework, there is an Multi-link AP device, which includes APs on one side, and Multi-link non-AP device, which includes non-APs on the other side. A Multi-link AP device (AP MLD) is a multi-link device, where each STA within the multi-link device is an EHT AP. A Multi-link non-AP device (non-AP MLD) is a multi-link device, where each STA within the multi-link device is a non-AP EHT STA.
[0095] A technical problem is how to handle multi-link state machine mismatches between non-AP MLD and AP MLDs or another non-AP MLD. A non-AP MLD and AP MLD go through a series of exchanges of information that brings the non-.AP MLD and AP MUD into a state of a state machine where they can exchange data and provide services, classes indicating their relationship.
For example, the states may be where different sendees may be provided by the AP MLD to the non-AP MLD. A problem may arise where the mutual understanding between the non-AP MLD and the AP MLD or another non-AP MLD may be mismatched. Embodiments disclosed address the technical problem by resetting the non-AP MLD or AP MID to a common state as described herein.
[0096] FIG. 8 illustrates MLDs 800, in accordance with some embodiments. Illustrated in FIG. 8 is ML logical entity 1 or non-AP MLD I 806, ML logical entity 2 or non-AP MLD 2 807, ML AP logical entity or AP MLD 808, and ML non-AP logical entity or non-AP MLD 3 809. The non-AP MLD 1 806 includes three STAs, STA1.1 814.1, STA1.2 814.2, and STA1.3 814.3 that operate in accordance with link 1 802.1, link 2 802.2, and link 3 802.3, respectively. The Links are different frequency bands such as 2.4 GHz band, 5 GHz band, 6 GHz band, and so forth, non-AP MLD 2 807 includes STA2.1 816.1 , STA2.2 816.2, and STA2.3 816.3 that operate in accordance with link 1 802.1, link 2 802.2, and link 3 802.3, respectively. In some embodiments non-AP MLD 1 806 and non-AP MLD 2 807 operate in accordance with a mesh network. Using three links enables the non-AP MLD 1 806 and non-AP MLD 2
807 to operate using a greater bandwidth and to operate more reliably as they can switch to using a different link if there is interference or if one link is superior due to operating conditions.
[0097] The distribution system (DS) 810 indicates how communications are distributed and the DS medium (DSM) 812 indicates the medium that is used for the DS 810, which in this case is the wireless spectrum.
[0098] AP MLD 808 includes API 830, AP2 832, and AP3 834 operating on link 1 804.1, link 2 804.2, and link 3 804.3, respectively. AP MLD
808 includes a MAC address 854 that may be used by applications to transmit and receive data across one or more of API 830, AP2 832, and AP3 834.
[0099] API 830, AP2 832, and AP3 834 include a frequency band, which are 2.4 GHz band 836, 5 GHz band 838, and 6 GHz band 840, respectively. API 830, AP2 832, and AP3 834 includes different BSSIDs, which are BSSID 842, BSSID 844, and BSSID 846, respectively. API 830, AP2 832, and APS 834 include different media access control (MAC) address (addr), which are MAC adder 848, MAC addr 850, and MAC addr 852, respectively. The AP 502 is an AP MLD 808, in accordance with some embodiments. The STA 504 is a non-AP MLD 3 809, in accordance with some embodiments, [00100] The non-AP MLD 3 809 includes non-AP STA1 818, non-AP STA2 820, and non-AP STA3 822. Each of the non-AP STAs have a MAC address (not illustrated) and the non-AP MLD 3 809 has a MAC address 855 that is different and used by application programs where the data traffic is split up among non-AP STA1 818, non-AP STA2 820, and non-AP ST A3 822.
[00101] The STA 504 is a non-AP STA1 818, non-AP STA2 820, or non- AP ST A3 822, in accordance with some embodiments. The non-AP STA1 818, non-AP STA2 820, and non-AP STA3 822 may operate as if they are associated with a BSS of API 830, AP2 832, or AP3 834, respectively, over link 1 804.1, link 2 804.2, and link 3 804.3, respectively.
[00102] A Multi-link device such as non-AP MLD 1 806 or non-AP MLD 2 807, is a logical entity that contains one or more STAs 814, 816. The non-AP MLD 1 806 and non-AP MLD 2 807 each has one MAC data service interface and primitives to the logical link control (LLC) and a single address associated with the interface, which can be used to communicate on the DSM 812. Multilink logical entity allows STAs 814, 816 within the multi-link logical entity to have the same MAC address, in accordance with some embodiments. In some embodiments a same MAC address is used for application layers and a different MAC address is used per link 802.
[00193] In infrastructure framework, AP MLD 808, includes APs 830, 838, 840, on one side, and non-AP MLD 3 809 includes non-APs STAs 818, 820, 822 on the other side. AP MLD 808 is a ML logical entity, where each STA within the multi-link logical entity is an EHT AP 502, in accordance with some embodiments. Non-AP MLD 1 806, non-AP MLD 2 807, non-AP MLD 809 are multi-link logical entities, where each STA within the multi-link logical entity is a non-AP EHT STA 504. API 830, AP2 832, and AP3 834 may be operating on different bands and there may be fewer or more APs. STA1. 1 814.1, STA1.2 814.2, and STA1.3 814.3 may be operating on different bands and there may be fewer or more STAs as part of the non-AP MLD 3 809. [00104] FIG. 9 illustrates a schematic diagram for states and services between STAs or MLDs, in accordance with some embodiments. Illustrated in FIG. 9 is the relationship between states 902, 904, 906, and 908, and services between a given pair of nonmesh STAs or nonmesh MLDs, e.g., AP MLD 808 and non-AP MLD 3 809. For an AP MLD 808 to exchange data with a non-AP MLD, e.g., non-AP MLD 3 809, there are several steps to be performed. State 1 902, state 2 904, state 3 906, and state 4 908 represent the progress of the steps being performed.
[00105] MLDs, e.g., the AP MLD 808 and the non-MLD 3 809 maintain an enumerated state variable for each remote MLD with which direct communication between the two MLD through affiliated STAs, which includes non-APs and AP, of the two MLDs is performed. The states are the four states of FIG. 9.
[00106] State 1 902, state 2 904, state 3 906, and state 4 908 illustrate the relationship between an AP MLD 808 and a non-AP MLD 3 809. State 1 902 is unauthenticated and unassociated where class 1 frames may be exchanged. State 2 904 is authenticated and unassociated where class 1 and 2 frames may be exchanged. State 3 906 is authenticated and associated where class 1, 2, and 3 frames may be exchanged. State 4 908 is authenticated, associated, and IEEE 802. IX controlled port is unblock where class 1, 2, 3 frames may be exchanged and where port 802. IX is unblocked for forwarding data frames to higher layers. State transition 922 indicates successful IEEE 802.11 authentication or FLS authentication. State transition 924 indicates successful association or reassociation where Robust Security Network Association (RSNA) may be required. In state transition 924 the multi -link element may be exchanged that includes information on the links, e.g., link 1 804.1, link 2 804.2, and link 804.3, that are used between AP MLD 808 and non-AP MLD 3 809. State transition 926 indicates a successful 4-way handshake. If RSNA is not required, then State transition 924 may move the state to state 4 rather than state 3.
[00107] State transition 910 indicates successful association or reassociation, fast BSS/ML transition, PBSS -4 -way handshake was successful, or FILS reassociation or association and key confirmation. State transitions 912, 918 indicate unsuccessful association or reassociation or dissociation. State transitions 914, 916, and 920 indicate deauthentication.
[00108] Class 1 frames include control frames, which include RTS, CTS, DMG Clear to send (DMG CTS), Ack, Grant, SSW, SSW-Feedback, SSW-Ack, Grant Ack, CF-End, Block Ack (BlockAck)( in an IBSS and in a PBSS when dotl 1 RSNA Activated is false), and Block Ack Request (BlockAckReq)(when dotl 1 RSNA Activated is false in an IBSS and in a PBSS). Class 1 frames further include Management frames, which include Probe Request/Response, Beacon, Authentication, Deauthentication, ATIM, Public Action, Self-protected Action, all .Action frames and all Action No Ack frames (in an IBSS), Unprotected DMG Action frames, and all Action and Action No Ack frames (In a PBSS when dotl IRSNAActivated is false) except the following frames: ADDTS Request, ADDTS Response, and DELTS. Class 1 frames further include data frames, which include data frames between IBSS STAs and data frame within a PBSS. Class 1 frames include (Ed) Extension frames, which includes DMG Beacon frames. [00109] Class 2 frames include management frames, which includes Association Request/Response, Reassociation Request/Response, and Disassociation.
[00110] Class 3 frames include data frames, which include data frames between STAs in an infrastructure BSS or in an MBSS, and Data frames between an AP MLD and a non-AP MLD associated with the .Al5 MLD. Class 3 frames include Management frames, which includes in an infrastructure BSS, an MBSS, or a PBSS, all Action and Action No Ack frames except those that are declared to be Class 1 or Class 2 frames. And management frames Between an AP MLD and a non-AP MLD associated with the AP MLD, all Action and Action No Ack frames except those that are declared to be Class 1 or Class 2 frames. Class 3 frames further include control frames, which include PS-Poll, Poll, SPR, DMG DPS, Block Ack (BlockAck), except those that are declared to be Class 1, and Block Ack Request (BlockAckReq), except those that are declared to be Class 1 frames.
[00111] A state mismatch from the perspective of the AP MLD 808 and non-AP MLD 3 809, which, in some embodiments, is referred to as a non-AP STA MLD, is when frames are received that are in a higher class than indicated by the state. For example, a state mismatch occurs when an AP MLD or non-AP MLD receives class 2 or class 3 frame from an AP MLD or non-AP MLD that the receiving AP MLD or non-AP MLD considers as state 1, or when receiving a class 3 frame from a peer AP MLD or non-AP MLD that the receiving AP MLD or non-AP MLD considers as state 2.
[00112] In some embodiments, the response is to send a dis-authentication frame or a disassociation frame to correct the state of the peer .AP MLD or non- AP MLD (or STA). For example, if STA A in an infrastructure BSS receives a Class 2 or Class 3 frame from STA B that is not authenticated with STA A (i.e., the state for STA B is State 1), STA A discards the frame. If the frame has an individual address in the Address 1 field, the MLME of STA A sends a Deauthentication frame to STA B. If a non-DMG STA A in an infrastructure BSS receives a Class 3 frame from STA B that is authenticated but not associated with STA A (i.e., the state for STA B is State 2), STA A shall discard the frame. If the frame has an individual address m the Address 1 field, the MLME of STA A shall send a Disassociation frame to STA B.
[00113] In some embodiments, for an AP MLD 808 to exchange data with the non-AP MLD 3 809, there are several steps to be done before data frame can be exchanged. To start, the non-AP MLD 808 is in state 1 902 (unauthenticated, unassociated) from the perspective of AP MLD 808 and non-AP MLD 3 809. In state 1 902, class 1 frames can be transmitted between the AP MLD 808 and non-AP MLD 3 809. Then there is a successful authentication process that changes the state of non-AP MLD 3 809 to state 2 (authenticated, unassociated) from the perspective of the AP M LD 808 and the non-AP MLD 3 809. In state 2 904, class 1 & 2 frames can be transmitted between the AP MLD 808 and the non-AP MLD 809. After that, there is successful association process that changes the state of the non-AP MLD 3 809 to state 3 906 (authenticated, associated, pending RSNA) from the perspective of the AP MLD 808 and the non-AP MLD 3 809. In state 3 906, class 1 & 2 & 3 frames can be transmitted between AP MLD 808 and non-AP MLD 3 809. Finally, there is a successful 4- way handshake that changes the state of non-AP MLD 3 809 to state 4 908 (authenticated, associated, RSNA established) from the perspective of AP MLD
808 and the non-AP MLD 3 809. In state 4 908, class 1 & 2 & 3 frames can be transmitted between the AP MLD 808 and the non-AP MLD 809, and the 802. IX controlled port is unblocked to forward data frames to higher layers.
[00114] For AP MLD 808 and the non-AP MLD 3 809, they determine which links are setup or re-setup between the AP MLD 808 and the non-AP MLD 3 809. The multi-link setup or re-setup method is built on top of the association or reassociation request/ response frame exchange. After the multilink setup or re-setup, i.e., state 3 906, the AP MLD 808 and the non-AP M LD 3
809 will know the full link information that are setup including the MAC address of the STA corresponding to the links that are setup. Before state 3, i.e., state 1 or state 2, AP MLD 808 and non-AP MLD 3 809 do not have corresponding in format! on.
[00115] For MLDs, there may also be state mismatch between AP MLD 808 and non-AP MLD 3 809. However, the state mismatch is not easily identified. The reason is that exact link information is maintained only in state 3
906 or state 4 908.
[00116] An example state mismatch is that MLD A thinks MLD B is in state 1 or 2, but MLD B thinks MLD A is in state 3. If MLD A receives a class 2 or a class 3 frames from MLD B, then MLD A cannot map the frame to be from MLD B since MLD A does not have any link information at this point for MLD B. As a result, MLD A cannot send back disassociation frame and di sauthenti cation frame directly to MLD B because the multi-link element has not been exchanged or the information is not associated with MLD B.
[00117] For a received class 2 frame, it is only Management frames including Association or re-association Request/Response frames, and disassociation frames. Association Request/response already have the MLD address to identify the MLD that sends the frame. Including the MLD address in disassociation frame will resolve the ambiguity when receiving a class 2 frame so that a dis-authentication frame may be sent back.
[00118] For a received class 3 frame, if the AP MLD 808 or the non-AP MLD 3 809 cannot identify the MLD that sends the class 3 frame, then the AP MLD 808 or the non-AP MLD 3 809 sends back a disassociation frame. This will correct the peer MLD to state 2. If there is still a. state mismatch, a class 2 frame will be received, and a dis-authentication frame can then be sent to correct the peer MLD to state 1. In some embodiments, the state mismatch problem for two MLDs is resolved by carrying the MLD address in a disassociation frame. [00119] The MLD that sends the disassociation frame through any of its affiliated STAs or APs will carry7 its MLD address in the disassociation frame. The MLD address can be carried in the Multi -link element in the disassociation frame.
[00120] If any affiliated STA of MLD A receives a Class 2 frame from a STA affiliated with an MLD B that is not authenticated with MLD A (i.e., the state for MLD B is State 1), MLD A shall discard the frame. If the frame has an individual address in the Address 1 field, the MLME of MLD A shall send a Deauthentication frame to the MLD B. The dis-authentication frame can be sent to any STA affiliated with the MLD B The RA of the dis-authentication frame can be the TA of the received class 2 frame. The TA of the dis-authentication frame can be the RA of the received class 2 frame. The address 1 field corresponds to the receiver address (RA) field.
[00121] If any affiliated STA of MLD A receives a Class 3 frame from a STA that does not have a record for state and cannot be identified to be affiliated with a MLD with state 3, MLD A shall discard the frame. If the frame has an individual address in the Address 1 field, the Ml, Mb. of MLD A shall send a
Disassociation frame. The RA of the disassociation frame can be the TA of the received class 3 frame. The TA of the disassociation frame can be the ILA of the received class 3 frame. MLD, MLD A, and MLD B may be a non-AP MLD or an AP MLD. [00122] FIG. 10 illustrates a basic multi-lmk element 1000, in accordance with some embodiments. The multi-link element 1000 may be encoded within a management frame, e.g., association or re-association, or another frame. The multi -link element 1000 may include MAC address 1002, which is the MAC address that may be used to address the MLD such as MAC address 854 and MAC address 855. The multi-link element 1000 includes a per-STA profile 1004, which includes operating information per-STA profile 1004 including a MAC address 1006. For example, in FIG. 8, non-AP MLD 3 809 has a MAC address 855 and each of non-AP STA1 818, non-AP STA2 820, and non-AP STA3 822 has a MAC address (not associated). In another example, AP MLD 808 has a MAC address 854 corresponding to MAC address 1002. There is three per-STA profiles 1004 corresponding to API 830, AP2 832, and AP3 834. Each of the three per-STA profiles 1004 includes a MAC address 1006, which corresponds to MAC address 848, MAC address 850, and MAC address 852, The multi-link element 1000 is exchanged during the change from state 2 904 and state 3 906.
[00123] In some embodiments, frames may use the MAC address 854 as the receiver address or the destination address. In some embodiments, the AP MLD 808 and non-AP MLD 3 809 maintain the MAC addresses and frames are addressed to the MLD MAC address, MAC address 854 or MAC address 855, and then a decision is made which link to use and the frame addressing is changed appropriately for the selected link, e.g., MAC address 852 as the RA or TA if link 3 804.3 is selected. In some embodiments, the MLD MAC address 854 or 855 is used as the destination or source address and the RA or TA address is the MAC address associated with the link that is actually receiving or transmitting, respectively, the frame. The MLD may identify another MLD based on the MAC addresses associated with the links, e.g., non-AP MLD 3 809 may identify AP MLD 808 based on MAC address 848, MAC address 850, and MAC address 852, The MLD cannot identify the other MLD, though, if the MLD has not received the multi-link element 1000 and considers the other MLD and itself to be in state 3. Each MLD maintains a state variable for each MLD it is communicating with. The state variable includes an indication for the following: State 1: Initial start state for MLDs that perform IEEE 802.1 1 authentication. Unauthenticated and unassociated. Only Class 1 frames allowed. State 2: Authenticated but unassociated. Only Class 1 and 2 frames allowed. State 3: Authenticated and associated (Pending RSNA Authentication). The IEEE 802. IX Controlled Port is blocked. Class 1, 2, and 3 frames are allowed. State 4: Authenticated and associated (RSNA Established or Not Required). The IEEE 802. IX Controlled Port is unblocked, or not present.
[00124] A STA affiliated with the MED does not transmit Class 2 frames unless the MLD is in State 2 or State 3 or State 4. A STA affdiated with an MLD does not transmit Class 3 frames unless the MLD is in State 3 or State 4.
[00125] FIG. 11 illustrates a method 1100 of multi-link state machine mismatch resolution, in accordance with some embodiments. The method 1100 begins at operation 1102 with decoding a frame. For example, the AP MLD 808 or the non-AP MLD 809 may decode a frame of class 1, 2, 3, or 4.
[00126] The method 1100 continues at operation 1104 with retrieving a class of the frame. For example, the AP MLD 808 or the non-AP MLD 809 may store the information regarding the classes of frames and determine or retrieve the class of the frame decoded.
[00127] The method 1100 continues at operation 1106 with in response to the frame being a class 2 frame from a station of a second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authenti cation frame with a receiver address of a transmitter address of the frame. For example, the AP MLD 808 or the non-AP MLD 809, may as indicated in rows 1 and 3 of Table 1 discard the frame and, if the frame is individually addressed, encode and transmit a de-authentication frame where the receiver address is based on a transmitter address of the received frame.
[00128] The method 1100 continues at operation 1108 with in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame. For example, the AP MLD 808 or the non-AP MLD 809, may as indicated in rows 2 and 4 of Table 1 discard the frame and, if the frame is individually addressed, encode and transmit a disassociation frame where the receiver address is based on a transmitter address of the received frame.
[00129] The method 2000 may be performed by an apparatus of a non-AP of a non-AP MLD or an apparatus of a non-AP MLD. The method 1100 may include one or more additional instructions. The method 1100 may be performed in a different order. One or more of the operations of method 1100 may be optional.
[00130] Example 1 is an apparatus for a first multi-link device (MLD), the apparatus including memory; and processing circuitry coupled to the memory, the processing circuitry configured to: decode a frame, retrieve a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
[00131] In Example 2, the subject matter of Example 1 includes wherein the state of 1 indicates an initial start state between the first MLD and the second MLD, the state of 2 indicates that the first MLD and the second MLD are authenticated and unassociated, the state of 3 indicates that the first MLD and the second MLD are authenticated and associated with the Institute for Electrical and Electronic Engineers (IEEE) controlled port being blocked, and a state of 4 indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
[00132] In Example 3, the subject matter of Examples 1 -2 includes, wherein the first MLD stores the state of the second MLD in the memory, and wherein the state indicates a relationship between the first MLD and the second MLD. [00133] In Example 4, the subject matter of Examples 1-3 includes, wherein the first MLD and the second MLD are configured to refrain from transmitting frames having the class with a greater number than the state.
[00134] In Example 5, the subject matter of Example 4 includes, wherein the state is 1, 2, 3, or 4.
[00135] In Example 6, the subject matter of Examples I -5 includes, wherein the first MLD and the second MLD are one of the following group: a non-access point (AP) MLD or an AP MLD, and wherein the first MLD and the second MLD are configured to operate on at least one of the following bands: 2.4 GHz, 5 GHz, and 6 GHz.
[00136] In Example 7, the subject matter of Examples 1-6 includes, wherein the processing circuitry is further configured to: decode an association request frame or a reassociation request frame from the second MLD, the association request frame or the reassociation request frame including a multilink element; encode, for transmission, an association response frame or reassociation response frame to the second MLD; and change the value of the state of the second MLD from 2 to 3 if a Robust Security Network Association (RSNA) is pending and from 2 to 4 if the RSNA is not pending.
[00137] In Example 8, the subject matter of Examples 1-7 includes, wherein the processing circuitry is further configured to: send a disassociation frame to the station of the second MLD that is not in state 1, the disassociation frame including a multi-link element with the MLD MAC address of the first MLD.
[00138] In Example 9, the subject matter of Examples 1-8 includes, wherein the processing circuitry' is further configured to: send a disassociation frame with a value of the broadcast address in an address 1 subfield of the disassociation frame, the disassociation frame including a multi-link element with the MLD M AC address of the first MLD.
[00139] In Example 10, the subject matter of Examples 1-9 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station; decode, from the second station, a de-authenti cation frame, and set the state of the second MLD to 1.
[00140] In Example 11, the subject matter of Examples 1-10 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a ciass 3 frame to the station of the second MLD, wherein a receiver address of the class 3 frame comprises the media access control address of the station, decode, from the second station, a dissociation frame, and set the state of the second MLD to 2.
[00141] In Example 12, the subject matter of Examples 1-11 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station; decode, from the second station, a de-authenti cation frame; and set the state of the second MLD to 1.
[00142] In Example 13, the subject matter of Examples 1—12 includes, frame, and Block Ack Request (BlockAckReq).
[00143] In Example 14, the subject matter of Examples 1-13 includes, transceiver circuitry coupled to the processing circuitry, the transceiver circuitry’ coupled to two or more patch antennas for receiving signalling in accordance with a multiple-input multiple-output (MIMO) technique.
[00144] In Example 15, the subject matter of Examples 1—14 includes, transceiver circuitry' coupled to the processing circuitry', the transceiver circuitry’ coupled to two or more microstrip antennas for receiving signaling in accordance with a multiple-input multiple-output (MIMO) technique.
[00145] Example 16 is a non-transitory computer-readable storage medium that stores instructions for execution by one or more processors of an apparatus for a first multi-link device (MLD), the instructions to configure the one or more processors to: decode a frame; retrieve a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a deauthentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD m the state of 1 or 2 with the first MLD, discard the frame, and m response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
[00146] In Example 17, the subject matter of Example 16 includes, indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
[00147] In Example 18, the subject matter of Examples 16—17 includes, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station, decode, from the second station, a de-authentication frame; and set the state of the second MLD to 1.
[00148] Example 19 is a method performed by an apparatus for a first multi-link device (MLD), the method including: decoding a frame; retrieving a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassoci ation frame, for transmissi on, with the receiver address of the transmitter address of the frame.
[00149] In Example 20, the subject matter of Example 19 includes, indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
[00150] Example 21 is at least one machine-readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations to implement of any of Exampl es 1—20.
[00151] Example 22 is an apparatus including means to implement of any of Examples 1-20. Example 23 is a system to implement of any of Examples 1- 20. Example 24 is a method to implement of any of Examples 1-20. [00152] The Abstract is provided to comply with 37 C.F.R. Section
1.72(b) requiring an abstract that will allow the reader to ascertain the nature and gist of the technical disclosure. It is submitted with the understanding that it will not be used to limit or interpret the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.

Claims

CLAIMS What is claimed is:
1. An apparatus for a first multi-link device (MLD), the apparatus comprising memory; and processing circuitry coupled to the memory, the processing circuitry configured to: decode a frame; retrieve a class of the frame; in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authenti cation frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
2. The apparatus of claim 1 wherein the state of 1 indicates an initial start state between the first MLD and the second MLD, the state of 2 indicates that the first MLD and the second MLD are authenticated and unassociated, the state of 3 indicates that the first MLD and the second MLD are authenticated and associated with the Institute for Electrical and Electronic Engineers (IEEE) controlled port being blocked, and a state of 4 indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
3. The apparatus of claim 1 wherein the first MLD stores the state of the second MLD in the memory/, and wherein the state indicates a relationship between the first MLD and the second MLD.
4. The apparatus of claim 1 wherein the first MLD and the second MLD are configured to refrain from transmitting frames having the class with a greater number than the state.
5. The apparatus of claim 4 wherein the state is 1, 2, 3, or 4.
6. The apparatus of claim 1 wherein the first. MLD and the second MLD are one of the following group: a non-access point (AP) MLD or an AP MLD, and wherein the first MLD and the second MLD are configured to operate on at least one of the following bands: 2.4 GHz, 5 GHz, and 6 GHz.
7. The apparatus of claim 1 wherein the processing circuitry is further configured to: decode an association request frame or a reassociation request frame from the second MLD, the association request frame or the reassociation request frame comprising a multi-link element, encode, for transmission, an association response frame or reassociation response frame to the second MLD; and change the value of the state of the second MLD from 2 to 3 if a Robust Security Network Association (RSNA) is pending and from 2 to 4 if the RSNA is not pending.
8. The apparatus of claim 1 wherein the processing circuitry is further configured to: send a disassociation frame to the station of the second MLD that is not in state 1, the disassociation frame comprising a multidink element with the MLD MAC address of the first MLD.
9. The apparatus of claim 1 wherein the processing circuitry is further configured to: send a disassociation frame with a value of the broadcast address in an address 1 subfield of the disassociation frame, the disassociation frame comprising a multi-link element with the MLD M AC address of the first MLD.
10. The apparatus of claim 1 wherein the state of the second MLD is 3 or 4, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the ciass 2 frame comprises the media access control address of the station; decode, from the second station, a de-authenti cation frame; and set the state of the second MLD to 1.
11 . The apparatus of claim 1 wherein the state of the second MLD is 3 or 4, and wherein the processing circuitry is further configured to: encode, for transmission, a ciass 3 frame to the station of the second MLD, wherein a receiver address of the class 3 frame comprises the media access control address of the station; decode, from the second station, a dissociation frame; and set the state of the second MLD to 2.
12. The apparatus of claim 1 wherein the state of the second MLD is 2, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station; decode, from the second station, a de-authentication frame; and set the state of the second MLD to 1.
13. The apparatus of claim 1 wherein the class 1 frames comprise RTS, CTS, DMG Clear to send (DMG CTS), Ack, Grant, SSW, SSW-Feedback, SSW-Ack, Grant Ack, CF-End, Block Ack (BlockAck)( in an IBSS and in a PBSS when dotl IRSNAActivated is false), Block Ack Request (BlockAckReq)(when dotl IRSNAActivated is false in an IBSS and in a PBSS), Probe Request/Response, Beacon, Authentication, Deauthentication, AT1M, Public Action, Self-protected Action, all Action frames and all Action No Ack frames (in an IBSS), Unprotected DMG Action frames, and all Action and Action No Ack frames (In a PBSS when dotl I RSNAActivated is false) except the following frames: ADDTS Request, ADDTS Response, and DELTS, the class 1 frames further comprise data frames between IBSS STAs and data frame within a PBSS, DMG Beacon frames, wherein the class 2 frames comprise association Request/Response, Reassociation Request/Response, and Disassociation, wherein the class 3 frame comprise data frames between STAs in an infrastructure BSS or in an MBSS, Data frames between an AP MLD and a non- AP MLD associated with the AP MLD, in an infrastructure BSS, an MBSS, or a PBSS, all Action and Action No Ack frames except those that are the class 1 frame or the class 2 frame, and wherein the class 3 frames further include management frames between an AP MLD and a non-AP MLD associated with the AP MLD, ah Action and Action No Ack frames except those that are the class I frame or the class 2 frame, PS-Poll, Poll, SPR, DMGDTS, Block Ack (Block Ack), except control frames that are the class 1 frame, and Block Ack Request (BlockAckReq).
14. The apparatus of claim 1 , further comprising transceiver circuitry coupled to the processing circuitry, the transceiver circuitry coupled to two or more patch antennas for receiving signalling in accordance with a multiple-input multiple-output (MEMO) technique.
15. The apparatus of claim 1, further comprising transceiver circuitry coupled to the processing circuitry', the transceiver circuitry coupled to two or more microstrip antennas for receiving signalling in accordance with a multipleinput multiple-output (MEMO) technique.
16. A non-transitory computer-readable storage medium that stores instructions for execution by one or more processors of an apparatus for a first multi-link device (MLD), the instructions to configure the one or more processors to: decode a frame; retri eve a class of the frame, in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
17. The n on-transitory computer-readable storage medium of claim 16 wherein the state of 1 indicates an initial start state between the first MLD and the second MLD, the state of 2 indicates that, the first MLD and the second MLD are authenticated and unassociated, the state of 3 indicates that the first MLD and the second MLD are authenticated and associated with the Institute for Electrical and Electronic Engineers (IEEE) controlled port being blocked, and a state of 4 indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
18. The n on-transitory computer-readable storage medium of claim 16 wherein the state of the second MLD is 3 or 4, and wherein the processing circuitry is further configured to: encode, for transmission, a class 2 frame to a station of the second MLD, wherein a receiver address of the class 2 frame comprises the media access control address of the station; decode, from the second station, a de-authentication frame; and set the state of the second MLD to 1 .
19. A method performed by an apparatus for a first multi-link device (MLD), the method comprising: decoding a frame, retrieving a class of the frame, in response to the frame being a class 2 frame from a station of the second MLD in a state of 1 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode, for transmission, a de-authentication frame with a receiver address of a transmitter address of the frame; and in response to the frame being a class 3 frame from the station of the second MLD in the state of 1 or 2 with the first MLD, discard the frame, and in response to the frame being an individually addressed frame, encode a disassociation frame, for transmission, with the receiver address of the transmitter address of the frame.
20. The method of claim 19 wherein the state of 1 indicates an initial start state between the first MLD and the second MLD, the state of 2 indicates that the first MLD and the second MLD are authenticated and unassociated, the state of 3 indicates that the first MLD and the second MLD are authenticated and associated with the Institute for Electrical and Electronic Engineers (IEEE) controlled port being blocked, and a state of 4 indicates that the first MLD and the second MLD are authenticated, associated, and that the IEEE controlled port being unblocked or not present.
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