EP3117435A4 - Mitigating read disturb in a cross-point memory - Google Patents

Mitigating read disturb in a cross-point memory Download PDF

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Publication number
EP3117435A4
EP3117435A4 EP15761871.1A EP15761871A EP3117435A4 EP 3117435 A4 EP3117435 A4 EP 3117435A4 EP 15761871 A EP15761871 A EP 15761871A EP 3117435 A4 EP3117435 A4 EP 3117435A4
Authority
EP
European Patent Office
Prior art keywords
cross
point memory
read disturb
mitigating read
mitigating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP15761871.1A
Other languages
German (de)
French (fr)
Other versions
EP3117435A1 (en
EP3117435B1 (en
Inventor
Daniel J. Chu
Kiran Pangal
Nathan R. Franklin
Prashant S. Damle
Hu CHAOHONG
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
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Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of EP3117435A1 publication Critical patent/EP3117435A1/en
Publication of EP3117435A4 publication Critical patent/EP3117435A4/en
Application granted granted Critical
Publication of EP3117435B1 publication Critical patent/EP3117435B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0033Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0035Evaluating degradation, retention or wearout, e.g. by counting writing cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0061Timing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0047Read destroying or disturbing the data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0052Read process characterized by the shape, e.g. form, length, amplitude of the read pulse
EP15761871.1A 2014-03-11 2015-03-09 Mitigating read disturb in a cross-point memory Active EP3117435B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/204,376 US9286975B2 (en) 2014-03-11 2014-03-11 Mitigating read disturb in a cross-point memory
PCT/US2015/019366 WO2015138281A1 (en) 2014-03-11 2015-03-09 Mitigating read disturb in a cross-point memory

Publications (3)

Publication Number Publication Date
EP3117435A1 EP3117435A1 (en) 2017-01-18
EP3117435A4 true EP3117435A4 (en) 2017-11-01
EP3117435B1 EP3117435B1 (en) 2022-07-06

Family

ID=54069547

Family Applications (1)

Application Number Title Priority Date Filing Date
EP15761871.1A Active EP3117435B1 (en) 2014-03-11 2015-03-09 Mitigating read disturb in a cross-point memory

Country Status (10)

Country Link
US (1) US9286975B2 (en)
EP (1) EP3117435B1 (en)
JP (1) JP6240340B2 (en)
KR (1) KR101934759B1 (en)
CN (1) CN105960678B (en)
BR (1) BR112016018316A2 (en)
DE (1) DE112015000339T5 (en)
RU (1) RU2653320C2 (en)
TW (1) TWI607456B (en)
WO (1) WO2015138281A1 (en)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9142271B1 (en) * 2014-06-24 2015-09-22 Intel Corporation Reference architecture in a cross-point memory
US9613691B2 (en) 2015-03-27 2017-04-04 Intel Corporation Apparatus and method for drift cancellation in a memory
US9437293B1 (en) * 2015-03-27 2016-09-06 Intel Corporation Integrated setback read with reduced snapback disturb
US9478286B1 (en) * 2015-12-26 2016-10-25 Intel Corporation Transient current-protected threshold switching devices systems and methods
US9947721B2 (en) 2016-04-01 2018-04-17 Micron Technology, Inc. Thermal insulation for three-dimensional memory arrays
KR102474305B1 (en) * 2016-06-27 2022-12-06 에스케이하이닉스 주식회사 resistance change memory device, and method of sensing the same
US9824767B1 (en) 2016-06-29 2017-11-21 Intel Corporation Methods and apparatus to reduce threshold voltage drift
US10032508B1 (en) 2016-12-30 2018-07-24 Intel Corporation Method and apparatus for multi-level setback read for three dimensional crosspoint memory
TWI640006B (en) * 2017-08-16 2018-11-01 華邦電子股份有限公司 Resistive memory storage apparatus and writing method thereof
CN109427392B (en) 2017-09-01 2021-01-12 华邦电子股份有限公司 Resistive memory device and writing method thereof
TWI629682B (en) * 2017-09-01 2018-07-11 華邦電子股份有限公司 Resistive memory storage apparatus and writing method thereof
US10332590B2 (en) * 2017-09-21 2019-06-25 Qualcomm Incorporated Static random access memory (SRAM) bit cells employing current mirror-gated read ports for reduced power consumption
US10395738B2 (en) 2017-11-30 2019-08-27 Micron Technology, Inc. Operations on memory cells
US10366747B2 (en) * 2017-11-30 2019-07-30 Micron Technology, Inc. Comparing input data to stored data
KR102401183B1 (en) 2017-12-05 2022-05-24 삼성전자주식회사 Memory device and operating method thereof
KR102515463B1 (en) * 2018-06-18 2023-03-30 에스케이하이닉스 주식회사 Nonvolatile memory apparatus, and read and write method thereof
KR102478221B1 (en) 2018-07-09 2022-12-15 에스케이하이닉스 주식회사 Semiconductor memory device including a control circuit for controlling a read operation
KR102559577B1 (en) 2018-08-08 2023-07-26 삼성전자주식회사 Resistive memory device
KR20200104603A (en) 2019-02-27 2020-09-04 에스케이하이닉스 주식회사 Nonvolatile memory apparatus effectively performing read operation and system using the same
KR20200120788A (en) 2019-04-11 2020-10-22 에스케이하이닉스 주식회사 Resistance Variable Memory Device
KR20200141887A (en) * 2019-06-11 2020-12-21 에스케이하이닉스 주식회사 Semiconductor memory device including a control circuit for controlling a read operation
KR20210013896A (en) 2019-07-29 2021-02-08 삼성전자주식회사 Resisitive memory device
US11315633B2 (en) 2019-12-30 2022-04-26 Micron Technology, Inc. Three-state programming of memory cells
US11177009B2 (en) * 2019-12-30 2021-11-16 Micron Technology, Inc. Multi-state programming of memory cells
KR20210096496A (en) 2020-01-28 2021-08-05 삼성전자주식회사 3D memory device
US11087854B1 (en) * 2020-03-05 2021-08-10 Intel Corporation High current fast read scheme for crosspoint memory
US11145366B1 (en) * 2020-03-24 2021-10-12 Intel Corporation Techniques to mitigate error during a read operation to a memory array
US11423988B2 (en) 2020-08-28 2022-08-23 Micron Technology, Inc. Programming techniques for polarity-based memory cells

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7986549B1 (en) * 2008-12-29 2011-07-26 Micron Technology, Inc. Apparatus and method for refreshing or toggling a phase-change memory cell
US20130044539A1 (en) * 2011-08-18 2013-02-21 Micron Technology, Inc. Apparatuses, devices and methods for sensing a snapback event in a circuit

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100294450B1 (en) * 1998-09-24 2001-09-17 윤종용 Internal voltage generation circuit of array of semiconductor memory device
JP4138173B2 (en) * 1999-08-26 2008-08-20 株式会社ルネサステクノロジ Nonvolatile semiconductor memory device and erasing method thereof
NO312928B1 (en) * 2001-02-26 2002-07-15 Thin Film Electronics Asa Non-destructive readout
US6791885B2 (en) * 2002-02-19 2004-09-14 Micron Technology, Inc. Programmable conductor random access memory and method for sensing same
JP3785125B2 (en) * 2002-08-21 2006-06-14 富士通株式会社 Semiconductor memory device
JP4229674B2 (en) * 2002-10-11 2009-02-25 Necエレクトロニクス株式会社 Semiconductor memory device and control method thereof
TW200527656A (en) * 2004-02-05 2005-08-16 Renesas Tech Corp Semiconductor device
US7133311B2 (en) * 2004-08-16 2006-11-07 Bo Liu Low power, high speed read method for a multi-level cell DRAM
US7259982B2 (en) 2005-01-05 2007-08-21 Intel Corporation Reading phase change memories to reduce read disturbs
US7405964B2 (en) * 2006-07-27 2008-07-29 Qimonda North America Corp. Integrated circuit to identify read disturb condition in memory cell
JP4524684B2 (en) * 2006-11-21 2010-08-18 エルピーダメモリ株式会社 Memory reading circuit and method
US7382647B1 (en) * 2007-02-27 2008-06-03 International Business Machines Corporation Rectifying element for a crosspoint based memory array architecture
US20110012082A1 (en) 2008-03-21 2011-01-20 Nxp B.V. Electronic component comprising a convertible structure
US7990761B2 (en) * 2008-03-31 2011-08-02 Ovonyx, Inc. Immunity of phase change material to disturb in the amorphous phase
US7808831B2 (en) * 2008-06-30 2010-10-05 Sandisk Corporation Read disturb mitigation in non-volatile memory
US8009489B2 (en) * 2009-05-28 2011-08-30 Freescale Semiconductor, Inc. Memory with read cycle write back
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US8634235B2 (en) 2010-06-25 2014-01-21 Macronix International Co., Ltd. Phase change memory coding
US8194441B2 (en) * 2010-09-23 2012-06-05 Micron Technology, Inc. Phase change memory state determination using threshold edge detection
JP5715306B2 (en) * 2011-08-29 2015-05-07 インテル・コーポレーション Snapback detection at tile level using coupling capacitors in crosspoint arrays
US8681540B2 (en) * 2011-08-29 2014-03-25 Intel Corporation Tile-level snapback detection through coupling capacitor in a cross point array
US8953387B2 (en) * 2013-06-10 2015-02-10 Micron Technology, Inc. Apparatuses and methods for efficient write in a cross-point array

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7986549B1 (en) * 2008-12-29 2011-07-26 Micron Technology, Inc. Apparatus and method for refreshing or toggling a phase-change memory cell
US20130044539A1 (en) * 2011-08-18 2013-02-21 Micron Technology, Inc. Apparatuses, devices and methods for sensing a snapback event in a circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2015138281A1 *

Also Published As

Publication number Publication date
US20150262661A1 (en) 2015-09-17
TW201535410A (en) 2015-09-16
TWI607456B (en) 2017-12-01
DE112015000339T5 (en) 2016-09-22
CN105960678B (en) 2019-06-18
CN105960678A (en) 2016-09-21
JP6240340B2 (en) 2017-11-29
RU2653320C2 (en) 2018-05-07
JP2017512354A (en) 2017-05-18
KR20160106702A (en) 2016-09-12
BR112016018316A2 (en) 2022-07-12
KR101934759B1 (en) 2019-01-04
EP3117435A1 (en) 2017-01-18
RU2016133316A (en) 2018-02-16
US9286975B2 (en) 2016-03-15
EP3117435B1 (en) 2022-07-06
WO2015138281A1 (en) 2015-09-17

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