EP2198421A1 - Dispositif de contrôle, dispositif d'affichage et procédé pour vérifier la validité de signaux d'affichage - Google Patents
Dispositif de contrôle, dispositif d'affichage et procédé pour vérifier la validité de signaux d'affichageInfo
- Publication number
- EP2198421A1 EP2198421A1 EP08805188A EP08805188A EP2198421A1 EP 2198421 A1 EP2198421 A1 EP 2198421A1 EP 08805188 A EP08805188 A EP 08805188A EP 08805188 A EP08805188 A EP 08805188A EP 2198421 A1 EP2198421 A1 EP 2198421A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- display
- test
- image
- test value
- image data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 135
- 238000000034 method Methods 0.000 title claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 230000000052 comparative effect Effects 0.000 abstract 1
- 238000004364 calculation method Methods 0.000 description 10
- 230000005540 biological transmission Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 125000004122 cyclic group Chemical group 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D3/00—Indicating or recording apparatus with provision for the special purposes referred to in the subgroups
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/08—Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
- G09G2370/045—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
Definitions
- the invention is based on a test device, a display device and a method for checking the validity of display signals. From JP 09-288136 A Abstract is already a method and an apparatus for
- test device according to the invention with the features of the independent
- Claim has the advantage that from the display signals only those data are taken into account, which are relevant for the image representation as such.
- a check is advantageously carried out in a simple manner such that a test value is formed from these image data according to a given rule.
- the test value for the entire image data for an entire image to be displayed or for a defined subarea of an overall image must give a test value which can be predetermined and stored for the image. This makes it possible to check the correctness of the displayed image itself. In this case, the check is not dependent on an evaluation of the additional control signals, but can evaluate the image content itself.
- the computational effort can be kept very simple at the same time.
- test device has an interface for transmitting at least one further strigerwerts.
- test values for further images to be tested can be transmitted to the test device.
- a display device which has a test device according to the invention.
- a test device By providing such a test device in a display device, the correctness of image data of the display device can be checked in a simple manner and without much effort.
- the test device advantageously accesses the data connection between the graphics controller and the display device, in particular on the side of the data connection that points to the display. This makes it possible, in particular, to easily determine an overload of a data connection.
- Display device to provide a memory module in which at least one test value is stored.
- the stored test value can be used directly in an initialization mode of the display device and compared with a preferably with a test value of a predetermined by the display device test image.
- a test value can be stored and compared with a subsequently determined test value for the same image content.
- a display device can advantageously be used in a motor vehicle in order to present in particular driving-relevant data, because the inventive checking of the validity of the display signals ensures that a correct image is output in the display device. A driver can thus be safely informed about the driving-relevant data of his vehicle.
- a calculation of the test value advantageously takes place in that the bit value of a pixel associated with a clock is taken into account in the calculation of the test value.
- those image data are evaluated whose validity is determined by the enable signal. Thus, it can be ensured that the test value is formed only from valid image data.
- Polynomial divison is included in the determination of the test value.
- One such method is, for example, the cyclic redundancy check (CRC).
- CRC cyclic redundancy check
- the CRC method can be applied continuously to the data stream of the image data signals.
- FIG. 1 shows a display device or test device according to the invention
- FIG. 2 shows a test device according to the invention in detail
- FIG. 3 shows a first representation of display signals for carrying out the method according to the invention
- Figure 4 shows another embodiment of display signals for a
- FIG. 5 shows an exemplary embodiment of a method sequence of the method according to the invention.
- the test device can be used to test any display signals.
- it may be integrated in a display device in order to provide information as to whether the display signal provided for the display is valid. If the signal is valid, it can be assumed that the display also represents a correct, expected image. Image errors that are based on the display signals can thus be excluded.
- the test device only to a
- Source of display signals for example, to connect an output of a graphics controller or a data line, which cause the display signals from a graphics controller.
- An actual display unit is then not required for checking the validity of the display signals.
- both the function of the graphics controller, but also the function of the data transmission line for the display signals can be checked.
- the invention is explained below using the example of a display in a vehicle, in which the display signals are checked in accordance with the invention.
- the term "display signal” is to be understood as the entirety of those signals which are output to a display for image display by a graphics controller
- the display signals are designed for direct reproduction by the display device itself , which is present in an RG B data format, for example, as well as control signals, such as a clock signal, a horizontal synchronization signal, a vertical synchronization signal and an enable signal, by the term "image data” is to be understood to mean a set of individual digital data values which each indicate image values for individual pixels of an ad. In RGB format, this would be a set of data indicating a brightness value for each color. These image data are each digitally coded. For example, a pixel is described by an RGB color value consisting of three times six bits. FIG.
- the graphics unit 1 shows a display device 1 which has a graphics unit 2 and a display unit 3.
- the graphics unit 2 has a graphics controller 4.
- the graphics controller 4 processes image information which is fed via an input 5 to the graphics unit 2.
- the graphics unit 2 can also have a computing unit 6, which calculates display signals and forwards them to the graphics controller 4 for display.
- further control information can also be routed via a connection 7 from a data bus 8 to the graphics controller 4.
- the graphic controller 4 converts the corresponding image data into display signals for the display unit 3 in accordance with appropriate specifications, adapted to the display unit 3.
- the display signals are adapted, for example, to the number of pixels, for example 800 ⁇ 600 pixels, of the display unit 3.
- the display signals are transmitted via a preferably multi-core data line 9 from the graphics controller 4 to the display unit 3.
- the display signals are directly converted in the display 10.
- the display 10 is implemented, for example, as a liquid crystal display.
- the image data is written line by line in the display matrix of the liquid crystal display.
- Control data is the line break or the image break.
- the writing of the image data is controlled by a clock signal, which is also transmitted via the data link 9.
- a clock signal which is also transmitted via the data link 9.
- Errors they can be detected by means of a test device according to the invention.
- test device 11 in a first embodiment between an input 12 of the display unit 3 and the
- the test device 11 checks the validity of the display signals, which are given via the input 12 to the display unit 3. In a first embodiment, the test device 11 automatically performs this checking when the display device 1 is switched on. In According to another embodiment, a corresponding request can also be given via the data bus 8 to the display unit 3 via a connection 13 of the display device. Furthermore, it is also possible to provide a test value for that image which the graphics controller 4 is currently outputting to the display unit 3 via the data bus 8 and the connection 13 to the
- Test device 11 to transmit.
- the display signals are always passed through the test device 11.
- the test device 11 picks up the signals from the connection between the input 12 and the display 10 so that the display signals are passed along the dashed line 14 directly from the input 12 to the display 10.
- the result of the validity check is output by the test device 11.
- the output is via the
- the test result is thus available both for the graphic unit 2, but also for other devices connected to the data bus 8.
- a warning device connected to the data bus 8 for example an acoustic signal generator, can output a warning signal to a user of the display.
- test device 11 may be arranged, for example, on a central display of a vehicle to which image information or drive signals are supplied from different image sources.
- the display in the vehicle can have a connection via which the test device 11 can be connected, for example, during production in the factory or in the workshop. Furthermore, the test device 11 may also be integrated in the display in the vehicle.
- the test device 11 which is realized, for example, as an FPGA, has a control unit 20, which via a first input 21, the horizontal synchronization signal, via a second input 22, the vertical Synchronization signal and via a third input 23, the enable signal is supplied. Furthermore, the control unit 20 has a fourth input 24 which is controlled, for example, from the data bus 8 via the connection 13 of the display unit 3. About the fourth input 24, the start of a test can be initiated.
- the test device 11 which is realized, for example, as an FPGA, has a control unit 20, which via a first input 21, the horizontal synchronization signal, via a second input 22, the vertical Synchronization signal and via a third input 23, the enable signal is supplied.
- the control unit 20 has a fourth input 24 which is controlled, for example, from the data bus 8 via the connection 13 of the display unit 3. About the fourth input 24, the start of a test can be initiated.
- the test device 11 which is realized, for example, as an FPGA, has a control unit 20, which via a first input 21, the
- Test device 11 to a memory 25, in which at least one test value for performing the verification of the validity of the display signals is stored.
- at least one further test value can be stored in the memory 25 via a fifth input 26.
- the test value stored in the memory 25 is read out by a comparator unit 27.
- a test value can also be forwarded directly to a comparator unit 27 via the fifth input 26.
- the fifth input 26 may be embodied, for example, as a UART, as an SBI or as a 12C interface.
- test value of an image can also be calculated and stored in a first step. If the same image is transferred immediately afterwards, continuously or at a later time, the test value determination is repeated. If the later calculated and the stored test value do not match, at least in one case no valid data was available.
- the memory 25 may be designed in a further embodiment for storing image data of one or more test images, which can be read out for scholarwertbeées.
- the test device 11 has a computing unit 28, which is used to calculate the test value.
- the arithmetic unit 28 is supplied with the image data via an input 29.
- the clock signal is also transmitted via an input 30 to the arithmetic unit 28.
- the image data are, for example, RGB data having a color depth of 16, 18 or even 24 bits.
- the arithmetic unit 28 reads out the RGB data of a pixel in each case.
- a readout of the data present via the input 29 takes place only if the data from the Control unit 20 for this purpose, a start signal via an interface 31 is given.
- a set enable signal is required for readout of the data, which is passed through an interface 32 from the third input 23 via the control unit 20 to the arithmetic unit 28. As long as the enable signal is set accordingly, image data in the
- Computing unit 28 according to a predetermined rule included in the test value calculation. If a transmission of the image is completed, at the latest with the setting of the vertical synchronization signal 22, the control unit 20 outputs a stop signal via an interface 33 to the arithmetic unit 28. Accordingly, the stop signal is also passed to the comparator unit 27. The comparator unit 27 now reads the calculated test value from the arithmetic unit 28. It compares this value with the value stored in the memory 25. If both values match, a corresponding signal is output via an output 34 of the test device 11. If both values do not match, an error signal is output. In the simplest way, the signal at the output 34 can be set to "high” or "low” accordingly.
- an addition of the bit values may take place as a rule for determining the test value.
- Embodiment here is a simple summation of the transmitted data possible.
- the data stream is in each case broken down into packets of a predetermined length, for example 18 bits, and the individual data sets resulting therefrom are added up.
- more complex rules are used to determine the test value. It is thus possible, for example, to multiply the individual data blocks resulting from the decomposition of the data stream by a fixed number and then to add them up.
- a particularly secure detection is obtained when using a cyclic redundancy check, in which instead of a simple addition a polynomial division is performed.
- the incoming data is divided by a fixed polynomial and the remainder of the division is considered as the check value.
- Such a method is, for example, the CRC32 test algorithm, which can also be applied to a data stream, in this case a data stream of the valid image data.
- each image can be used for a corresponding review.
- no separate video input or output is required because the test itself is readily integrable in the display device.
- test images with vertical white and black lines that may cause errors
- standard test images that show only RG B gradients will not fail in such cases.
- FIG. 3 shows an exemplary embodiment of signals during the test by the test device.
- a first signal 41 is a regular one
- the Clock signal that specifies the read-out clock for the image data.
- the second signal 42 is the enable signal. While set to “low”, the data is not included in the check value, when set to "high”, the respective image data, namely, the digital values for each transmitted pixel represented in the third signal 43, respectively according to the given
- Test specification included in the test value calculation A calculation thus takes place between the first time 44 and the second time 45. Subsequent or previous possibly transmitted image data are not included for the test value determination.
- FIG. 4 shows a further embodiment in which read-out is further refined.
- the clock signal is also shown again.
- the vertical synchronization signal and in the fourth line 54 the horizontal synchronization signal is shown.
- the third line 53 denotes Again, the enable signal.
- the start signal is shown, which initially resets the counter and then allows a calculation of the test value.
- the stop signal 47 is shown, which stops the calculation of the test value.
- inclusion of image data takes place only when the VSYNC signal, the enable signal and the HSYNC signal are set.
- data is not constantly included between the first time 58 and the second time 59 in the sketchwertbetiti, but only if these three conditions are met. This ensures that the entire useful image data and preferably only these are recorded from the display signals and supplied to the test value. After resetting the stop signal to the third time 60, the next image can be transmitted.
- the entire image data of an image content is detected.
- it is also possible to define a specific section of the image for example the upper left corner of the image with a pixel frame of 100 ⁇ 200 pixels, or else a picture section in the center of the picture.
- the verification of the validity can be limited to a smaller portion of the image, for example, a special image dynamics or a special high
- a corresponding control signal would have to be provided by the control unit, so that in each case a pixel is checked as to whether it is contained in the target area to be checked and thus also included in the check value calculation or not.
- FIG. 5 shows a sequence of the method according to the invention for checking the validity. Starting from an initialization step 70, a check of subsequent display signals is initiated. In this case, a counter for the test value from the image data is set to zero. In a first test step 71 it is checked whether all conditions for the possible presence of valid image data are fulfilled.
- the presence of the enable signal and the correct state of the synchronization signals are checked. If there are no corresponding prerequisites, then it can be assumed that no valid image data is present at the input 29 of the test device 11. In this case, it branches back and the first test step 71 is performed again. If, on the other hand, all prerequisites for valid image data are present, a branch is made to a detection step 72. The image data correspondingly applied to the input 29 are added to the test value according to the given rule, for example additively. Subsequently, a branch is made to a second test step 73. In the second test step 73 it is checked whether the entire predetermined image frame has been processed.
- the system branches back to the detection step 72 and the next image data set specified by the clock signal is read out and included in the test value calculation. If the end of the predetermined image frame has been reached, then branching continues to the comparison step 74 in that the comparator unit 27 compares the calculated test value with the predetermined test value. Subsequently, a branch is made to a third test step 75. If both values match, then valid image data are available and a further branch is made to an end step 76, in which the validity is confirmed and a corresponding signal is output by the test device 11. If the calculated test value does not agree with the stored test value, a branch is made to an end step 77, in which, however, an error signal is output by the test device 11.
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
- Controls And Circuits For Display Device (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102007048608A DE102007048608A1 (de) | 2007-10-10 | 2007-10-10 | Testeinrichtung, Anzeigevorrichtung und Verfahren zum Überprüfen einer Gültigkeit von Anzeigesignalen |
PCT/EP2008/063548 WO2009050106A1 (fr) | 2007-10-10 | 2008-10-09 | Dispositif de contrôle, dispositif d'affichage et procédé pour vérifier la validité de signaux d'affichage |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2198421A1 true EP2198421A1 (fr) | 2010-06-23 |
Family
ID=40210772
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP08805188A Ceased EP2198421A1 (fr) | 2007-10-10 | 2008-10-09 | Dispositif de contrôle, dispositif d'affichage et procédé pour vérifier la validité de signaux d'affichage |
Country Status (4)
Country | Link |
---|---|
US (1) | US8543349B2 (fr) |
EP (1) | EP2198421A1 (fr) |
DE (1) | DE102007048608A1 (fr) |
WO (1) | WO2009050106A1 (fr) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101483345B1 (ko) | 2009-07-06 | 2015-01-15 | 도이타-베르케 게엠베하 | 디스플레이 상에 안전 관련 정보의 재현을 위한 방법 및 그 방법의 응용을 위한 장치 |
EP2439722B1 (fr) * | 2010-09-20 | 2013-06-19 | Pixy AG | Procédé de vérification de données d'affichage pixellisées pour la représentation sur un écran d'appareil d'affichage dans un véhicule |
EP2509332B1 (fr) * | 2011-04-04 | 2015-12-30 | AGUSTAWESTLAND S.p.A. | Système de test automatique pour systèmes d'affichage numérique |
DE102012208481B4 (de) * | 2012-05-21 | 2022-03-03 | Beckhoff Automation Gmbh | Verfahren und Vorrichtung zum Betreiben eines Computersystems |
EP2779151B1 (fr) | 2013-03-11 | 2018-05-16 | Renesas Electronics Europe Limited | Contrôleur de sortie vidéo |
DE102013012679A1 (de) | 2013-07-31 | 2015-02-05 | Deuta-Werke Gmbh | Verfahren und Vorrichtung zur Darstellung eines sicherheitsrelevanten Zustands |
CN103617772B (zh) * | 2013-11-12 | 2016-02-03 | 华映视讯(吴江)有限公司 | 显示面板及其测试方法 |
DE102015216574A1 (de) * | 2015-08-31 | 2017-03-02 | Siemens Aktiengesellschaft | Verfahren zum Überprüfen der Richtigkeit von einer Darstellung von Bilddaten auf einem Anzeigemittel und Anzeigeeinrichtung |
DE102016200823A1 (de) | 2016-01-21 | 2017-07-27 | Robert Bosch Gmbh | Vorrichtung und Verfahren zum Überprüfen einer Gültigkeit von Bilddaten in einer Anzeigeeinrichtung unter Einbeziehung von Überprüfungsdaten |
DE102016200826A1 (de) | 2016-01-21 | 2017-07-27 | Robert Bosch Gmbh | Vorrichtung und Verfahren zum Überprüfen einer Gültigkeit von Bilddaten in einer Anzeigeeinrichtung |
JPWO2017183183A1 (ja) * | 2016-04-22 | 2018-11-08 | Necディスプレイソリューションズ株式会社 | 映像監視方法、表示装置及び表示システム |
DE102016211893A1 (de) * | 2016-06-30 | 2018-01-04 | Robert Bosch Gmbh | Vorrichtung und Verfahren zur Überwachung und Korrektur einer Anzeige eines Bildes mit Ersatzbilddaten |
DE102016217518A1 (de) | 2016-09-14 | 2018-03-15 | Robert Bosch Gmbh | Vorrichtung und Verfahren zur Überwachung einer Nichtanzeige eines vorgegebenen Bildes, insbesondere eines Warnsymbols, in einem Display einer Anzeigevorrichtung |
DE102016225349A1 (de) | 2016-12-16 | 2018-06-21 | Robert Bosch Gmbh | Verfahren zum Überprüfen einer Gültigkeit von Bilddaten |
DE102017201101A1 (de) * | 2017-01-24 | 2018-07-26 | Zf Friedrichshafen Ag | Verfahren und Vorrichtung zum Betreiben eines Displays |
US11001143B2 (en) * | 2018-12-19 | 2021-05-11 | Qualcomm Incorporated | Dynamically re-configurable displays with reconfigurable regions of interest for safety critical content |
DE102018222493A1 (de) | 2018-12-20 | 2020-06-25 | Continental Automotive Gmbh | Verfahren zur Validierung von Umfeldbilddaten, Vorrichtung, Computerprogramm und computerlesbares Speichermedium |
CN109741698B (zh) * | 2019-01-04 | 2019-12-03 | 精电(河源)显示技术有限公司 | 显示数据缺陷检测方法及装置 |
JP7333135B2 (ja) * | 2019-07-18 | 2023-08-24 | ラピスセミコンダクタ株式会社 | 信号処理回路 |
CN113077735B (zh) * | 2020-01-06 | 2023-11-17 | 广州汽车集团股份有限公司 | 一种车载显示设备的测试方法、装置及系统 |
DE102021112394A1 (de) | 2021-05-12 | 2022-11-17 | Bayerische Motoren Werke Aktiengesellschaft | Verfahren, Vorrichtung, Fahrzeug, Computerprogramm, computerlesbares Speichermedium zur Validierung eines anzuzeigenden Bildes |
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US7467028B2 (en) * | 2004-06-15 | 2008-12-16 | Honda Motor Co., Ltd. | System and method for transferring information to a motor vehicle |
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2007
- 2007-10-10 DE DE102007048608A patent/DE102007048608A1/de active Pending
-
2008
- 2008-10-09 US US12/734,051 patent/US8543349B2/en active Active
- 2008-10-09 EP EP08805188A patent/EP2198421A1/fr not_active Ceased
- 2008-10-09 WO PCT/EP2008/063548 patent/WO2009050106A1/fr active Application Filing
Non-Patent Citations (2)
Title |
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None * |
See also references of WO2009050106A1 * |
Also Published As
Publication number | Publication date |
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US8543349B2 (en) | 2013-09-24 |
US20100283858A1 (en) | 2010-11-11 |
DE102007048608A1 (de) | 2009-04-16 |
WO2009050106A1 (fr) | 2009-04-23 |
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