EP1650696B1 - Integrated circuit card selective power control - Google Patents

Integrated circuit card selective power control Download PDF

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Publication number
EP1650696B1
EP1650696B1 EP05022330A EP05022330A EP1650696B1 EP 1650696 B1 EP1650696 B1 EP 1650696B1 EP 05022330 A EP05022330 A EP 05022330A EP 05022330 A EP05022330 A EP 05022330A EP 1650696 B1 EP1650696 B1 EP 1650696B1
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EP
European Patent Office
Prior art keywords
integrated circuit
power
circuit card
card
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP05022330A
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German (de)
French (fr)
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EP1650696A1 (en
Inventor
Hyuk-Jun Sung
Ki-Yeol Kim
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of EP1650696A1 publication Critical patent/EP1650696A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0716Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising a sensor or an interface to a sensor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0707Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0712Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of triggering distinct operating modes or functions dependent on the strength of an energy or interrogation field in the proximity of the record carrier
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory

Definitions

  • the invention relates to an integrated circuit card according to the preamable of claim 1.
  • This application claims priority to the Korean Patent Application 2004-84058 filed on October 20, 2004 .
  • An IC card is a credit card-sized plastic card to which a thin semiconductor device is attached. Typically, an IC card provides a higher level of security than a conventional magnetic striped card and does not readily lose stored data.
  • the IC card is generally a plastic card having the same thickness and size as a conventional magnetic card or as a credit card formed in a type of a Chip-On-Board (COB) with a thickness of about 0.5mm.
  • COB Chip-On-Board
  • the IC cards are divided into contact IC cards and contactless IC cards.
  • the contactless IC cards are further divided into Contactless IC Cards (CICC) and Remote Coupling Communication Cards (RCCC).
  • CICC Contactless IC Cards
  • RCCC Remote Coupling Communication Cards
  • a communication range is from 0 to 2mm at a carrier frequency of 4.9157MHz.
  • a communication range is from 0 to 10cm, at a carrier frequency of 13.56MHz.
  • the contactless IC card includes an Integrated Circuit (IC) for carrying out processing and/or memory functions.
  • IC Integrated Circuit
  • the contactless IC card does not use a galvanic element and is provided with interchanges of a signal and power by an inductive coupling with a proximity coupling device or a card reader.
  • the card reader connected with the contactless IC card generates an energy field using Radio Frequency (RF) field and transfers power to the contactless IC card.
  • RF Radio Frequency
  • FIGS. 1A and 1B illustrate an example of a communication signal for an A-type interface according to the ISO/IEC 14443.
  • a signal illustrated in FIG. 1A shows a signal transmitted to the contactless IC card from a card reader
  • FIG. 1B shows a signal transmitted to the card reader from the contactless IC card.
  • Two kinds of communication signal contacts are described in ISO/IEC 14443.
  • Communications from a card reader to a contactless IC card according to the A-type of ISO/IEC standard adopts an Amplitude Shift Keying (ASK) 100% modulation method and a modified Miller Code method.
  • a signal transmitted from the card reader to the contactless IC card has a bit rate or a data rate of fc/128, i.e., 106 kbps.
  • the transmitted signal from the contactless IC card to the card reader is coded in a Manchester code and demodulated in an On-Off Key (OOK) method.
  • OOK On-Off Key
  • the cards using the A-type communication signal contact method generate a timing at a regular time interval from an ASK modulation signal received from the card reader and process data sending/receiving bit by bit.
  • FIG. 2 shows a pause interval of data transmitted to an IC card from a card reader in at least one embodiment of the invention.
  • data is transmitted from an IC card to a card reader
  • power supplied from the card reader is stably coupled to the IC card.
  • a "pause" t2 interval is included.
  • a duration of frame wherein a power supplied from the card reader to the IC card is temporarily halted.
  • US 2003/0024985 A1 discloses a transponder unit aiming to reduce power consumption during communication intervals by deactivating certain circuits during load periods.
  • FIGS. 1A and 1B are views illustrating an example of a communication signal for the A-type interface of ISO/IEC 14443;
  • FIG. 2 is a diagram illustrating a pause interval of data transmitted to an IC card from a card reader
  • FIG. 3 is a block diagram of a circuit configuration of a smart card in accordance with the invention.
  • FIG. 4 is a table illustrating a power control of the circuits equipped in the smart card by the power controller at a communication/non-communication interval in accordance with the embodiment of the invention shown in FIG. 3 ;
  • FIG. 5 is a block diagram showing configurations of a power controller and a security detection circuit in accordance with the invention.
  • FIG. 6 is a status diagram of a state machine used in accordance with the invention.
  • FIGS. 7 and 8 are timing diagrams showing pulse signals generated from a counter and control signals generated from a control signal generator in accordance with the invention.
  • FIGS. 9A and 9B are diagrams showing that power is consumed in N detectors in a corresponding embodiment of the invention.
  • a smart card or a plastic card with a credit card size having an integrated circuit chip with a capability of processing specific transactions by equipping the smart card with a microprocessor, a card operating system, a security module, a memory and so on is explained as an example, but the invention may be applicable to both different types of integrated circuit cards and electronic devices communicating with the external devices.
  • FIG. 3 is a view showing a circuit configuration of a smart card in accordance with the invention.
  • a smart card 100 is a proximity type contactless IC card which operates pursuant to ISO/IEC 14443 standard.
  • the smart card 100 includes a RF interface 110 connected to a bus 101, a CPU 120, a ROM 130, a RAM 140, an encoder 150, a random number generator 160, a security detection circuit 170 and a power controller 180. Even if not shown in FIG. 3 , the smart card 100 may further include an Electrically Erasable and Programmable Read Only Memory (EEPROM) and a Serial Input/Output (SIO) interface and a clock generator.
  • EEPROM Electrically Erasable and Programmable Read Only Memory
  • SIO Serial Input/Output
  • FIG. 4 is a view illustrating a power control of the circuits equipped in the smart card by the power controller in a communication/non-communication interval in accordance with the embodiment shown in FIG. 3 .
  • FIG. 4 illustrates that circuits equipped in the smart card 100 control power through the power controller 180 in a communication/non-communication interval in accordance with the embodiment shown in FIG. 3 .
  • the communication interval refers to an interval for transmitting and receiving data between the card reader and the smart card 100, but may be defined as an interval for transmitting data from the card reader to the smart card 100 including a pause interval.
  • the power controller 180 sets circuit blocks related to a communication in the communication interval, for example RF interface 110 and RAM 140 in a normal state.
  • the power controller 180 sets circuit blocks not requiring operations out of circuit blocks not related to a communication, for example, a CPU 120, a ROM 130, an encoder 150 and a random number generator 160 as a standby state.
  • the encoder 150 includes a number of gates to perform complicated operations, thus a large amount of current is consumed.
  • the random number generator 160 consumes a large amount of current because it is designed to operate at a very high speed to generate a random number.
  • the smart card 100 includes a plurality of security detectors.
  • the security detectors should be set in an operational state as long as a power is supplied to the smart card 100.
  • a power controller 180 disables all the security detectors so as to minimize power consumption in a communication interval and sequentially enables them.
  • the power controller 180 sets circuit blocks related to the data processes in the non-communication interval in a normal state. For example, if the data received from the external devices and stored in the RAM 140 is encoded and stored in the RAM 140 again, the CPU 120, the RAM 140 and the encoder 150 are set as a normal state. Circuit blocks which should be always in an operational state but do not affect the operations even if they are temporarily disabled such as a security detection circuit 170 are set in a power saving state. The circuit blocks set in a power saving state are enabled in a sequential manner. If the other circuit blocks except the security detection circuits 170 and the circuit blocks required for the current operations are set in a power saving state, the power consumption in the non-communication interval of the smart card 100 is further decreased.
  • FIG. 5 is a block diagram illustrating configurations of the power controller 180 and the security detection circuit 170 in accordance with the invention.
  • the security detection circuit 170 includes five detectors 171 to 175.
  • the power detector 171 detects a level of a voltage supplied from the external devices, for example, a card reader, and outputs a detection signal when the detected voltage is not within a regular range.
  • the frequency detector 172 detects a frequency of a main clock signal and outputs a detection signal when the detected frequency is not within a regular range.
  • the temperature detector 173 detects a temperature around the smart card 100 and outputs a detected signal if the detected temperature is higher or lower than a predetermined range of temperature.
  • the exposure detector 174 outputs a detection signal when a silicon oxide layer used as a protection layer of a chip surface is removed, and the chip is exposed to a light.
  • the metal4 detector 175 outputs a detection signal when an upper metal is a metal4 and is removed.
  • FIG. 5 only five exemplary detectors 171 to 175 are illustrated, but various detectors for detecting an attack of an intruder or an abnormal state of an operational state can be included in the smart card 100.
  • the security detection circuit 170 ceases an operation of the smart card 100 when a detection signal is input out of at least one of detectors 171 to 175, and the circuit 170 may further include a controller informing an intrusion by an intruder.
  • the power controller 180 generates control signals DEN1 to DEN5 to enable or disable the detectors 171 to 175 in the security detection circuit 171 including the counter 181 and the control signal generator 182.
  • the counter 181 generates pulse signals EN_END and GD _END with a predetermined time interval, and generates control signals so as to control the counter 181 and the detectors 171 to 175.
  • FIG. 6 is a state diagram of a state machine used in accordance with the invention.
  • FIGS. 7 and 8 are timing diagrams showing signals generated from a counter and control signals generated from a control signal generator in accordance with the invention. The pulse signals generated from the counter 181 and control signals DEN1 to DEN5 generated from the control signal generator 182 are shown in FIGS. 7 and 8 .
  • the power controller 180 comes into an idle state. If the smart card 100 is stabilized and enters a power saving mode, the power controller 180 is transformed to an idle guard state. At the idle guard state, the power controller 180 deactivates control signals DEN1 to DEN5 to disable all the detectors 171 to 175. If the power controller 180 informs the counter 181 that it is transformed in a guard state, the counter 181 carries out a counting operation, and outputs a guard end pulse GD_LAST if the guard time passes. Next, a state transformation is completed to carry out a power saving mode.
  • the power controller 180 transforms the power detector 171 to an enable state.
  • the control signal DEN1 for enabling a voltage detector 171 is activated, and other control signals DEN2 to DEN5 are deactivated.
  • the counter 181 starts to count in response to a control of the control signal generator 182, and outputs an enable end pulse EN_LAST if an enable time passes.
  • the power controller 180 transforms the power detector 171 from an enable state to a guard state by the enable end pulse EN_LAST.
  • the counter 181 generates a guard end pulse signal GD_LAST if a guard time passes from a point when an enable end pulse signal EN_LAST occurs.
  • the power controller 180 transforms the frequency detector 172 into a guard state by the guard end pulse GD_LAST.
  • the power controller 180 is repeatedly transformed from an enable state to a guard state with respect to all the detectors 171 to 175.
  • the guard is a protection interval for preventing a temporary voltage rise from occurring when an enable state with respect to a detector is transformed into another enable state with respect to the next detector.
  • the smart card 100 is thus not directly related to a communication in a communication interval, but sequentially enables circuit blocks which should be in an operational state one by one to minimize power consumption in a communication interval. Thus, stable operations of the smart card cannot be secured in an interval where power supply is unstable.
  • the state machine 183 of the power controller 180 illustrated in FIG. 6 is repeatedly performed when the smart card 100 is in an operational state, and minimizes power consumption in the detectors 171 to 175 in a non-communication interval as well as a communication interval.
  • Control signals shown in FIG. 8 are generated from the power controller 180 if the smart card 100 is temporarily set as a stop mode when the power controller 180 performs a power saving mode.
  • the power controller 180 when the power controller 180 is in a frequency detector enable state, i.e., when the control signal DEN2 is at an activation state, if a stop mode signal STOP is activated to a high level, the power controller 180 is transformed to a voltage detector guard state to deactivate a control signal DEN2. If the stop mode signal STOP is deactivated into a low level, the power controller 180 is transformed to a frequency detector enable state again.
  • FIGS. 9A and 9B show the power consumption at N detectors in an embodiment of the invention. Assuming that one detector consumes 100 ⁇ A power, the power consumption at the detectors is N*100 ⁇ A when N detectors are in an enable state as shown in FIG. 9A . However, a smart card in accordance with the invention sequentially enables N detectors, and the maximum power consumption in the detectors at a specific point is 100 ⁇ A. Thus, the power consumption can be reduced to 1/N.
  • the communication range with an external device such as a card reader is inversely proportional to the power consumption of the smart card. Therefore, if power consumption in a smart card is decreased, the communication distance can be increased.
  • the power supplied to the detectors in the non-communication interval as well as in the communication interval can thus be reduced by 1/N, and therefore the power consumption in the smart card is decreased.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electromagnetism (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Sources (AREA)
  • Credit Cards Or The Like (AREA)

Description

  • The invention relates to an integrated circuit card according to the preamable of claim 1. This application claims priority to the Korean Patent Application 2004-84058 filed on October 20, 2004 .
  • Since credit cards appeared first in 1920s, various kinds of cards including a cash card, a credit card, an identification card, a security card and a department store credit card have been used. Recently, an integrated circuit (IC) card, also called a minimized computer, has drawn attention because of its convenience, stability or versatility.
  • An IC card is a credit card-sized plastic card to which a thin semiconductor device is attached. Typically, an IC card provides a higher level of security than a conventional magnetic striped card and does not readily lose stored data. The IC card is generally a plastic card having the same thickness and size as a conventional magnetic card or as a credit card formed in a type of a Chip-On-Board (COB) with a thickness of about 0.5mm.
  • The IC cards are divided into contact IC cards and contactless IC cards. The contactless IC cards are further divided into Contactless IC Cards (CICC) and Remote Coupling Communication Cards (RCCC). For the CICC, a communication range is from 0 to 2mm at a carrier frequency of 4.9157MHz. For the RCCC, a communication range is from 0 to 10cm, at a carrier frequency of 13.56MHz.
  • The contactless cards specified in accordance with the International Organization for Standardization (ISO) and the International Electrotechnical Commission (IEC). For example, the ISO/IEC 10536 specifies CICC, and ISO/IEC 14443 specifies certain mechanical characteristics of RCCC and protocols on a wireless frequency power, signal interface, initialization procedure and collision prevention techniques, etc. According to the ISO/IEC 14443, the contactless IC card includes an Integrated Circuit (IC) for carrying out processing and/or memory functions. The contactless IC card does not use a galvanic element and is provided with interchanges of a signal and power by an inductive coupling with a proximity coupling device or a card reader. The card reader connected with the contactless IC card generates an energy field using Radio Frequency (RF) field and transfers power to the contactless IC card.
  • FIGS. 1A and 1B illustrate an example of a communication signal for an A-type interface according to the ISO/IEC 14443. A signal illustrated in FIG. 1A shows a signal transmitted to the contactless IC card from a card reader, and FIG. 1B shows a signal transmitted to the card reader from the contactless IC card. Two kinds of communication signal contacts (A-type or B-type) are described in ISO/IEC 14443.
  • Communications from a card reader to a contactless IC card according to the A-type of ISO/IEC standard adopts an Amplitude Shift Keying (ASK) 100% modulation method and a modified Miller Code method. A signal transmitted from the card reader to the contactless IC card has a bit rate or a data rate of fc/128, i.e., 106 kbps. The transmitted signal from the contactless IC card to the card reader is coded in a Manchester code and demodulated in an On-Off Key (OOK) method. For example, in the subways or buses in Seoul, Korea, the cards using the A-type communication signal contact method generate a timing at a regular time interval from an ASK modulation signal received from the card reader and process data sending/receiving bit by bit.
  • FIG. 2 shows a pause interval of data transmitted to an IC card from a card reader in at least one embodiment of the invention. When data is transmitted from an IC card to a card reader, power supplied from the card reader is stably coupled to the IC card. When data is transmitted from the card reader to the IC card, as shown in FIG. 2, a "pause" t2 interval is included. Hence, there exists a duration of frame wherein a power supplied from the card reader to the IC card is temporarily halted.
  • The text book K. Finkenzeller, RFID-Handbuch, Karl Hanser Verlag, 26.09.2002 discloses in chapter 10 a dual interface card having a CPU which is no more actively operating during a data transmission after initiating the same and which can thus be switched to a power saving mode during the time of the data transmission process.
  • US 2003/0024985 A1 discloses a transponder unit aiming to reduce power consumption during communication intervals by deactivating certain circuits during load periods.
  • It is known to have integrated circuits cards equipped with security-monitoring detector units to detect tampering, see e.g. the text book W. Rankel and W. Effing, Handbuch der Chipkarten, Karl Hanser Verlag, 29.08.2002, chapter 8, in particular the pages 536, 537, 539, 542, and 543. Especially it is mentioned there to have under normal conditions only a few detectors activated in corresponding microcontrollers of the chip cards so as to achieve a long-term operational reliability.
  • It is the technical problem underlying the invention to provide an integrated circuit card which is capable of avoiding at least partly the above mentioned difficulties of the prior art and in particular shows a relatively low power consumption.
  • The invention solves that problem by providing an integrated circuit card having the features of claim 1. Advantageous embodiments of the invention are mentioned in the dependent claims the wording of which is herewith fully incorporated into the description by reference to avoid unnecessary text repetition.
  • Advantageous embodiments of the invention as described below and the conventional communication technic explained above to facilitate the understanding of the invention are shown in the drawings in which:
  • FIGS. 1A and 1B are views illustrating an example of a communication signal for the A-type interface of ISO/IEC 14443;
  • FIG. 2 is a diagram illustrating a pause interval of data transmitted to an IC card from a card reader;
  • FIG. 3 is a block diagram of a circuit configuration of a smart card in accordance with the invention;
  • FIG. 4 is a table illustrating a power control of the circuits equipped in the smart card by the power controller at a communication/non-communication interval in accordance with the embodiment of the invention shown in FIG. 3;
  • FIG. 5 is a block diagram showing configurations of a power controller and a security detection circuit in accordance with the invention;
  • FIG. 6 is a status diagram of a state machine used in accordance with the invention;
  • FIGS. 7 and 8 are timing diagrams showing pulse signals generated from a counter and control signals generated from a control signal generator in accordance with the invention; and
  • FIGS. 9A and 9B are diagrams showing that power is consumed in N detectors in a corresponding embodiment of the invention.
  • Advantageous embodiments of the invention will be described with reference to the appended drawings. In various embodiments of the invention, a smart card or a plastic card with a credit card size having an integrated circuit chip with a capability of processing specific transactions by equipping the smart card with a microprocessor, a card operating system, a security module, a memory and so on is explained as an example, but the invention may be applicable to both different types of integrated circuit cards and electronic devices communicating with the external devices.
  • FIG. 3 is a view showing a circuit configuration of a smart card in accordance with the invention. A smart card 100 is a proximity type contactless IC card which operates pursuant to ISO/IEC 14443 standard. The smart card 100 includes a RF interface 110 connected to a bus 101, a CPU 120, a ROM 130, a RAM 140, an encoder 150, a random number generator 160, a security detection circuit 170 and a power controller 180. Even if not shown in FIG. 3, the smart card 100 may further include an Electrically Erasable and Programmable Read Only Memory (EEPROM) and a Serial Input/Output (SIO) interface and a clock generator.
  • FIG. 4 is a view illustrating a power control of the circuits equipped in the smart card by the power controller in a communication/non-communication interval in accordance with the embodiment shown in FIG. 3. FIG. 4 illustrates that circuits equipped in the smart card 100 control power through the power controller 180 in a communication/non-communication interval in accordance with the embodiment shown in FIG. 3.
  • As described above, when the smart card 100 receives data from an external device, for example, a card reader, power is unstably supplied to the smart card because of an existence of a pause interval. To secure stable operations of the smart card 100, unnecessary power consumption is minimized in a communication interval according to the invention. As is described below, the communication interval refers to an interval for transmitting and receiving data between the card reader and the smart card 100, but may be defined as an interval for transmitting data from the card reader to the smart card 100 including a pause interval.
  • Referring to FIGS. 3 and 4, the power controller 180 sets circuit blocks related to a communication in the communication interval, for example RF interface 110 and RAM 140 in a normal state. The power controller 180 sets circuit blocks not requiring operations out of circuit blocks not related to a communication, for example, a CPU 120, a ROM 130, an encoder 150 and a random number generator 160 as a standby state. The encoder 150 includes a number of gates to perform complicated operations, thus a large amount of current is consumed. In addition, the random number generator 160 consumes a large amount of current because it is designed to operate at a very high speed to generate a random number.
  • The power consumption at the CPU 120, the ROM 130, the encoder 150 and the random number generator 160, which is set in a standby state, approaches to 0, thereby power consumption of the smart card 100 is minimized.
  • In general, to prevent an unauthorized user from infiltrating, the smart card 100 includes a plurality of security detectors. The security detectors should be set in an operational state as long as a power is supplied to the smart card 100. In a corresponding embodiment of the invention, a power controller 180 disables all the security detectors so as to minimize power consumption in a communication interval and sequentially enables them.
  • Referring to FIGS. 3 and 4 again, the power controller 180 sets circuit blocks related to the data processes in the non-communication interval in a normal state. For example, if the data received from the external devices and stored in the RAM 140 is encoded and stored in the RAM 140 again, the CPU 120, the RAM 140 and the encoder 150 are set as a normal state. Circuit blocks which should be always in an operational state but do not affect the operations even if they are temporarily disabled such as a security detection circuit 170 are set in a power saving state. The circuit blocks set in a power saving state are enabled in a sequential manner. If the other circuit blocks except the security detection circuits 170 and the circuit blocks required for the current operations are set in a power saving state, the power consumption in the non-communication interval of the smart card 100 is further decreased.
  • FIG. 5 is a block diagram illustrating configurations of the power controller 180 and the security detection circuit 170 in accordance with the invention. Referring to FIG. 5, the security detection circuit 170 includes five detectors 171 to 175. The power detector 171 detects a level of a voltage supplied from the external devices, for example, a card reader, and outputs a detection signal when the detected voltage is not within a regular range. The frequency detector 172 detects a frequency of a main clock signal and outputs a detection signal when the detected frequency is not within a regular range. The temperature detector 173 detects a temperature around the smart card 100 and outputs a detected signal if the detected temperature is higher or lower than a predetermined range of temperature.
  • The exposure detector 174 outputs a detection signal when a silicon oxide layer used as a protection layer of a chip surface is removed, and the chip is exposed to a light. The metal4 detector 175 outputs a detection signal when an upper metal is a metal4 and is removed. In FIG. 5, only five exemplary detectors 171 to 175 are illustrated, but various detectors for detecting an attack of an intruder or an abnormal state of an operational state can be included in the smart card 100. In addition, the security detection circuit 170 ceases an operation of the smart card 100 when a detection signal is input out of at least one of detectors 171 to 175, and the circuit 170 may further include a controller informing an intrusion by an intruder.
  • The power controller 180 generates control signals DEN1 to DEN5 to enable or disable the detectors 171 to 175 in the security detection circuit 171 including the counter 181 and the control signal generator 182.
  • The counter 181 generates pulse signals EN_END and GD _END with a predetermined time interval, and generates control signals so as to control the counter 181 and the detectors 171 to 175.
  • FIG. 6 is a state diagram of a state machine used in accordance with the invention. FIGS. 7 and 8 are timing diagrams showing signals generated from a counter and control signals generated from a control signal generator in accordance with the invention. The pulse signals generated from the counter 181 and control signals DEN1 to DEN5 generated from the control signal generator 182 are shown in FIGS. 7 and 8.
  • Referring to FIGS. 5 and 6, if the smart card 100 is reset early, the power controller 180 comes into an idle state. If the smart card 100 is stabilized and enters a power saving mode, the power controller 180 is transformed to an idle guard state. At the idle guard state, the power controller 180 deactivates control signals DEN1 to DEN5 to disable all the detectors 171 to 175. If the power controller 180 informs the counter 181 that it is transformed in a guard state, the counter 181 carries out a counting operation, and outputs a guard end pulse GD_LAST if the guard time passes. Next, a state transformation is completed to carry out a power saving mode.
  • Initially, the power controller 180 transforms the power detector 171 to an enable state. The control signal DEN1 for enabling a voltage detector 171 is activated, and other control signals DEN2 to DEN5 are deactivated. The counter 181 starts to count in response to a control of the control signal generator 182, and outputs an enable end pulse EN_LAST if an enable time passes. The power controller 180 transforms the power detector 171 from an enable state to a guard state by the enable end pulse EN_LAST. The counter 181 generates a guard end pulse signal GD_LAST if a guard time passes from a point when an enable end pulse signal EN_LAST occurs. The power controller 180 transforms the frequency detector 172 into a guard state by the guard end pulse GD_LAST. In this process, the power controller 180 is repeatedly transformed from an enable state to a guard state with respect to all the detectors 171 to 175. The guard is a protection interval for preventing a temporary voltage rise from occurring when an enable state with respect to a detector is transformed into another enable state with respect to the next detector.
  • The smart card 100 is thus not directly related to a communication in a communication interval, but sequentially enables circuit blocks which should be in an operational state one by one to minimize power consumption in a communication interval. Thus, stable operations of the smart card cannot be secured in an interval where power supply is unstable.
  • Furthermore, the state machine 183 of the power controller 180 illustrated in FIG. 6 is repeatedly performed when the smart card 100 is in an operational state, and minimizes power consumption in the detectors 171 to 175 in a non-communication interval as well as a communication interval.
  • Control signals shown in FIG. 8 are generated from the power controller 180 if the smart card 100 is temporarily set as a stop mode when the power controller 180 performs a power saving mode.
  • Referring to FIG. 8, when the power controller 180 is in a frequency detector enable state, i.e., when the control signal DEN2 is at an activation state, if a stop mode signal STOP is activated to a high level, the power controller 180 is transformed to a voltage detector guard state to deactivate a control signal DEN2. If the stop mode signal STOP is deactivated into a low level, the power controller 180 is transformed to a frequency detector enable state again.
  • FIGS. 9A and 9B show the power consumption at N detectors in an embodiment of the invention. Assuming that one detector consumes 100µA power, the power consumption at the detectors is N*100µA when N detectors are in an enable state as shown in FIG. 9A. However, a smart card in accordance with the invention sequentially enables N detectors, and the maximum power consumption in the detectors at a specific point is 100 µA. Thus, the power consumption can be reduced to 1/N.
  • In a contactless smart card, the communication range with an external device such as a card reader is inversely proportional to the power consumption of the smart card. Therefore, if power consumption in a smart card is decreased, the communication distance can be increased.
  • If the above described power saving mode is adapted to the other circuit blocks except circuit blocks directly related to a data process in a non-communication interval as well as in a communication interval, power consumption in the smart card can be decreased.
  • In corresponding embodiments of the invention, the power supplied to the detectors in the non-communication interval as well as in the communication interval can thus be reduced by 1/N, and therefore the power consumption in the smart card is decreased.
  • While the invention has been particularly shown and described with reference to an exemplary embodiment thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the scope of the invention as defined by the appended claims.

Claims (19)

  1. A contactless integrated circuit card comprising:
    a plurality of circuit blocks (110-170, 171-175), a part of which are capable to communicate with at least one external device,
    characterized by
    a power controller (180) arranged for applying power in a sequential and non-overlapping manner to each circuit block in a group (171-175) of selected ones of said plurality of circuit blocks in a communication interval, wherein the circuit blocks of said group (171-175) are not related to communication with said at least one external device.
  2. The integrated circuit card of claim 1, wherein the integrated circuit card is a proximity contactless integrated circuit card.
  3. The integrated circuit card of claim 1 or 2, wherein one or more of the other ones of the plurality of circuit blocks are operated in a normal state or a standby state in a communication interval state and/or in a non-communication interval state of the integrated circuit card.
  4. The integrated circuit card of claim 3, wherein circuit blocks related to a communication with the at least one external device are operated in the normal state during a communication interval.
  5. The integrated circuit card of any of claims 1 to 4, wherein for applying power in said sequential and non-overlapping manner the power controller sequentially and non-overlapping enables the corresponding circuit blocks, and disables the respective enabled circuit block after an enable time passes.
  6. The integrated circuit card of claim 5, wherein the power controller enables the next circuit block only after a guard time passes since the enabled circuit block is disabled.
  7. The integrated circuit card of any of claims 2 to 6, wherein the communication interval is an interval for receiving data from the at least one external device.
  8. The integrated circuit card of any of claims 1 to 7, comprising an interface block (110) performing an interface function to the least one external device, and a function block (120 to 170) performing other functions except the interface function, wherein the power controller (180) selectively controls power application to and removal from the interface block (110) and the function block (120 to 170).
  9. The integrated circuit card of claim 8, wherein the function block includes a security detection circuit (170) detecting if an operational environment of the integrated circuit card is in an abnormal state.
  10. The integrated circuit card of claim 9, wherein the security detection circuit includes a plurality of detectors (171 to 175).
  11. The integrated circuit card of claim 9 or 10, wherein the power controller selectively applies power to the plurality of detectors periodically in a sequential and non-overlapping manner.
  12. The integrated circuit card of any of claims 8 to 11, further comprising a data processing block for processing data communicated through the interface block.
  13. The integrated circuit card of claim 12, wherein the power controller selectively controls power from being supplied to the data processing block in a communication interval with the external device.
  14. The integrated circuit card of any of claims 8 to 13, wherein the power controller selectively applies power to non-operational circuit blocks out of the interface block and a plurality of other of the circuit blocks in a non-communication interval with the at least one external device.
  15. The integrated circuit card of any of claims 12 to 14, wherein the power con-troller controls supplying power to the interface block, the data processing block, and the security detection circuit, with the power controller periodi-cally supplying power to the security detection circuit.
  16. The integrated circuit card of any of claims 11 to 15, wherein the power controller activates the supply of power to a selected detector out of the plurality of detectors, and selectively deactivates the supply of power to the selected detector if an enable time lapses.
  17. The integrated circuit card of claim 16, wherein the power controller supplies power to the next detector only after a guard time passes since the time power is not supplied to the selected detector.
  18. The integrated circuit card of claim 17, wherein the power controller includes a counter for counting the enable time and the guard time.
  19. The integrated circuit card of any of claims 12 to 18, wherein the power controller selectively applies power to the data processing block when the interface block communicates with the at least one external device.
EP05022330A 2004-10-20 2005-10-13 Integrated circuit card selective power control Active EP1650696B1 (en)

Applications Claiming Priority (1)

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KR1020040084058A KR101103263B1 (en) 2004-10-20 2004-10-20 Integrated circuit card for reducing power consumption

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CN1763772A (en) 2006-04-26
KR20060034995A (en) 2006-04-26
KR101103263B1 (en) 2012-01-11
US7454633B2 (en) 2008-11-18
DE602005011381D1 (en) 2009-01-15
EP1650696A1 (en) 2006-04-26

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