EP1325564A2 - Method and system for estimating frequency offset and phase rotation correction in cdma systems - Google Patents

Abstract

Methods and apparatus which estimate frequency offset estimation and correction in manner which is suitable in environments which may involve high speeds are provided. The invention provides a frequency offset correction apparatus/method adapted to estimate a frequency offset correction from a despread finger output sequence. The apparatus has a correlation function adapted to perform a correlation between an input sequence which is a function of the despread finger output sequence and a delayed version of the input sequence over an update period to produce a correlation output. Also, the apparatus has an instantaneous frequency offset determining function adapted to determine an instantaneous frequency offset as a function of the correlation output. _

Description

METHOD AND SYSTEM FOR ESTIMATING FREQUENCY OFFSET AND PHASE

ROTATION CORRECTION IN CDMA SYSTEMS

Field of the Invention

The invention relates to methods and systems for estimating frequency offset and phase rotation correction in CDMA systems, for example IS-95 and third generation CDMA systems.

Background of the Invention

In wireless communications systems, if the objects involved in a radio channel are in motion, for example as may be the case for a channel between a cellular mobile terminal and a base station, this motion introduces a time varying Doppler shift on the signals received over the channel which may be observed as a change in the frequency of signals received over the channel. The change in frequency, or Doppler shift, is related to the velocity of the mobile terminal and the angle between the direction of motion of the mobile terminal and the direction of arrival of the signal at the receiver.

If the mobile terminal is moving quickly, for example at the speed of an airplane, the change in frequency, hereinafter frequency offset, may be as high as 1.6 kHz for a mobile terminal moving at 900 km/h and communicating in the 1.9 GHz band. It is an established fact that this frequency shift, if not compensated for, will greatly degrade the overall system performance.

Historically, this has not presented a problem as the use of CDMA devices has not been permitted aboard aircraft, and the problem is not severe at low speeds such as introduced in a moving automobile. However, with the increasing ubiquity of wireless devices and the demand for the availability of constant connectivity, the issue of providing CDMA service aboard aircraft is now becoming real .

There may be other sources of frequency offset between two terminals communicating over a wireless CDMA channel. One example is the situation which exists when the frequency references for the two terminals are not precisely matched. It would be advantageous to be able to provide CDMA services for mobile terminals moving at high speeds in a manner which overcomes the frequency shift introduced by Doppler shift and by other sources of frequency offsets.

Summary of the Invention

Embodiments of the invention provide methods and apparatus which estimate frequency offset correction in a manner which is suitable in environments which may involve high speeds .

In one broad aspect, the invention provides a frequency offset correction apparatus/method adapted to estimate a frequency offset correction from a despread finger output sequence. The apparatus has a correlation function adapted to perform a correlation between an input sequence which is a function of the despread finger output sequence and a delayed version of the input sequence over an update period to produce a correlation output. Also, the apparatus has an instantaneous frequency offset determining function adapted to determine an instantaneous frequency offset as a function of the correlation output.

Decimation/summation can be performed at various points throughout the frequency offset determination, before or after application of the frequency offset correction. In most circumstances, the frequency offset correction will be estimated from a plurality of despread finger output sequences. In direct spreading communications systems, the entities which track and process resolvable ultipath components are commonly known as "Rake fingers" or simply "fingers". In such a context, there is provided a plurality of correlation functions each adapted to perform a respective correlation on respective input signals each of which is a function of a respective one of the plurality of despread finger output sequences to produce a corresponding plurality of correlation outputs, the correlation being performed between the respective input signal and a delayed version of the respective input signal. A combiner combines the plurality of autocorrelation outputs to produce a combined correlation output, and an instantaneous frequency offset determining function determines an instantaneous frequency offset as a function of the combined correlation output.

To eliminate short-term variability in the estimate, the apparatus may further include a low-pass filter adapted to perform low-pass filtering on the instantaneous frequency offset to produce a filtered frequency offset.

In some embodiments, the instantaneous frequency offset determining function is a function substantially mathematically equivalent to a scalar multiplied by an arctangent of the imaginary part of the correlation output over the real part of the correlation output.

In some embodiments ,_. the frequency offset correction is converted to a phase correction output with a numerically controlled oscillator. In some embodiments, a closed loop arrangement is provided wherein the frequency offset correction is fed back and applied prior to the correlation function.

In some embodiments, the input signal is based upon a component which has known content, for example a pilot channel signal. In other embodiments, the input signal is based upon an input with unknown content which must therefore be estimated prior to correlation.

Depending upon what signals are to be corrected, there may be a pilot channel phase rotation correction circuit adapted to apply the phase rotation correction to the pilot channel and/or a DLL (delay locked loop) phase rotation correction circuit adapted to apply the phase rotation correction to a DLL, and/or a finger^' sample phase rotation correction circuit adapted to apply a phase rotation correction circuit to finger data samples, and/or a searcher phase rotation correction circuit adapted to apply a phase rotation correction to a searcher.

Another embodiment of the invention provides a' CDMA receiver adapted to include any of the above summarized functionality.

Brief Description of the Drawings

Figure 1 is a block diagram of a frequency offset correction circuit according to a first embodiment of the invention;

Figure 2 is a block diagram of a frequency offset correction circuit according to a second embodiment of the invention; Figure 3 is a schematic of circuitry using the phase rotation correction output produced by the circuitry of Figure 1 or 2 to apply correction to a pilot channel;

Figure 4 is a schematic of circuitry using the phase rotation correction output produced by the circuitry of Figures 1 or 2 in adjusting timing in a delay lock loop;

Figure 5 is a schematic of circuitry which applies the phase rotation correction output produced by the circuitry of Figure 1 or Figure 2 to correct data symbols;

Figure 6 and 7 are two different implementations of how the phase rotation correction can be applied to a searcher; and

Figure 8 is a schematic diagram of modifications to the circuitry of Figure 1 to accommodate CDMA signals which do not have a pilot channel .

Detailed Description of the Preferred Embodiments

The invention provides systems and methods adapted to compensate for the frequency offset between a mobile terminal and a base station, as well as to compensate for the Doppler frequency shift introduced by high-speed moving airplanes . There are two parts, namely frequency offset estimation and phase rotation correction. The two parts may be implemented separately or together, and in any suitable fashion with appropriate combinations of hardware, software, DSP, ASICs, FPGA, processors etc .

The invention is' applied in the context of receivers for

CDMA signals. Such receivers have searchers which are adapted to be able to track separate multipath components of received signals separately before combining the various multipath components . The searcher is a functional block in all CDMA receivers whose purpose is to detect an access request of a mobile or to search for multipath components over a certain search window. It correlates a received signal with the locally generated PN code defined by the system time for all possible delay offsets specified in the search window. The search results are accumulated over the total correlation interval. The search results are "fingers" to new or existing multipath components . There are two types of search functions: access searcher and traffic searcher. After having successfully completed the forward link synchronization, a mobile terminal enters the cell network by sending a request on a common unlink access channel according to a Slotted ALOHA scheme. An access request contains a preamble made of a un-modulated pilot followed by an encapsulated message. The access searcher function performs the first detection of a user in the cell so as to determine an access request has been made by a mobile. After completing the access searcher function, the network assigns a traffic channel to the mobile. Then the traffic searcher function is performed to search for multipath components over a certain search window so as to maintain the traffic channel which has already been established. A searcher has devices which track each multipath which are referred to as "Rake fingers", or simply "fingers". Each finger produces an early, on-time, and late output for the multipath component it is tracking. The on-time output of each finger is despread using a despreading PN code.

The number of fingers used to receive a given channel is typically determined by the searcher and Finger Assignment algorithms.

For this embodiment, an assumption which is made is that all the finger paths of the same user undergo approximately the same frequency shift and that this frequency shift changes relatively slowly with the time. As a result, a single frequency offset estimate is maintained for all of the fingers of a given user. The estimation period might be selected for example to equal the duration of a CDMA frame which is 20 ms in some systems.

However, it is to be understood that in reality there may be a slight difference in the shift experienced by different finger. In another embodiment, a separate frequency offset is calculated for each finger.

A first embodiment of the invention will be described with reference to Figure 1. In this embodiment, open loop estimation of the frequency offset is performed. The frequency offset algorithm works on pilot signals output by fingers after PN despreading in CDMA receivers. The pilot signal is a component of the received signal which for the most part has known contents at . the receiver. More generally any component with known content could be used. The signal may also contain unknown content such as is the case with the pilot channel which also includes power control information which should be removed. The pilot signal x(n) from one finger can be expressed as follows:

x(n) = c(n) (n)exp(j2πfnT)+ v(n).

In the above equation, c(n) is the transmitted chip sequence, α(n) is a term representative of the channel response (including fading for example) , f is the frequency offset which is to be determined, 1/T is the chip rate, and v(n) is an additive noise component. It is to be understood however that α(n) would be different for each finger/multipath. The frequency offset f includes the component due to Doppler shift, and any other components which might exist due to other sources, such as the frequency offset due to different carrier frequencies between two terminals.. Referring now to Figure 1, in the illustrated example, there are signals 10 from an integral number D of finger despreaders (only two shown) . For each signal 10 received from a finger despreader there is a corresponding FOIE (frequency offset information extraction) block 14 (only two shown) . Each FOIE block 14 is identical and only the details of one of the FOIE blocks are shown. Each signal 10 is of the form of x(n) presented above. While α(n) and v(n) may be different from one finger to the next, the assumption is made for this embodiment that f, the frequency offset, is roughly a constant from one finger to the nex .

An intermediate signal s (n) is produced by a multiplier 16 which multiplies x(n) by c (n) * (the complex conjugate of the nth known PN code chip) as follows :

s(n)= x(n)»c(n )

which, after substituting the above expression for x(n) becomes:

s(n)= (n)exp(j2τφιT) + v(n)c(n )

where the assumption that c (n) c (n) * = 1 has been made for the purpose of simplification.

The FOIE block 14 has an optional summer 19 which performs an accumulation of M samples, for example 128 samples to produce a decimated signal. In the analysis which follows, the case in which no accumulation of samples is performed is considered (i.e. M=l) . Further below, the more general case is presented. A functional block 20 functions to zero any power control symbols in the signal, these being located in predetermined positions. Alternatively, a decoded estimate of the power control symbol can be made in which case correlation can be performed over those symbols as well. Next, the sequence is correlated with a delayed version of itself with correlator block 21. More particularly, samples are fed through a k-sample delay block 22, the conjugated output 24 of which is correlated with the non-delayed sample stream 25 with a multiplier 26. The output of the multiplier 26 is combined in a combiner 28 over a predetermined period (in our example one CDMA frame of 20 ms) which we assume requires a summation over N samples to produce a correlator output r(k) which is output by the correlator block 21. The correlator output r(k) can be expressed as:

r(k) exp(j2πfkT)+ w(k)

where

w v(k) v(n v(n+ k)

In the above expression for r(k), we assume that α(n+k) is approximately equal to (n) . The output r(k) of combiner 28 constitutes the output of the FOIE block 14. More generally, the output of the dth FOIE block will be denoted r^k) . The outputs of all of the FOIE blocks 14 are then coherently combined in a combiner 30 to produce an output labelled "r-₍-₀t (k) " which can be expressed as follows:

The output rt₀t(k) of combiner 30 is fed to an arctan functional block 32 which computes an estimate of the frequency offset according to:

This expression results from solving for f from the expression for ^ot t^.) , assuming that noise components average out to zero over the summing period. Of course, the arctan functional block 32 can be implemented in any suitable way, including but not limited to table look-up, DSP etc.

Λ

The frequency offset estimate / , or a filtered estimate as described below, is used to drive a NCO (Numerically Controlled Oscillator) 36 which in turn generates a phase rotation output 38 at a rate of 76.8 KHz. The complex conjugate of the phase rotation output 38 is used to correct the phase rotation errors in the signals introduced by the frequency offset. More

Λ specifically, a phase rotation output pre ( / ) is generated according to :

pre = exp(-2πJTn)

This phase rotation correction signal can then be used in the demodulation of the remainder of the received signal (i.e. that for which the transmitted sequence is not known) by multiplying it with the received signal as follows : y(n) = x(n).c(n) * exp(-2τ ιT)

The estimated frequency offset can also be applied to the known pilot signal to obtain an estimate of the channel amplitude response α(n) for a given finger. More particularly,

Λ Λ where / is a good estimate of f, and we can assume f - / is approximately zero, we can apply the phase rotation correction signal to the intermediate s (n) to yield:

y(n) »α(n)+ u(n)

where u(n) is a noise component which can be approximated by:

u(n) « v(n)c (n)exp(-j2τιfnT)

which we can assume averages out to zero over the summing period.

In the event summer 19 generates a sum of M>1 samples, for example 128, the math changes slightly. In this case, the input to the remainder of the correlation process may be expressed as follows :

z( n_M ) = ∑ s( n_M M + i) « a(n_MM)Mexp(j2πf _nu M) + q(n_M )

where q(nj,j) can be expressed as:

M-l q( n_M )= ∑V( n_M M Ar i)c( ,iM + i f

;=o

where in both of the above equations njyj_. is a counter for accumulated samples. Then a correlation on these accumulated samples is determined according to:

where now a sum up to N/M produced by combiner 28 includes the same amount of information as the previous autocorrelation. This can be expanded to produce:

M ^{2 NIU} R"(k)= —- ∑\ a(n_M )fexp(j2πfkTM)+ w(k)

N «Λ=l

where in the above w(k) is a noise component. ■

Once again an accumulation over the D fingers is taken to yield an expression

from which an estimate of the frequency offset can be determined according to :

Regardless of whether accumulation at summer 19 occurs

Λ or not, the frequency offset / can be stabilized by passing it through a low-pass filter such as a first order IIR filter 34 which performs smoothing of the frequency offset estimate over time. The first order IIR 34 produces an output F(m+1) according to:

F(m + 1) =(1-λ) F(m) + λf(m) Λ where / (m) is the estimated frequency offset during the mth estimation period, and λ is a parameter of the first order IIR 34. F(m+1) is the filter output which will be used to correct the frequency offset in the next frame. An initial value for F(l) can

A be provided, for example by setting F(l) = / (1) .

Λ

Now, instead of / (m) , this filtered estimate now be removed from the received signal yielding:

y_foc(ⁿ) = y(n)exp(-j2πF(m)nT)

These methods may be used to compensate for frequency offsets between a mobile terminal and a base station, as well as to compensate for the Doppler shift introduced by high speed mobile terminals, for example up to +/- 3 KHz. Practically, compensation can be performed if -π<2πβx kT<π , but performance may degrade as the limits of this range are approached.

In another embodiment of the invention, closed loop estimation of the frequency offset is performed. An example of this is shown in Figure 2. This Figure is similar to Figure 1. The decimation formerly performed in a single step by summer 19 is performed in two stages, a first stage in which an M-fold decimation occurs in summer 19, and a second stage in which a P- fold decimation occurs in summer 50. The product M x P is equivalent to M in Figure 1. As before there is a block 20 which zeros the PC bits, and a correlation function 14 consisting of a delay block 22, multiplier 26 and combiner 28 which performs autocorrelation over one frame (20 ms) . The output of the combiner 28 is the output for that FOIE block 14. As before, the outputs of the FOIE blocks 14 for all the fingers are combined coherently with a combiner 30. A feedback signal 52 is determined using similar computations to those used in Figure 1 to determine the frequency offset estimate, namely with an arctangent function 32, followed by the first order IIR filter 58 which drives an NCO 52. The output 53 of the NCO 52 is used to perform frequency shift correction as in the embodiment of Figure 1. In addition, the complex conjugate of the NCO output is fed back as feedback signal 52 to the FOIE blocks 14 between the two decimation stages 19,50 where it is multiplied by the intermediate signal 54 which exists at that point in the forward processing path.

By multiplying the partially decimated despread pilot signal 54 by the output .52 of the numerically controlled oscillator to correct the phase rotation error introduced by the frequency offset in a system in which the frequency offset is stable, a better estimate of the frequency offset is obtained. An output 56 is taken after the second decimation stage 50 and this is used in channel estimation and PC bit extraction.

The estimated frequency offset which is the output of the low pass filter 34 drives the NCO 52 to generate a phase rotation output at an update rate of 76.8 KHz. Its complex conjugate is used to correct the phase rotation errors in the signals introduced by the frequency offset. Practically, compensation can be performed if -π<2πMP(f - f)kT<π , but performance may degrade as the limits of this range are approached.

As can be seen from Figure 1 and Figure 2 and the above discussion, there are three major differences between the open-loop and the closed-loop estimation algorithms. First, the closed-loop estimation has a feed-back for phase rotation correction, while the open-loop estimation does not. Second, their first order IIR filter structures are slightly different. Thirdly, the first method is restricted in the range of Doppler shift it can effectively correct. In contrast, the second method, assuming there is a good initial estimate, can track any Doppler shift.

The above discussion of Figures 1 and 2 has dealt with the issue of estimating a frequency correction which may be applied to compensate for Doppler shift and frequency shift. Now, with reference to Figures 3 - 7 the manner by which this estimate may be used to perform phase offset correction will be described for the pilot channel and Finger symbols, a delay locked loop (DLL), and for the searcher.

Phase Rotation Correction for the Pilot Channel

The pilot channel is used for channel estimation, forward link fast power control bit extraction, pilot power estimation, frequency offset estimation, lock detector, etc. Figure 3 shows a block diagram for the pilot channel phase rotation correction using the phase rotation correction determined as described previously. The processing performed for each finger is the same and as such will only be described once. The on-time output is multiplied by the PN code using multiplier 61 to despread the pilot channel with the "0"'s Walsh code. The product is then accumulated (decimated) over M(=16) chips in a first accumulator 60. After this first decimation stage, the phase rotation correction factor (output at B) determined using the circuitry of Figure 1 or Figure 2 is applied multiplicatively to the output of the accumulator 60 using multiplier 62. After multiplication by the phase rotation correction factor, the phase corrected signal is then accumulated (decimated) over P(=8) samples in a second accumulator 64 to get a pilot estimate with the length of MP(=128) chips. The accumulated signal thus generated is then output for use in the above discussed channel estimation, forward link fast power control bit extraction, pilot power estimation, frequency offset estimation, lock detector, etc., these functions being indicated generally by 66 in Figure 3.

Phase Rotation Correction for the Delay Locked Loop

The phase rotation correction delay locked loop (DLL) functionality may be implemented as shown in Figure 4. For the purpose of this description, one of the fingers per se is shown generally indicated by 70, having an early output 72, an on-time output 74, and a late output 76 as has become conventional. The phase rotation correction produced by the circuitry of Figure 1 or Figure 2 is indicated by B. Phase rotation correction circuitry for DLL has a processing path 80 which operates on the early output 72, and a processing path 82 which operates on the late output 76. Since these processing paths 80, 82 are identical other than their inputs, processing path 80 will be described by way of example. An accumulator 84 accumulates the early samples coherently over M(=16) chips. Then the phase rotation corrections are performed by multiplying_. the phase rotation correction factor B determined in accordance with Figure 1 or Figure 2 for example by the output of the accumulator 84. After coherent or non-coherent accumulations performed by accumulator 88, the results are output for use in adjusting the timing in the DLL.

Phase Rotation Correction for Data Symbols

The phase rotation correction for finger on-time data symbol may be implemented as shown in Figure 5. The input to the processing of this figure is the on-time output of each of the fingers which is despread by PN code multiplier 91 and Walsh code multiplier 93 and accumulated over the symbol duration in accumulator 95. The accumulated output of each finger is multiplied with a respective multiplier 90 by the phase offset correction factor B.

Phase Rotation Correction for the Searcher

Two methods/implementations for performing phase rotation correction for the searcher are shown in Figure 6 and Figure 7 respectively. The searcher is a functional block in all CDMA receivers whose purpose is to search for a PN code transmitted by a mobile terminal so as to determine that an access request has been made, or so as to maintain a channel which has already been established.

A searcher is shown having an input buffer 100 in which samples are initially collected. The searcher operates on samples collected in the input buffer 100. 384 even samples from the input buffer 100 are fed to a first searching process 102 and more specifically are first fed to a first shift register 104 while 384 odd samples are fed to a second searching process 106 the details of which are not shown but which are identical to the first searching process 102. There is a code generator 110 which generates the PN code for correlation indicated as c(n),n = 1,..,N stored in a buffer 112. The PN code thus generated and stored in buffer 112 is multiplied term by term with the contents of the shift register 104. These are partially accumulated with accumulators 116 after which the phase rotation correction is applied with multipliers 118 as controlled by the NCO. The results are then coherently accumulated in accumulator 120, converted to a real sealer in block 122 and summed over the correlation period in summer 114. Referring now to Figure 7, another option for performing phase rotation correction for the searcher is shown in which the despeading code is multiplied with the phase rotation estimate and the result is then correlated with the received chip rate samples. This modified despreading code is then used in the searcher in an otherwise conventional fashion.

The invention as described is applicable to CDMA systems and to DS spread spectrum systems in general which include a reverse link pilot channel. In the event there is no reverse link pilot channel, for example as in the case with IS-95, then an estimate of the data symbols may be used to perform the frequency offset estimation.

Referring to Figure 1, the functionality inside dotted box 31 is specific to embodiments which have the benefit of a pilot channel. This functionality can be replaced with functionality similar to that shown in Figure 8 in the event there is no such pilot channel. Referring to Figure 8 now, in order to get samples for input to the correlator 21 of Figure 1, input chips (x(n)) are despread with PN code multiplier 140, accumulated over four samples with accumulator 142 (because one IS-95 Walsh chip is four PN chips) . Following this, the phase correction which is output by the entire circuit is multiplicatively applied with multiplier 144. The output of this is then passed to a 64 point fast Hadamard transformer (FHT) 146. A block detector 148 processes the fast Hadamard transformer outputs, and based on block detection results, block 150 selects the appropriate one of the 64 possible detection results and outputs this to the remainder of the frequency offset correction circuitry previously discussed with reference to Figure 1. The block detector 148 may be implemented in accordance with co-pending Application No. 09/216972 filed December 21, 1998 entitled "Block Detection Receiver" assigned to the same assignee as this application and hereby incorporate by reference in its entirety.

Numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.

Claims

WE CLAIM :

1. A frequency offset correction apparatus adapted to estimate a frequency offset correction from a despread finger output sequence, the apparatus comprising:

a correlation function adapted to perform a correlation between an input sequence which is a function of the despread finger output sequence and a delayed version of the input sequence over an update period to produce a correlation output;

an instantaneous frequency offset determining function adapted to determine an instantaneous frequency offset as a function of the correlation output.

2. A frequency offset correction apparatus according to claim 1 further comprising:

a decimation stage adapted to decimate the despread finger output sequence to produce a decimated signal as the input signal .

3. A frequency offset correction apparatus adapted to estimate a frequency offset correction from a plurality of despread finger output sequences, the apparatus comprising:

a plurality of correlation functions adapted to perform a respective correlation on respective input signals each of which is a function of a respective one of the plurality of despread finger output sequences to produce a corresponding plurality of correlation outputs, the correlation being performed between the respective input signal and a delayed version of the respective input signal; a coherent combiner adapted to combine the plurality of autocorrelation outputs to produce a combined correlation output;

an instantaneous frequency offset determining function adapted to determine an instantaneous frequency offset as a function of the combined correlation output.

4. A frequency offset correction apparatus according to claim 3 further comprising:

for each of said plurality of despread finger output sequences, a respective decimation stage adapted to decimate the despread finger output sequence to produce a decimated signal as the respective input signal.

5. A frequency offset correction apparatus according to claim 3 further comprising a low-pass filter adapted to perform lowpass filtering on the instantaneous frequency offset to produce a filtered frequency offset.

6. A frequency offset correction apparatus according to claim 3 wherein the instantaneous frequency offset determining function comprises a function substantially mathematically equivalent to a scalar multiplied by an arctangent of the imaginary part of the correlation output over the real part of the correlation output.

7. A frequency offset correction apparatus according to claim 5 wherein the lowpass filter is a first order IIR filter.

8. A frequency offset correction apparatus according to claim 5 further comprising a numerically controlled .oscillator adapted to convert the frequency offset correction to a phase rotation correction.

9. A frequency offset correction apparatus according to claim 4 wherein:

each decimation stage comprises a respective first decimation stage having a respective intermediate output and a respective second decimation stage having a respective output fed to the respective correlation function;

the frequency offset correction is fed back and applied to each intermediate output .

10. A frequency offset correction apparatus according to claim 1 wherein the input sequence comprises a despread known signal.

11. A frequency offset correction apparatus according to claim 1 wherein the input sequence comprises a pilot signal with power control bits zeroed.

12. A frequency offset correction apparatus according to claim 1 wherein the input sequence comprises an estimate of a data signal.

13. A frequency offset correction apparatus according to claim 12 further comprising input sequence generation circuitry comprising in sequence:

a PN code multiplier;

a summer to sum over Walsh symbol durations;

a multiplier for applying the frequency offset correction;

a fast Hadamard transformer and a block detector adapted to determine the estimate of the data signal by detecting a best output of the fast Hadamard transformer.

14. An apparatus according to claim 3 further comprising:

a NCO (numerically controlled oscillator) adapted to convert the frequency offset to a phase rotation correction;

a pilot channel phase rotation correction circuit adapted to apply the phase rotation correction to the pilot channel .

15. An apparatus according to claim 14 wherein the pilot channel phase rotation correction circuit comprises for each finger despreader, output :

a first summer summing on-time finger outputs , a multiplier adapted to apply the phase rotation correction to an output of the first summer, and a second summer, the first and second summers collectively summing over a period defined for pilot channel estimation.

16. An apparatus according to claim 3 further comprising:

a NCO (numerically controlled oscillator) adapted to convert the frequency offset to a phase rotation correction;

a DLL (delay locked loop) phase rotation correction circuit adapted to apply the phase rotation correction to a DLL.

17. An apparatus according to claim 16 wherein said DLL phase rotation correction circuit comprises: an early processing path adapted to perform a summation of early finger outputs, apply the phase rotation correction, and perform coherent or non-coherent accumulation;

a late processing path adapted to perform a summation of late finger outputs, apply the phase rotation correction, and perform coherent or non-coherent accumulation.

18. An apparatus according to claim 3 further comprising:

a finger sample phase rotation correction circuit adapted to apply a phase rotation correction circuit to finger data samples .

19. An apparatus according to claim 18 wherein said finger sample phase rotation correction circuit comprises:

a multiplier for multiplying the phase rotation correction signal by despread data samples derived from the on time finger outputs.

20. An apparatus according to claim 3 further comprising:

a searcher phase rotation correction circuit adapted to apply a phase rotation correction to a searcher.

21. An apparatus according to claim 20 wherein said searcher phase rotation correction circuit comprises:

circuitry adapted to multiply searcher samples by the PN code, perform a first accumulation, and then apply the phase rotation correction offset, and perform subsequent accumulations over a correlation period.

22. An apparatus according to claim 20 wherein said searcher phase rotation correction circuit comprises: circuitry for applying the phase rotation correction to a PN code prior to multiplying by incoming samples .

23. A CDMA receiver comprising an apparatus according to claim 1.

24. A method of estimating a frequency offset correction from a despread finger output sequence, the method comprising:

performing a correlation between an input sequence which is a function of the despread finger output sequence and a delayed version of the input sequence over an update period to produce a correlation output;

determining an instantaneous frequency offset as a function of the correlation output.

25. A method according to claim 24 further comprising:

decimating the despread finger output sequence to produce a decimated signal as the input signal.

26. A method of estimating a frequency offset correction from a plurality of despread finger output sequences, the method comprising:

performing respective autocorrelation on respective input signals each of which is a function of a respective one of the plurality of despread finger output sequences to produce a corresponding plurality of correlation outputs;

combining the plurality of correlation outputs to produce a combined correlation output;

determining an instantaneous frequency offset as a function of the combined correlation output.

27. A method according to claim 26 further comprising:

for each of said plurality of despread finger output sequences, decimating despread finger output sequence to produce a decimated signal as the respective input signal.

28. A method according to claim 26 further comprising performing a low-pass filtering operation on the instantaneous frequency offset to produce a filtered frequency offset.

29. A method according to claim 26 wherein the frequency offset determining function comprises a function substantially mathematically equivalent to a scalar multiplied by an arctangent of the .imaginary part of the combined correlation output over the real part of the combined correlation output.

30. A method according to claim 26 further comprising converting the frequency offset correction to a phase rotation correction output.

31. A method according to claim 26 further comprising:

performing a first decimation, applying the frequency offset correction, and performing a second decimation the output of which is input to the respective correlation function;

32. A method according to claim 26 wherein the input sequence comprises a despread known signal.

33. A method according to claim 26 wherein the input sequence comprises a pilot signal with power control symbols zeroed.

34. A method according to claim 26 wherein the input sequence comprises a pilot signal with power control symbols estimated.

35. A method according to claim 26 wherein the input sequence comprises an estimate of a data signal.

36. A method according to claim 35 further comprising generating the input sequence by:

performing a PN code multiplication;

summing over Walsh symbol durations;

multiplying by the frequency offset correction;

performing a data symbol detection, the input sequence being set to equal an output produced by the data symbol detection.

37. A method according to claim 36 wherein performing a data symbol detection comprises performing a fast Hadamard transformation followed by block detection to select a best output of the fast Hadamard transformer.

38. A method according to claim 36 further comprising converting the frequency offset to a phase rotation correction.

39. A method according to claim 36 further comprising applying the phase rotation correction to a pilot channel.

40. A method according to claim 36 further comprising applying the phase rotation correction to a DLL.

41. A method according to claim 36 further comprising applying the phase rotation correction to a searcher.

42. A method according to claim 36 further comprising applying the phase rotation correction to finger data samples