EP0348414A1 - Transmission and reception of data - Google Patents

Transmission and reception of data

Info

Publication number
EP0348414A1
EP0348414A1 EP88902079A EP88902079A EP0348414A1 EP 0348414 A1 EP0348414 A1 EP 0348414A1 EP 88902079 A EP88902079 A EP 88902079A EP 88902079 A EP88902079 A EP 88902079A EP 0348414 A1 EP0348414 A1 EP 0348414A1
Authority
EP
European Patent Office
Prior art keywords
code
transmitter
receiver system
transmission
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP88902079A
Other languages
German (de)
French (fr)
Other versions
EP0348414A4 (en
Inventor
Simon Leivenzon
Raymond Russel Hawkins
Christopher J. Mason
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZEENG Pauline
Original Assignee
ZEENG Pauline
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZEENG Pauline filed Critical ZEENG Pauline
Publication of EP0348414A1 publication Critical patent/EP0348414A1/en
Publication of EP0348414A4 publication Critical patent/EP0348414A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/18—Service support devices; Network management devices
    • H04W88/185—Selective call encoders for paging networks, e.g. paging centre devices
    • H04W88/187—Selective call encoders for paging networks, e.g. paging centre devices using digital or pulse address codes
    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C19/00—Electric signal transmission systems
    • G08C19/16—Electric signal transmission systems in which transmission is by pulses
    • G08C19/28—Electric signal transmission systems in which transmission is by pulses using pulse code

Definitions

  • This invention relates to transmission and reception of data and relates particularly, but not exclusively, to apparatus for use in radio controlled garage door systems, radio controlled security systems, radio controlled paging systems and other like radio controlled systems.
  • the transmission can be by using electrical signals, electromagnetic signals, acoustic signals, pneumatic or hydraulic signals or mechanical signals and all are to be considered within the scope of the invention. Description of Prior Art
  • a multiple number of transmitters can be matched or correlated to a single receiver and individual recognition given to different ones of the transmitters used. This is usually achieved by having a plurality of different codes obtained by different DIP switch groups at the receiver. In the paging arts there is usually only one transmitter and many receivers and the configuration is such that particular receivers can identify a signal intended therefrom and disregard signals for other receivers. This matching or correlation of transmitters to receivers and receivers to transmitters is similarly provided by the use of DIP switches to generate codes in the transmitter signal which are subsequently matched or correlated and recognized by the respective receiver.
  • DIP switches Selection of the appropriate coding by use of DIP switches is regarded as not being particularly secure and moreover is troublesome in use.
  • DIP switches When DIP switches are employed it is possible for a person intending to break security to open the back of a transmitter or receiver and note the physical configuration of the DIP switches. By having a corresponding transmitter or receiver it is possible to adjust the DIP switches so that they match. This, in turn, allows for unintended matching or correlation of transmitters and receivers. Hitherto, it has been necessary, when manufacturing a transmitter system, to provide dedicated circuit components in the transmitter for providing the necessary codes to the transmitted signal. In the receiver system it* has been necessary to provide further dedicated code matching or correlation circuitry.
  • a pulse output is where the output changes state only for a predetermined time.
  • a toggle output is where the output state changes and stays in that stated until next changed.
  • a hold output is where the state changes to that in a received state, and where it is held until next changed.
  • a flash output is where the output changes state at a controlled rate.
  • a control circuit for use in either a transmitter system to permit communication of the status of one or more input port of said control circuit to a receiver system, or with a receiver system to permit data information signals received from a transmitter system transmitting such signals to one or more output port, where the one or more output port will have desired output characteristics
  • said control circuit comprising a central processing unit and a memory means therefor, said memory means being programmable, in the case of use with a transmitter system, to store communication parameters so thai ⁇ during a transmission communication parameters will be supplied to the transmitter system with data representative of the status of said one or more input port, and in the case of use with a receiver system, to store communication parameters and desired output port characteristics of said one or more output port, so that upon reception, any communication parameters
  • a transmitter receiver system combination where identification of codes in a received transmission is to be made before data can be passed at the receiver system
  • said transmitter system comprising code generating means for providing code signals to a transmitted signal, said receiver system having memory means for storing a code of a transmission to be received, comparing means for comparing a received code with the stored code and processing means for permitting data in said transmission to be acted upon if there is a code match or correlation, said code generating means having a user activatable random automatic generating means which can be activated to provide a user generated code, memory means for storing the code generated and for transmitting that code in any transmission, said receiver system having means activatable to permit said memory means to record the code in a received transmission.
  • a transmitter receiver system combination where identification of code in a received transmission is to be made before data therein can be acted upon at the receiver system, said transmitter system providing code signals to a transmitted signal, said receiver system having memory means for storing part of a code of a transmission to be received, comparing ' means for comparing a received code with a stored code and means for permitting data in said transmission to be acted on if there is a code match or correlation, said transmitter system having at least two separate sub codes provided in said code in a transmission, at least one sub code of which is useable to define a characteristic of the transmitter system (Mfg code) whilst the other sub code is a code to identify the transmitter system.
  • Mfg code characteristic of the transmitter system
  • FIG. 2 is a block schematic diagram of a typical transmitter system
  • Figure 3 is a block circuit diagram of a typical receiver system
  • Figure 4 is a block circuit diagram of a typical programming circuit for use with a personal computer for programming a memory device in the control circuit
  • Figure 5 is a programming menu displayed on a personal computer screen for programming a memory device which is within the control circuit;
  • Figure 6 is a view of a pin configuration of an integrated circuit used; and Figure 7 is a listing of mask options for an integrated circuit. Detailed Description of Preferred Embodiments
  • the control circuit which is described can be connected with either a transmitter system or a receiver system or alternatively it can be connected to control both a transmitter system and a receiver system so that DUPLEX transmission and reception can occur.
  • the control circuit is such that it permits the status of input ports at the transmitter system to be transmitted to the receiver system where the status of those ports can be applied to output ports on the receiver system. How the status at the output ports is interpreted is entirely up to a user's discretion. For example, the status at the output ports can be used to provide alarms or to cause certain events to occur. In a door operator environment, it can cause a door to be opened or closed. In a paging environment it can cause a paging signal to be announced.
  • the control circuit has code generating means and code recognition means so that in the case of a transmitter system , appropriate codes can be provided in the transmission for identification by a receiver system.
  • the code recognition means permits only signals from a transmitter system matched or correlated to it, to be identified and processed.
  • Several sub codes are provided and some of these are fixed and cannot be adjusted by a user whereas at least one sub code can be adjusted by a user. This will give the user security or unique identification.
  • the code which provides the unique identification is termed "a unique code" and is provided either by a fixed code which can be set at a factory where the control circuit is manu actured, or it can be replaced with a user generated unique code.
  • the factory code is still stored and can be recalled.
  • the user generated code is provided by a psuedo random number generator at the transmitter system and the code is obtained by the time or duration of operation of a code switch at the transmitter system.
  • the transmitter system can be controlled by the control circuit to either transmit code in a burst mode or a continuous mode.
  • a continuous mode is where a transmission continues for the time that a transmit button or switch is operated.
  • a burst mode is where a burst of code signals can be repeated for a preset number of times following activation of the transmit button.
  • the burst mode is typically useful for personal security devices in elderly person's homes because it can provide a burst of say six repeated code transmissions even through the transmit button has been pressed or operated only once and released prior to the transmission being completed.
  • the receiver system is able to be configured by the control circuit to provide outputs, upon matching or correlating various codes in a transmission with those which are memorized at the receiver system, which will either be high or low output signals.
  • This permits the transmitter system to interface with particular ' equipment without the requirement for intervening or intermediate electronic circuit components to provide the required signals.
  • the transmitter system can be provided to give a high output signal upon receipt of code matching or correlation so that the outputs can drive LEDs or relays or other devices. Alternatively, the output can be made to go low to drive appropriate devices.
  • the control circuit can configure the outputs to either a pulse output, a toggle output, a hold output or a flash output. Each one of the output ports of the receiver system can be individually programmed to provide any one of these characteristics .
  • FIG. 1 there is shown a break-down of the transmitted signal from a transmitter system to a receiver system showing how 80 bits therein are broken up to provide discrete sections of a transmitted signal.
  • the transmitted signal is sent at 1200 baud, 8 data bits, no parity and 1 stop bit. The same format is used for inputs to the receiver system.
  • the transmission consists of the following code which has sub codes therein as follows:- 1. PREAMBLE;
  • These 24 data bits are used to initialize the receiver system and comprise a sequence which is AAFF95 (101010101111111110010101).
  • the receiver system when receiving a transmitted signal looks for the alternate Is and 0s followed by at least 7 consecutive Is after which the receiver system timing is synchronised with the "95" byte, which functions like a start bit for a UART.
  • the check word is an 8 bit word formed by adding together all of the data in the subsequent fields .
  • the receiver system records the check word as it arrives and calculates its own check word from the data. At the end of reception the two check sums are compared to determine if an error has occurred during transmission.
  • the control circuit is such that it will only take action to provide the required outputs at the output ports if the check sums compare.
  • the processor does no clear carry except on the last time through the loop and this influences any code generated.
  • a special code can be used to distinguish between a hand held transmitter system used in a motor vehicle and a transmitter system which is mounted at a remote location within a house. It can also be used to permit different interpretations of the data for other devices connected to receiver system and transmitter system which do not generate the same format and work with the same formatted signals.
  • the control circuit When the control circuit is fitted in a transmitter system these 8 bits are read from the 8 input ports . They represent the inputs to the transmitter system which are to conveyed to the receiver system. As a receiver system, they are the bytes that will be used to update the output status of the output ports. It should be noted that the ports are bi-directional and can be used as output and input ports concurrently. This has particular significance if the control circuit is connected with both a transmitter system and a receiver system as it can permit DUPLEX transmission and reception in either a broadcast mode or poll mode. In the transmit mode the ports have to be complemented (have high outputs) but in a receiver mode they can be either high or low outputs, i.e. complemented or high. This permits the control circuit to be interfaced with any desired devices that should require power ON or power OFF to change their states.
  • This code comprises 24 bits and can be either a factory determined code, i.e. one which is provided at the factory where the control circuit is manufactured and/or it can comprise an automatic user generated code in the transmitter system. Pin states at power ON determine which one of the factory code or the user generated code are inserted.
  • the user generated code is obtained by a psuedo random number generator using a seed, either the last random code or a stored number.
  • the receiver system is caused to compare the transmitted code and the manufacturing code with values obtained from a memory means to verify that the transmission signals contains all the relevant data.
  • This code comprises 7 bits and permits a large number of different manufacturing codes to be provided by appropriate selection of the bits being either high or low.
  • the code is programmed identically into each part used by any one particular manufacturer or one particular user environment such as a garage door operator or a paging device or a security device. This code enables the transmitter/receiver system combinations for different manufacturers and/or different environments of use of the transmitter/receiver system to-not be subject to cross-communication between the systems.
  • the manufacturer's code is a fixed code which is programmed at a factory prior to despatch of the control circuit.
  • FIG. 2 and 3 there is shown a block schematic diagram of a transmitter system and a block schematic diagram of a receiver system respectively using a National Semiconductors COPS central processing device 1 type COP426C - known as FDl - and an EEPROM memory device 3 type NMC9306.
  • the EEPROM device 3 is programmed to control FDl to provide either transmission of the desired code or reception and decoding of the desired code.
  • a transmitter system 5 of conventional form is arranged to process data and code from the FDl device 1. It is noted that there is provided a transmitter switch 7 and a code switch 9 in the transmitter circuit. In the receiver system there is provided a receiver circuit 8.
  • a code switch 9 is provided in the receiver system circuit .to enable codes to be recorded in EEPROM device 3 therein.
  • FDl device 1 is a mask programmed micro-controller which provides remote control for one of up to eight possible devices which can each operate in the environment shown and be recognized as matched or correlated devices . This is obtained by appropriate strapping of terminals L Mon - L 7 of FDl device 1 in the transmitter system.
  • the FDl device 1 is used with the EEPROM 3 which contains a configuration word and a unique identifying number which is transmitted with each command. The configuration word controls whether the FDl device 1 is a transmitter system, a receiver system, in either DUPLEX mode or SIMPLEX mode, and whether the transmitter sends a burst of code or continuous code.
  • a burst of code is meant that a code is repeated say only six times as distinct from being- repeated over and over as in continuous mode.
  • the initial contents of the configured word and unique code are programmed into the EEPROM at production from a computer using standard 1200 baud RS232 interface.
  • the pin configuration of FDl is shown in Figure 6.
  • the mask options for the FDl are shown in Figure 7.
  • Factory Programming of EEPROM Factory programming of the EEPROM 3 is achieved by connecting the Serial IN and Serial OUT pins to the serial port of a personal computer via a required level converter circuit.
  • a program connector 11 is shown in Figures 2 and 3 for this purpose and this is connected via a programming circuit shown in Figure 4, to the personal computer.
  • the personal computer controls links between SI and SO and across a code switch 9 to enable programming mode. All communication is at 1200 ba d, 8 data bits, no parity and one stop bit.
  • the DUMP commands sends 32 bytes of data from the NMC9306 EEPROM to the personal computer.
  • the LOAD command expects 32 bytes of data to write to the EEPROM. After every second byte, a 25 millisecond delay is required to allow for the programming time of the EEPROM. After executing a LOAD, a DUMP should be executed to verify the data.
  • the programming sequence under control of the personal computer is:
  • the EEPROM contains 32 bytes allocated as shown in the.following sub-sections.
  • bit 1 burst transmission, as defined by bits 4-7 of byte 2.
  • bit 1 POWER.
  • D2 is high whenever transmitting.
  • bits 2 & 3 COMMAND. Used to identify the type of transmitting device, bit 4 : COMPLEMENT.
  • each bit of byte 3, and the corresponding bit of byte 4 determine the kind of output generated at one of the port output pins when a valid command with a one in the corresponding bit position is received. Note that the bit order is reversed so that bit 0 of bytes 3 and 4 controls bit 7 of the port.
  • bit 7 1 in transmitters.
  • FIG. 5 there is shown a screen which is displayed on a personal computer used when programming the EEPROM device 3.
  • Figure 7 is basically self-explanatory and shows the various options possible to program ' the EEPROM memory device 3.
  • the left hand side has a vertical column representing the function which is to be controlled.
  • the first item is Programme Control.
  • the options available are either to burn the EEPROM and/or to exit.
  • the programming functions do not start at program control, but rather at the next - "ROW MANUFACTURING CODE". It can be seen that the input value can be from any value between 0 and 127.
  • the "FACTORY CODE” is the next row and can be from any value between 0 and 16777215.
  • the next row is "MODE” where the EEPROM memory device 3 is programmed to co-operate with either a transmitter system or a receiver system or for DUPLEX operation in a broadcast mode or a poll mode.
  • the next row is for "POWER CONTROLS" and the options are EEPROM or carrier.
  • the next row is for "COMMAND" where either a 0, a l, a 2 or a 3 r giving four possible options, are provided. This option corresponds to the command code in the transmitted signal. Such enables four different input device recognition capabilities to be provided so that it is possible during use to distinguish from where a received signal is coming from, i.e. from which transmitting system device.
  • the next row is the "DATA". The options are true or complemented. In a transmit mode the ports L Q - L-- have to be complemented (high outputs). In a receiver the ports can be either high or low (complemented or high outputs). The next row is
  • the "TRANSMISSION TYPE” and the options are continuous or burst. In the continuous mode a transmission continues as long as a transmit button is operated. In the burst mode a transmission will continue for a selected number of blocks of bursts as determined in the next row options. These will continue even though the transmit button may be been released.
  • the "BURST BLOCKS” row sets the number of times that the transmission is to be repeated.
  • the next row is the "RECEIVER TIMEOUT” and it can be seen that a timeout option of from 0.5 to 2 seconds can be obtained. This sets the time that the receiver system times out and in which it cannot receive a further incoming transmission.
  • the next series of rows represent the output ports L Q - I,- but are displayed only when the EEPROM memory device 3 is programmed to be a receiver. It can be seen that up to eight of the ports can each be separately programmed to pulse, toggle, hold or flash.
  • the computer When the options have been selected the computer is returned to the first row so that the EEPROM can be burnt in accordance with the programming which has been set or alternatively the programming can be exited.
  • the EEPROM memory device When the EEPROM memory device is burnt, the EEPROM data is displayed in the "VERIFIED ROW", and the configuration word representative of the data is displayed in the "CONFIGURATION WORD" row. This can be recorded for record purposes if required.
  • the FDl When power is applied the FDl will send a code sequence on the G_ (Serial OUT pin). If the BURST bit is set in the configuration word, the sequence will be sent the number of times specified in the configuration word, otherwise continuously. Data is sent at 1200 baud, 8 data bits, no parity and one stop bit. The data will be complemented if specified in the configuration word. This allows use of strapping connected to ground L_ - L 7 . The inputs have pullup resistors on the chip. The L port will be driven low at power on until the program outputs all highs to enable the low current pullups. No device capable of sourcing current should be connected to the L port. Inputs should be driven from switches or open collector drivers to ground only. ⁇ .
  • the sequence will comprise:
  • An initial random number can be loaded in the factory using the LOAD command and this will be used as a seed in the psuedo random number generator. 5
  • the receiver system When the receiver system receives a signal it checks for a preamble code. It then reads a complete code sequence and tries to validate it. Validation comprises first comparing the codes with the check word 0 and then the unique code with each of seven codes which may be stored in the receiver EEPROM and represent seven different transmitter systems which can be correlated to the receiver system. It is extremely unlikely that the receiver system will validate a wrong or corrupted code. 5 Part of the transmission is a check word which is calculated from all the data and 32 bits of ID codes. The receiver system calculates a check word based on the data and ID codes that it receives and compares it with the check word received. The codes received are not validated unless the check words match.
  • the outputs L ⁇ to L 7 are set according to the mode set in the EEPROM. If desired the outputs L» to L-, can be sent to a line decoder so that up to 356 channels can be recognised. To implement any of these channels, appropriate combinations of L_ to L-, need to be suitably strapped. If during a continuous transmission some of the data bits change then the corresponding outputs will change also. The updated output status will be complemented if specified in the configuration word. In some applications (e.g. toggle mode) it is important that the output turns on only once during a transmission and does not pulse up and down if reception is poor or interference is high. To prevent this, the receiver system samples data five times during each bit of the data and uses the average value.
  • Transient noise is unlikely to coincide with three or more of the five samples and corrupt the average.
  • a valid code condition is set in the program for a period set by the selected timeout value in the EEPROM 3, 0.5 to 2 seconds. If invalid or corrupted code is received during this timeout period the outputs will not change. To maintain steady outputs it is only necessary to receive about 1 in 8 codes depending on the timeout value .
  • the code switch 9 is down at power on, all 7 possible codes in the EEPROM 3 are cleared and new codes may be added as described below. If the code switch 9 is pressed whilst the receiver system is running, new codes can be added to the EEPROM without clearing the old ones. If the EEPROM 3 is full (7 codes) no new codes will be added and no old ones lost.
  • the receiver system is connected to the G, pin of FDl and the transmitter system to the G 2 pin of FDl.
  • the FDl can be programmed to work both in a transmitter system and in a receiver system. It must be configured for burst mode and complemented data so that the inactive output state is high, the same as the pullups on the inputs.
  • the 8, 10 pins can be used independently as inputs and outputs and connected to a respective receiver system and a transmitter system. If an output is active (low) it will be momentarily pulsed high (pullup state) to read the shared input.
  • a pin can have a switch to ground and a LED driver connected to it. Although the LED drive will be pulsing off to read the switch it is so fast as not to be visible. Care should be taken when driving logic. The LED will be turned on whenever the switch is on due to the common pin connection.
  • the transmitter system will send a burst at power on, whenever any input state changes and as an acknowledgement after a valid code is received.
  • the code switch functions are the same as the transmitter mode.
  • the receiver will update the output port whenever a valid code is received in the same manner as received mode except that only the selected unique code (factory or random) is used in the code comparison.
  • the receiver mode code switch functions are not used.
  • the functions are the same as broadcast mode except that polling is only initiated on reception of a valid code by the receiver.
  • This mode is best suited to a private link network such as Bi-Line power line link (see National Semiconductor Bi-Line devices) where a master controller can poll each duplex slave for its status and update its output port as desired. Due to the regular polling it uses too much bandwidth for an RF link but does not suffer from the possibility of a collision or interference from obscuring a status broadcast.
  • the same integrated circuit components can be employed both in a transmitter system and a receiver system and/or that a single integrated circuit components can be employed in a receiver/transmitter system for DUPLEX operation and suitably programmed by a factory as to the intended end use.

Abstract

Le circuit de commande décrit (1, 3) est destiné à être utilisé soit dans un système émetteur (Fig. 2) permettant de communiquer à un système récepteur l'état d'un ou de plusieurs points d'entrée (L0-L7) dudit circuit de commande (1, 3) soit avec un système récepteur (Fig. 3) permettant la transmission vers un ou plusieurs points de sortie (L0-L7) de signaux d'information de données provenant d'un système émetteur, le ou les points de sortie présentant les caractéristiques de sortie désirées. Le circuit de commande (1, 3) comprend un processeur central (1) et une mémoire (3) pour ledit processeur, mémoire qui est programmable dans le cas d'une utilisation avec un système émetteur, pour stocker des paramètres de communication qui en mode d'émission seront acheminés vers le système émetteur avec des données représentatives de l'état dudit ou desdits points d'entrée (L0-L7) et, dans le cas d'une utilisation avec un système récepteur, pour stocker des paramètres de communication et les caractéristiques désirées du ou desdits points de sortie (L0-L7) de sorte que, en mode de réception, tous les paramètres de communication reçus seront vérifiés et comparés avec les paramètres de communication stockés et, si une correspondance ou une corrélation est établie, ledit ou lesdits points de sortie (L0-L7) fourniront des informations de données émises dans les caractéristiques de points de sortie désirées. La transmission utilise des codes et un système récepteur peut être mis en correspondance ou en corrélation avec un système émetteur par stockage des codes demandés dans une mémoire (3) du système émetteur. Les codes comprennent un code fixe et un code modifiable par l'utilisateur qui sert à identifier un système émetteur particulier.The control circuit described (1, 3) is intended to be used either in a transmitting system (Fig. 2) making it possible to communicate to a receiving system the state of one or more entry points (L0-L7) of said control circuit (1, 3) either with a receiving system (Fig. 3) allowing the transmission to one or more output points (L0-L7) of data information signals from a transmitting system, the or exit points with the desired exit characteristics. The control circuit (1, 3) comprises a central processor (1) and a memory (3) for said processor, memory which is programmable in the case of use with a transmitter system, for storing communication parameters which transmission mode will be routed to the transmitting system with data representative of the state of said entry point (s) (L0-L7) and, in the case of use with a receiving system, to store communication parameters and the desired characteristics of said one or more exit points (L0-L7) so that, in reception mode, all received communication parameters will be checked and compared with the stored communication parameters and, if a match or correlation is established , said one or more exit points (L0-L7) will provide data information transmitted in the desired exit point characteristics. The transmission uses codes and a receiver system can be matched or correlated with a transmitter system by storing the requested codes in a memory (3) of the transmitter system. The codes include a fixed code and a user-modifiable code used to identify a particular transmitting system.

Description

TRANSMISSION AND RECEPTION OF DATA Field of the Invention
This invention relates to transmission and reception of data and relates particularly, but not exclusively, to apparatus for use in radio controlled garage door systems, radio controlled security systems, radio controlled paging systems and other like radio controlled systems. The transmission can be by using electrical signals, electromagnetic signals, acoustic signals, pneumatic or hydraulic signals or mechanical signals and all are to be considered within the scope of the invention. Description of Prior Art
Hitherto, in the- art of radio controlled transmitter/receiver combinations it has been necessary to match or correlate code in a transmission from a particular transmitter to a particular receiver so that the receiver can acknowledge signals transmitted from a matched transmitter. This requirement is necessary because of the limited frequency bandwidth allowed by government authorities for use of such equipment. The numbers of such equipment used far out-weigh the total bandwidth provided in order that selected groupings of transmitters and receivers can be obtained. In the prior art, a transmitter and a receiver have been matched or correlated by having codes transmitted in the transmitted signal and identified in the received signal. Typically the matching or correlation is obtained by use of multiple switches known as DIP switches wherein each switch therein is user selectable to be either ON or OFF thus providing a digital code across all the switches . A transmitter has a set of DIP switches and a receiver has a corresponding set of DIP switches. The DIP switches are matched or correlated so that the code transmitted will be equal to the code provided at the receiver.
If desired, a multiple number of transmitters can be matched or correlated to a single receiver and individual recognition given to different ones of the transmitters used. This is usually achieved by having a plurality of different codes obtained by different DIP switch groups at the receiver. In the paging arts there is usually only one transmitter and many receivers and the configuration is such that particular receivers can identify a signal intended therefrom and disregard signals for other receivers. This matching or correlation of transmitters to receivers and receivers to transmitters is similarly provided by the use of DIP switches to generate codes in the transmitter signal which are subsequently matched or correlated and recognized by the respective receiver.
Selection of the appropriate coding by use of DIP switches is regarded as not being particularly secure and moreover is troublesome in use. When DIP switches are employed it is possible for a person intending to break security to open the back of a transmitter or receiver and note the physical configuration of the DIP switches. By having a corresponding transmitter or receiver it is possible to adjust the DIP switches so that they match. This, in turn, allows for unintended matching or correlation of transmitters and receivers. Hitherto, it has been necessary, when manufacturing a transmitter system, to provide dedicated circuit components in the transmitter for providing the necessary codes to the transmitted signal. In the receiver system it* has been necessary to provide further dedicated code matching or correlation circuitry. In addition it has been necessary to provide further circuitry so that the outputs from the receiver system can be appropriately generated for driving indicators , alarms or other devices attached to the receiver system which act in response to the transmitted signal from the transmitter system. In this connection some devices require outputs which are digitally high and others require outputs which are digitally low. Usually appropriate transistor types are employed to convert the signals to the required output. In addition some outputs are required to provide a pulse output or a toggle output or a hold output or a flash output.
A pulse output is where the output changes state only for a predetermined time.
A toggle output is where the output state changes and stays in that stated until next changed. A hold output is where the state changes to that in a received state, and where it is held until next changed.
A flash output is where the output changes state at a controlled rate. These terms are to be given the above meaning for the purposes of this specification.
Again specific dedicated components are required to enable the necessary outputs to be achieved.
Objects and Statement of Invention Accordingly it is an object of the present invention to provide a device in the form of a control circuit or a transmitter/receiver system combination which will reduce at least one or more of the aforementioned problems. In accordance with a first inventive concept there is provided a control circuit for use in either a transmitter system to permit communication of the status of one or more input port of said control circuit to a receiver system, or with a receiver system to permit data information signals received from a transmitter system transmitting such signals to one or more output port, where the one or more output port will have desired output characteristics, said control circuit comprising a central processing unit and a memory means therefor, said memory means being programmable, in the case of use with a transmitter system, to store communication parameters so thaiπ during a transmission communication parameters will be supplied to the transmitter system with data representative of the status of said one or more input port, and in the case of use with a receiver system, to store communication parameters and desired output port characteristics of said one or more output port, so that upon reception, any communication parameters received will be checked with the communication parameters stored and if a match or correlation is made, said at least one output port will provide transmitted data information in the desired output port characteristic.
In accordance with a further aspect there is provided a transmitter receiver system combination where identification of codes in a received transmission is to be made before data can be passed at the receiver system, said transmitter system comprising code generating means for providing code signals to a transmitted signal, said receiver system having memory means for storing a code of a transmission to be received, comparing means for comparing a received code with the stored code and processing means for permitting data in said transmission to be acted upon if there is a code match or correlation, said code generating means having a user activatable random automatic generating means which can be activated to provide a user generated code, memory means for storing the code generated and for transmitting that code in any transmission, said receiver system having means activatable to permit said memory means to record the code in a received transmission. In accordance with a further aspect there is provided a transmitter receiver system combination where identification of code in a received transmission is to be made before data therein can be acted upon at the receiver system, said transmitter system providing code signals to a transmitted signal, said receiver system having memory means for storing part of a code of a transmission to be received, comparing 'means for comparing a received code with a stored code and means for permitting data in said transmission to be acted on if there is a code match or correlation, said transmitter system having at least two separate sub codes provided in said code in a transmission, at least one sub code of which is useable to define a characteristic of the transmitter system (Mfg code) whilst the other sub code is a code to identify the transmitter system.
Brief Description of the Drawings
In order that the present invention can be more clearly ascertained, reference will now be made to the accompanying drawings which depict a control circuit in a transmitter/receiver system wherein: Figure 1 is a break-down of the transmitted data sequence in a preferred embodiment;
Figure 2 is a block schematic diagram of a typical transmitter system;
Figure 3 is a block circuit diagram of a typical receiver system;
Figure 4 is a block circuit diagram of a typical programming circuit for use with a personal computer for programming a memory device in the control circuit; Figure 5 is a programming menu displayed on a personal computer screen for programming a memory device which is within the control circuit;
Figure 6 is a view of a pin configuration of an integrated circuit used; and Figure 7 is a listing of mask options for an integrated circuit. Detailed Description of Preferred Embodiments
The control circuit which is described can be connected with either a transmitter system or a receiver system or alternatively it can be connected to control both a transmitter system and a receiver system so that DUPLEX transmission and reception can occur.
The control circuit is such that it permits the status of input ports at the transmitter system to be transmitted to the receiver system where the status of those ports can be applied to output ports on the receiver system. How the status at the output ports is interpreted is entirely up to a user's discretion. For example, the status at the output ports can be used to provide alarms or to cause certain events to occur. In a door operator environment, it can cause a door to be opened or closed. In a paging environment it can cause a paging signal to be announced.
The control circuit has code generating means and code recognition means so that in the case of a transmitter system , appropriate codes can be provided in the transmission for identification by a receiver system. In the case of a receiver system, the code recognition means permits only signals from a transmitter system matched or correlated to it, to be identified and processed. Several sub codes are provided and some of these are fixed and cannot be adjusted by a user whereas at least one sub code can be adjusted by a user. This will give the user security or unique identification. The code which provides the unique identification is termed "a unique code" and is provided either by a fixed code which can be set at a factory where the control circuit is manu actured, or it can be replaced with a user generated unique code. When the user generates the unique code, the factory code is still stored and can be recalled. The user generated code is provided by a psuedo random number generator at the transmitter system and the code is obtained by the time or duration of operation of a code switch at the transmitter system.
~ The transmitter system can be controlled by the control circuit to either transmit code in a burst mode or a continuous mode. A continuous mode is where a transmission continues for the time that a transmit button or switch is operated. A burst mode is where a burst of code signals can be repeated for a preset number of times following activation of the transmit button.
The burst mode is typically useful for personal security devices in elderly person's homes because it can provide a burst of say six repeated code transmissions even through the transmit button has been pressed or operated only once and released prior to the transmission being completed.
The receiver system is able to be configured by the control circuit to provide outputs, upon matching or correlating various codes in a transmission with those which are memorized at the receiver system, which will either be high or low output signals. This permits the transmitter system to interface with particular 'equipment without the requirement for intervening or intermediate electronic circuit components to provide the required signals. For example, the transmitter system can be provided to give a high output signal upon receipt of code matching or correlation so that the outputs can drive LEDs or relays or other devices. Alternatively, the output can be made to go low to drive appropriate devices. In addition, the control circuit can configure the outputs to either a pulse output, a toggle output, a hold output or a flash output. Each one of the output ports of the receiver system can be individually programmed to provide any one of these characteristics . Referring now to Figure 1 there is shown a break-down of the transmitted signal from a transmitter system to a receiver system showing how 80 bits therein are broken up to provide discrete sections of a transmitted signal. The transmitted signal is sent at 1200 baud, 8 data bits, no parity and 1 stop bit. The same format is used for inputs to the receiver system.
The transmission consists of the following code which has sub codes therein as follows:- 1. PREAMBLE;
2. CHECK WORD;
3. COMMAND CODE;
4. DATA - datus of pins L - lη
5. UNIQUE CODE; 6. FACTORY/RANDOM CODE selected; and
7. MANUFACTURING CODE. After each transmission, a short time period is required to allow the receiver system to process the data. Typically this is 25 milliseconds. The various sub codes are described below.
1. Preamble.
These 24 data bits are used to initialize the receiver system and comprise a sequence which is AAFF95 (101010101111111110010101). The receiver system when receiving a transmitted signal looks for the alternate Is and 0s followed by at least 7 consecutive Is after which the receiver system timing is synchronised with the "95" byte, which functions like a start bit for a UART.
2. Check Word. The check word is an 8 bit word formed by adding together all of the data in the subsequent fields . The receiver system records the check word as it arrives and calculates its own check word from the data. At the end of reception the two check sums are compared to determine if an error has occurred during transmission. The control circuit is such that it will only take action to provide the required outputs at the output ports if the check sums compare. During the addition process when all the data in the subsequent fields is added together, the processor does no clear carry except on the last time through the loop and this influences any code generated.
3. Command Code
This is a code embodying 8 bits of which 2 are selectable and 6 are set to zero, which is used to signify a particular use of the transmitter system within a user environment as determined by the manufacturing code (to be described in due course) . For example, in a garage door operator environment, a special code can be used to distinguish between a hand held transmitter system used in a motor vehicle and a transmitter system which is mounted at a remote location within a house. It can also be used to permit different interpretations of the data for other devices connected to receiver system and transmitter system which do not generate the same format and work with the same formatted signals.
4. Data - Status of pins L- - L?
When the control circuit is fitted in a transmitter system these 8 bits are read from the 8 input ports . They represent the inputs to the transmitter system which are to conveyed to the receiver system. As a receiver system, they are the bytes that will be used to update the output status of the output ports. It should be noted that the ports are bi-directional and can be used as output and input ports concurrently. This has particular significance if the control circuit is connected with both a transmitter system and a receiver system as it can permit DUPLEX transmission and reception in either a broadcast mode or poll mode. In the transmit mode the ports have to be complemented (have high outputs) but in a receiver mode they can be either high or low outputs, i.e. complemented or high. This permits the control circuit to be interfaced with any desired devices that should require power ON or power OFF to change their states.
5. Unique Code
This code comprises 24 bits and can be either a factory determined code, i.e. one which is provided at the factory where the control circuit is manufactured and/or it can comprise an automatic user generated code in the transmitter system. Pin states at power ON determine which one of the factory code or the user generated code are inserted. The user generated code is obtained by a psuedo random number generator using a seed, either the last random code or a stored number. In a receiver system, the receiver system is caused to compare the transmitted code and the manufacturing code with values obtained from a memory means to verify that the transmission signals contains all the relevant data.
6. Factory/Random Code Selected.
This comprises 1 bit and signifies that either the factory code or the user random code has been selected. In other words, if the bit is a 1 it indicates one or other of the factory code or the random code has been selected.
7. Manufacturing Code (MFG Code)
This code comprises 7 bits and permits a large number of different manufacturing codes to be provided by appropriate selection of the bits being either high or low. The code is programmed identically into each part used by any one particular manufacturer or one particular user environment such as a garage door operator or a paging device or a security device. This code enables the transmitter/receiver system combinations for different manufacturers and/or different environments of use of the transmitter/receiver system to-not be subject to cross-communication between the systems. The manufacturer's code is a fixed code which is programmed at a factory prior to despatch of the control circuit.
Referring now to Figures 2 and 3 there is shown a block schematic diagram of a transmitter system and a block schematic diagram of a receiver system respectively using a National Semiconductors COPS central processing device 1 type COP426C - known as FDl - and an EEPROM memory device 3 type NMC9306. The EEPROM device 3 is programmed to control FDl to provide either transmission of the desired code or reception and decoding of the desired code. A transmitter system 5 of conventional form is arranged to process data and code from the FDl device 1. It is noted that there is provided a transmitter switch 7 and a code switch 9 in the transmitter circuit. In the receiver system there is provided a receiver circuit 8. A code switch 9 is provided in the receiver system circuit .to enable codes to be recorded in EEPROM device 3 therein. FDl device 1 is a mask programmed micro-controller which provides remote control for one of up to eight possible devices which can each operate in the environment shown and be recognized as matched or correlated devices . This is obtained by appropriate strapping of terminals L„ - L7 of FDl device 1 in the transmitter system. The FDl device 1 is used with the EEPROM 3 which contains a configuration word and a unique identifying number which is transmitted with each command. The configuration word controls whether the FDl device 1 is a transmitter system, a receiver system, in either DUPLEX mode or SIMPLEX mode, and whether the transmitter sends a burst of code or continuous code. Bv a burst of code is meant that a code is repeated say only six times as distinct from being- repeated over and over as in continuous mode. The initial contents of the configured word and unique code are programmed into the EEPROM at production from a computer using standard 1200 baud RS232 interface. The pin configuration of FDl is shown in Figure 6. The mask options for the FDl are shown in Figure 7.
Factory Programming of EEPROM Factory programming of the EEPROM 3 is achieved by connecting the Serial IN and Serial OUT pins to the serial port of a personal computer via a required level converter circuit. A program connector 11 is shown in Figures 2 and 3 for this purpose and this is connected via a programming circuit shown in Figure 4, to the personal computer. The personal computer controls links between SI and SO and across a code switch 9 to enable programming mode. All communication is at 1200 ba d, 8 data bits, no parity and one stop bit. The personal computer must allow delays between characters to allow for processing time in the FDl. There are two commands; DUMP EEPROM (bit zero = 0) and LOAD EEPROM (bit zero = 1). The DUMP commands sends 32 bytes of data from the NMC9306 EEPROM to the personal computer. The LOAD command expects 32 bytes of data to write to the EEPROM. After every second byte, a 25 millisecond delay is required to allow for the programming time of the EEPROM. After executing a LOAD, a DUMP should be executed to verify the data. The programming sequence under control of the personal computer is:
1. Enable link from SO to SI.
2. Apply power to FDl chip.
3. Wait 1 second. 4. Disable link from SO to SI. 5. Enable the code switch. As a precaution the configured word can only be modified when the code switch 9 is closed.
6. Send the load command character. Bit 0 = 1 for EEPROM load.
7. Send 32 characters per list above with 25 millisecond delay after every second character to allow for erase/write time.
8. Delay 25 millisecond for last erase/write. 9. Send the dump command character. Bit 0 =
0.
10. Receive 32 characters and verify them.
11. Turn off power and disconnect FDl from computer.
EEPROM Contents
The EEPROM contains 32 bytes allocated as shown in the.following sub-sections.
Bytes 1 & 2: Configuration word byte 1: bit 0 : BURST, determines length of transmissio .
0: continuous transmission
1: burst transmission, as defined by bits 4-7 of byte 2. bit 1 : POWER.
0: D2 is high whenever transmitting.
1: D2 is high at the beginning of transmission whilst reading the EEPROM, low thereafter. bits 2 & 3 : COMMAND. Used to identify the type of transmitting device, bit 4 : COMPLEMENT.
0 : Data true
1: Data Complement. bit 5 CODE.
0: transmit uses factory code.
1: transmit uses random code. bits 6 & 7 MODE SELECT, determines what functional mode the part will enter.
00 transmitter 10 receiver 01 duplex (broadcast! 11 duplex (poll)
byte 2: bits 0-3 RECEIVER TIMEOUT. Outputs will be turned off if another valid code is not received within the timeout period.
0 : 2 sec .
1 : 1 sec.
2 1 5 sec
3 0 .5 sec bits 4 - 7 BURST TIME. When burst mode is selected, selects the number of times the block is transmitted.
OF : 1 block
07 2
0B 3
03 4
01 8
02: 12 "
00 16 "
bytes 3 and 4 OUTPUT MODE. Each bit of byte 3, and the corresponding bit of byte 4, determine the kind of output generated at one of the port output pins when a valid command with a one in the corresponding bit position is received. Note that the bit order is reversed so that bit 0 of bytes 3 and 4 controls bit 7 of the port.
00: pulse while valid code is received. (see receiver timeout above)
01 toggle at beginning of new command, 10 hold until next valid command, 11 flash until next command.
bytes 5 - 7 FACTORY ID CODE 1. A 24 bit ID code intended to be set by the manufacturer.
byte 8 MFG CODE 1. Manufacturer's code for the factory code. bit 7 = 0 in transmitters.
bytes 9 - 11 RANDOM ID CODE 2. A 24 bit code normally generated within the FDl in transmitter mode.
byte 12 MFG CODE 2. Manufacturer's code for the random code. bit 7 = 1 in transmitters.
bytes 13 - 16 ID and MFG CODES 3. In same sequence as above.
bytes 17 - 20 ID and MFG CODES 4. In same sequence as above.
bytes 21 - 24 : ID and MFG CODES 5. In same sequence as above.
bytes 25 - 28 : ID and MFG CODES 6. In same sequence as above. bytes 29 - 32 : ID and MFG CODES 7. In same sequence as above.
Note that bit 1 in the factory/random code transmitted will always depend on whether the factory code or the user code is transmitted. This eliminates the possibility of a randomly generating a code being identical to any of the factory generated codes. The remaining codes are only used in receiver mode: they are never transmitted. Referring now to Figure 5 there is shown a screen which is displayed on a personal computer used when programming the EEPROM device 3. Figure 7 is basically self-explanatory and shows the various options possible to program 'the EEPROM memory device 3. The left hand side has a vertical column representing the function which is to be controlled. There is a central column marked "SELECTION" in which keyboard control of the computer to any one of the options in the right hand column, provides a corresponding entry into the selection column.
Starting at the function column, the first item is Programme Control. The options available are either to burn the EEPROM and/or to exit. The programming functions do not start at program control, but rather at the next - "ROW MANUFACTURING CODE". It can be seen that the input value can be from any value between 0 and 127. The "FACTORY CODE" is the next row and can be from any value between 0 and 16777215. The next row is "MODE" where the EEPROM memory device 3 is programmed to co-operate with either a transmitter system or a receiver system or for DUPLEX operation in a broadcast mode or a poll mode. The next row is for "POWER CONTROLS" and the options are EEPROM or carrier. If the EEPROM option is selected then power to the EEPROM is turned off after codes are read therefrom. If a carrier option is selected the EEPROM is always on for as long as the transmit button is on or if a burst option is selected it stays on for as long as the burst signals are transmitted. The next row is for "COMMAND" where either a 0, a l, a 2 or a 3r giving four possible options, are provided. This option corresponds to the command code in the transmitted signal. Such enables four different input device recognition capabilities to be provided so that it is possible during use to distinguish from where a received signal is coming from, i.e. from which transmitting system device. The next row is the "DATA". The options are true or complemented. In a transmit mode the ports LQ - L-- have to be complemented (high outputs). In a receiver the ports can be either high or low (complemented or high outputs). The next row is
"TRANSMISSION TYPE" and the options are continuous or burst. In the continuous mode a transmission continues as long as a transmit button is operated. In the burst mode a transmission will continue for a selected number of blocks of bursts as determined in the next row options. These will continue even though the transmit button may be been released. The "BURST BLOCKS" row sets the number of times that the transmission is to be repeated. The next row is the "RECEIVER TIMEOUT" and it can be seen that a timeout option of from 0.5 to 2 seconds can be obtained. This sets the time that the receiver system times out and in which it cannot receive a further incoming transmission. The next series of rows represent the output ports LQ - I,- but are displayed only when the EEPROM memory device 3 is programmed to be a receiver. It can be seen that up to eight of the ports can each be separately programmed to pulse, toggle, hold or flash.
When the options have been selected the computer is returned to the first row so that the EEPROM can be burnt in accordance with the programming which has been set or alternatively the programming can be exited. When the EEPROM memory device is burnt, the EEPROM data is displayed in the "VERIFIED ROW", and the configuration word representative of the data is displayed in the "CONFIGURATION WORD" row. This can be recorded for record purposes if required.
Transmit Mode
When power is applied the FDl will send a code sequence on the G_ (Serial OUT pin). If the BURST bit is set in the configuration word, the sequence will be sent the number of times specified in the configuration word, otherwise continuously. Data is sent at 1200 baud, 8 data bits, no parity and one stop bit. The data will be complemented if specified in the configuration word. This allows use of strapping connected to ground L_ - L7. The inputs have pullup resistors on the chip. The L port will be driven low at power on until the program outputs all highs to enable the low current pullups. No device capable of sourcing current should be connected to the L port. Inputs should be driven from switches or open collector drivers to ground only. \.
The sequence will comprise:
1. . Preamble.
2. Check word. 3. Command code.
4. Data status of 8 input pins L~ to L7.
5. 24 bit unique code.
6. 1 bit Random/factory set code.
7. 7 bit Mfg code. 8. Silence time for receiver to process command. If the code switch 9 is low at power on, the random bit in the configuration word will be reset and subsequently the factory set unique code will be used. If the code switch 9 is pressed after power on, - the random bit in the configuration- word is set, and subsequently the random set user code will be used. A new random set user code is then loaded into the EEPROM 3. The random number is generated using the last random code, or the value of an internal counter, and the duration of the code change switch being pressed. The factory set unique code is not overwritten and can be restored as described above. The random set unique code cannot be the same as any factory set user code because of the manner of generation. An initial random number can be loaded in the factory using the LOAD command and this will be used as a seed in the psuedo random number generator. 5 The power pin is set shortly after power is applied and turned off as determined by the power mode in the configuration word. If power mode bit = 1 the power pin is turned off after the data is read from the EEPROM 3. This can be us.ed to reduce power consumption in' beacons which transmit the same code continuously. Otherwise the power pin controls transmitter supply power. It is turned off at the end of a burst to disable carrier as required by FCC requirements. It stays high in continuous mode.
5 Receiver Mode
When the receiver system receives a signal it checks for a preamble code. It then reads a complete code sequence and tries to validate it. Validation comprises first comparing the codes with the check word 0 and then the unique code with each of seven codes which may be stored in the receiver EEPROM and represent seven different transmitter systems which can be correlated to the receiver system. It is extremely unlikely that the receiver system will validate a wrong or corrupted code. 5 Part of the transmission is a check word which is calculated from all the data and 32 bits of ID codes. The receiver system calculates a check word based on the data and ID codes that it receives and compares it with the check word received. The codes received are not validated unless the check words match. When codes are received the outputs L~ to L7 are set according to the mode set in the EEPROM. If desired the outputs L» to L-, can be sent to a line decoder so that up to 356 channels can be recognised. To implement any of these channels, appropriate combinations of L_ to L-, need to be suitably strapped. If during a continuous transmission some of the data bits change then the corresponding outputs will change also. The updated output status will be complemented if specified in the configuration word. In some applications (e.g. toggle mode) it is important that the output turns on only once during a transmission and does not pulse up and down if reception is poor or interference is high. To prevent this, the receiver system samples data five times during each bit of the data and uses the average value. Transient noise is unlikely to coincide with three or more of the five samples and corrupt the average. When the valid codes are received a valid code condition is set in the program for a period set by the selected timeout value in the EEPROM 3, 0.5 to 2 seconds. If invalid or corrupted code is received during this timeout period the outputs will not change. To maintain steady outputs it is only necessary to receive about 1 in 8 codes depending on the timeout value . If the code switch 9 is down at power on, all 7 possible codes in the EEPROM 3 are cleared and new codes may be added as described below. If the code switch 9 is pressed whilst the receiver system is running, new codes can be added to the EEPROM without clearing the old ones. If the EEPROM 3 is full (7 codes) no new codes will be added and no old ones lost.
When the code switch 9 is on new codes can be added by transmitting two bursts of the same code. There must be a delay of greater than the receive timeout between the bursts (0.5 to 2 sec). If a foreign transmitter system sends a code which is also received it will not be loaded but may prevent the desired code from loading. Up to 7 codes can be loaded while the code switch 9 is pressed. Thus the receiver system can be matched to seven different transmitter systems so that seven transmitter systems can each, in turn, transmit signals to the receiver system which will be suitably processed by the receiver system. Correct reception of each code should be verified in case interference prevented one of the codes being received twice. The serial OUT pin is used by the receiver system as a valid data flag. It indicates when a valid code is being received and that pulse mode outputs are valid. It can be used to latch the received code into an external decoder or display circuit. The G-. output is driven low at power on until the program can enable the pullup. The receive input should only be driven by an open collector output.
Duplex Broadcast Mode
In this configuration the receiver system is connected to the G, pin of FDl and the transmitter system to the G2 pin of FDl.
In this mode unique codes must match or correlate by data matching, i.e. the check word code does not have to match. The FDl can be programmed to work both in a transmitter system and in a receiver system. It must be configured for burst mode and complemented data so that the inactive output state is high, the same as the pullups on the inputs. The 8, 10 pins can be used independently as inputs and outputs and connected to a respective receiver system and a transmitter system. If an output is active (low) it will be momentarily pulsed high (pullup state) to read the shared input. A pin can have a switch to ground and a LED driver connected to it. Although the LED drive will be pulsing off to read the switch it is so fast as not to be visible. Care should be taken when driving logic. The LED will be turned on whenever the switch is on due to the common pin connection.
The transmitter system will send a burst at power on, whenever any input state changes and as an acknowledgement after a valid code is received. The code switch functions are the same as the transmitter mode. The receiver will update the output port whenever a valid code is received in the same manner as received mode except that only the selected unique code (factory or random) is used in the code comparison. The receiver mode code switch functions are not used.
Duplex Poll Mode
This holds on or latches outputs of L„ - L7 until the next transmission is received and those outputs are changed.
The functions are the same as broadcast mode except that polling is only initiated on reception of a valid code by the receiver. This mode is best suited to a private link network such as Bi-Line power line link (see National Semiconductor Bi-Line devices) where a master controller can poll each duplex slave for its status and update its output port as desired. Due to the regular polling it uses too much bandwidth for an RF link but does not suffer from the possibility of a collision or interference from obscuring a status broadcast.
Thus it can be seen that the same integrated circuit components can be employed both in a transmitter system and a receiver system and/or that a single integrated circuit components can be employed in a receiver/transmitter system for DUPLEX operation and suitably programmed by a factory as to the intended end use.
Modifications may be made to the present invention as would be apparent to persons skilled in the electronics arts. These and other modifications are deemed to be within the scope of the invention, the nature of which is to be determined from the foregoing description.

Claims

CLAIMS :
1. A control circuit for use in either a transmitter system to permit communication of the status of one or more input port of said control circuit to a receiver system, or with a receiver system to permit data information signals received from a transmitter system transmitting such signals to one or more output port, where the one or more output port will have desired output characteristics, said control circuit comprising a central processing unit and a memory means therefor, said memory means being programmable, in the case of use with a transmitter system, to store communication parameters so that during a transmission communication parameters will be supplied to the transmitter system with data representative of the status of said one or more input port, and in the case of use with a receiver system, to store communication parameters and desired output port characteristics of said one or more output port, so that upon reception, any communication parameters received will be checked with the communication parameters stored and if a match or correlation is made, said at least one output port will provide transmitted data information in . the desired output port characteristic.
2. A control circuit as claimed in Claim 1, wherein when a matched or correlated pair of receiver system and transmitter system, each with a respective control circuit is configured, the status of said at least one input port at said central processing unit at the transmitter system will be transmitted to the receiver system and will be reflected at said at least one output port of said central processing unit at the receiver system.
3. A control circuit as claimed in Claim 1 or Claim 2, wherein in the case of a transmitter system, it can be used to configure the transmitter system to be in a burst transmission mode or a continuous transmission mode.
4. A control circuit as claimed in Claim 3, wherein said transmitter system has a switch means which is user operable to cause said transmitter system to transmit the code and wherein upon operation, when in a set burst mode, the code will be caused to be transmitted in its entirety even through said switch means is no longer in a transmit operation condition.
5. A control circuit as claimed in Claim 1 or Claim 2, wherein in the case of a receiver system, with more than one output port, each of said output ports can be individually configured to either pulse, toggle, flash or hold.
6. A control circuit as claimed in any one of Claims 1 to 5, wherein said memory means comprises an EEPROM device.
7. A control circuit as claimed in any one of Claims 1 to 6, wherein said memory means has information stored therein which will optionally enable its contents to be transferred to said central processing unit when said central processing unit is initially activated, so that said memory means can then have its supply voltage removed therefrom to reduce power consumption.
8. A control circuit as claimed in any one of Claims 1 to 7, wherein both a transmitter system and a π receiver system are connected to a single control circuit, so that DUPLEX transmission and reception can be effected.
9. A control circuit as claimed in Claim 8, wherein the transmitter system and receiver system are configured by said memory means to be in broadcast mode or poll mode.
10. -A control circuit as claimed in any one of the preceding claims, wherein said memory means can store codes which are useable to identify transmissions for several particular transmitter systems.
11. A transmitter receiver system combination where identification of codes in a received transmission is to be made before data can be passed at the receiver system, said transmitter system comprising code generating means for providing code signals to a transmitted signal, said receiver system having memory means for storing a code of a transmission to be received, comparing means for comparing a received code with the stored code and processing means for permitting data in said transmission to be acted upon if there is a code match or correlation, said code generating means having a user activatable random automatic generating means which can be activated to provide a user generated code, memory means for storing the code generated and for transmitting that code in any transmission, said receiver system having means activatable to permit said memory means to record the code in a received transmission.
12. A combination as claimed in Claim 11, wherein said code includes at least a fixed code (Mfg code) which cannot be user changed, and said user generated code, and wherein said fixed code identifies a characteristic of the transmitter system from which a transmission is to be made whereas said user generated code identifies the particular transmitter system.
13. A transmitter receiver system combination where identification of code in a received transmission is to be made before data therein can be acted upon at the receiver system, said transmitter system providing code signals to a transmitted signal, said receiver system having memory means for storing part of a code of a transmission to be received, comparing means for comparing a received code with a stored code and means for permitting data in said transmission to be acted on if there is a code match or correlation, said transmitter system having at least two separate sub codes provided in said code in a transmission, at least one sub code of which is useable to define a characteristic of the transmitter system (Mfg code) whilst the other sub code is a code to identify the transmitter system.
14. A transmitter receiver system combination as claimed in Claim 13 , wherein said other sub code can be changed by a user, from a fixed code which itself cannot be user changed, to a code provided by a user.
15. A transmitter receiver system combination as claimed in Claim 14, wherein said code provided by the user is generatable by a psuedo random number generator.
16. A transmitter receiver system combination as claimed in Claim 14 or Claim 15, wherein said fixed code for said other sub code can be recalled to replace any code which has been provided by a user.
17. A transmitter receiver system combination as claimed in any one of Claims 11 to 16, wherein an additional fixed code (command code) can be implemented to identify a further characteristic of the transmitter system.
18. A transmitter receiver system combination as claimed in any one of Claims 14 to 16, wherein said transmitter system has a transmit switch means and a code switch means and wherein said other code can be changed to either the fixed code or the user code by the order in which said transmit switch and said code switch are pressed.
19. A transmitter receiver system combination as claimed in Claim 18, wherein when a user code is required, it is generated by a generator, the code generated being determined by the duration of the activation of said code switch means.
20. A transmitter receiver system combination as claimed in Claim 19, wherein the generator is a psuedo random number generator which can generate the random code from the last random code or from the value of a stored number.
21. A transmitter receiver system combination as claimed in any one of Claims 14 to 20, wherein the fixed code or the user code is signified as being in the transmission by either a one or a zero in a particular part of the transmission.
22. A transmitter receiver system combination as claimed in any one of Claims 14 to 20 including memory sufficient to store a plurality of codes, so that a plurality of transmitter systems each with their own user changeable code can operate with said receiver system so that data from each can be acted on when there is a code match or correlation.
23. A transmitter receiver system combination as claimed in any one of Claims 11 to 22 provided with a control circuit as claimed in any one of Claims 1 to 10.
EP19880902079 1987-02-23 1988-02-23 Transmission and reception of data Withdrawn EP0348414A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AU48687 1987-02-23
AU486/86 1987-02-23

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EP0348414A1 true EP0348414A1 (en) 1990-01-03
EP0348414A4 EP0348414A4 (en) 1990-12-05

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KR920021784A (en) * 1991-05-09 1992-12-18 강진구 Washing machine control device and control method
EP1437996A1 (en) 2001-10-26 2004-07-21 Daniel Johnson Hospital bed power-assist
US7389836B2 (en) 2003-09-23 2008-06-24 Dane Industries, Inc. Power-assisted cart retriever with attenuated power output
US20090203340A1 (en) * 2006-07-11 2009-08-13 Freescale Semiconductor, Inc. Receiver for receiving at least two types of signals, data communication system and vehicle including a receiver
US9010771B2 (en) 2009-11-10 2015-04-21 Dane Technologies, Inc. Utility machine with dual-mode steering

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Also Published As

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EP0348414A4 (en) 1990-12-05
WO1988006385A1 (en) 1988-08-25

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