EP0080467A1 - Improved pager decoding system - Google Patents

Improved pager decoding system

Info

Publication number
EP0080467A1
EP0080467A1 EP19820901529 EP82901529A EP0080467A1 EP 0080467 A1 EP0080467 A1 EP 0080467A1 EP 19820901529 EP19820901529 EP 19820901529 EP 82901529 A EP82901529 A EP 82901529A EP 0080467 A1 EP0080467 A1 EP 0080467A1
Authority
EP
European Patent Office
Prior art keywords
synchronization
decoding
code word
synchronization code
pager
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP19820901529
Other languages
German (de)
French (fr)
Inventor
Graham Edgar Beesley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of EP0080467A1 publication Critical patent/EP0080467A1/en
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W88/00Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/02Terminal devices
    • H04W88/022Selective call receivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0079Receiver details
    • H04L7/0083Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Definitions

  • This invention relates to a radio receiver (pager) decoding system and a pager arranged to deploy said system.
  • pager radio receiver
  • One system producing a code format for use in wide area radio paging is outlined in Appendix A of A Standard Code for Radicpaging (A. report of the studies of the British Post Office Code Standardisation Advisory Group (POCSAG) 1578/1979.
  • a radio receiver (pager ) decoding system arranged to receive a transmission signal that comprises a periodically recurring synchronization codeword separating first, second and subsequent batches of codewords in a plurality of frames, characterised in that the system has means for decoding after the receipt of an erroneous synchronization codeword or the loss thereof at its immediate specific decoding frame by virtue of the known time in the transmission between an obtained synchronization codeword immediately before the erroneous or lost synchronization codeword and said specific decoding frame immediately following said erroneous or lost synchronization codeword.
  • decode operations are terminated after two consecutive erroneous synchronization codewords are received or lost and are not taken-up again until a synchronization codeword is correctly received.
  • Figure 2 is a diagram s imilar to that of Figure 1 but showing a signal format with the receipt of an erroneous or the loss of a synchronization codeword (SC) and the ability of the system of the invention to decode.
  • SC synchronization codeword
  • Figure 3 is a block diagram showing an embodiment of a pager for incorporation of the system of the present invention.
  • Figure 4 is a flow diagram of operations to be performed by one decoding circuit.
  • Figure 5 is a detail flow diagram relating to a part of Figure 4.
  • Figure 6 is a schematic.
  • Figure 1 is shown the well known POCSAG signal format. in which a transmission comprises a preamble followed by batches of complete codewords, each batch beginning with a synchronisation codeword (SC).
  • SC synchronisation codeword
  • Each transmission starts with a preamble to permit a pager to attain bit synchronization and to prepare it to acquire word synchronization.
  • the preamble is a pattern of reversals, 101010 ... repeated for a period of at least 576 bits, i.e. the duration of a batch plus a codeword.
  • any batch codewords are transmitted comprising a synchronization codeword followed by 8 frames each containing 2 codewords. The frames are numbered 0 to 7 and the pager population is similarly
  • Each pager is allocated to one of the 8 frames according to the 3 least significant bits (1sb) of its 21 bit identity and will only examine address codewords in that frame. Therefore each pager's address codewords must only be transmitted in the frame that is allocated to those codewords.
  • Message codewords for any receiver may be transmitted in any frame but will follow, directly, the associated address codeword.
  • a message may consist of any number of codewords transmitted consecutively and may embrace one or more batches but the synchronization codeword must not be displaced by message codewords.
  • Message termination is indicated by the next address codeword or idle codeword. In any frame an idle codeword will be transmitted whenever there is no address codeword or message codeword to be transmitted.
  • Preamble (P) commences and is followed by synchronization codeword SC and SC 2 , SC 4 ,
  • SC 5 , SC 6 ; SC 3 and SC 7 are erroneous or lost owing to impulsive noise, but decoding is still achieved in the batch follcwir. ⁇ SC 3 , and SC 7 since both the respective decode frames are at predetermined time distance Z from SC 2 and SC 6 .
  • a block diagram of a pager unit includes a decoding circuit.
  • the radio pager comprises a receiver unit 10 having a binary detector 12, which is responsive to receiver 10 and is also responsive to a data enable signal from a microprocessor unit 20 over line 11 and which transmits received pulses to unit 20 over line 13.
  • Unit 20 in one embodiment of the invention is an MC 146805 8-bit microprocessor by Motorola.
  • an identity ROM read only memory
  • program ROM program ROM
  • support I.C. 26 The identity ROM 22 is programmed, using fusable links, for example, with the unique identity number of the specific pager.
  • the identity number has two separate parts (1) a base identity code
  • Each pager in the pager population is assigned one of eight possible frame numbers within a batch.
  • the identity ROM 22 is plug-interchangeable.
  • Each pager can respond to four different paging addresses and accordingly generates four distinguishable alerting tones.
  • the four different paging addresses are calculated by the unit 20 utilising the base identity code contained in the identity ROM 22, as will be described in greater detail below.
  • the program ROM 24 contains the computer program which controls the operation of the unit 20 to carry out the desired decoding functions of the decoding circuit.
  • the portion of the computer program which specifically pertains to the decoding system of the present invention is attached hereto in source code form as given in
  • the support I.C. 26 is a general purpose support circuit which, in the context of the present invention, performs three functions. First, it generates and regulates the secondary supply for the unit 20, the identity ROM 22, and the program
  • ROM 24 contains a timer circuit known as the "deadman timer" (DMT), whose function is to reset the unit 20 after a predetermined interval in the event that a specific instruction either is not received or remains in the instruction register for an excessive period.
  • DMT deadman timer
  • Deadman timer is to prevent the decoder circuit from being held up in a lengthy software loop.
  • the support I.C. 26 tests the primary power supply level on command and returns an indication of its condition.
  • unit 20 generates the paging alert signals over line 27 to audio frequency amplifier 23 and ultimately transducer 30.
  • a power supply switch 36 is responsive to an enable signal from unit 20 over line 35. When the power supply switch 36 is enabled, the receiver power suppiy is connected to receiver 10 and to binary detector 12 over line 37. Battery 40 provides the primary power supply.
  • Switch 3S is a user-operated on/off switch.
  • Switch 32 is a "cancel" switch, the closure of which cuts short a sounding paging alert.
  • Switch 34 is a switch used to make a selection between "normal mode" and "memory mode”.
  • the pager In “memory mode" upon receipt of a paging request the pager does not generate the paging alert, but it stores the page request in a memory allocated for such purpose in the unit 20.
  • switch 34 When switch 34 is switched over to the "normal mode", or when the "cancel" switch 32 is depressed at any time, any page requests stored in memory are sequentially read out and their corresponding audible alerts (each uniquely distinguishable) are generated to the pager user.
  • Word synchronization 2 checks the number of errors in the received synchronization codeword and if less than or equal to the error criterion clears the excess error flag and returns (122) (F) to decode. If the number of errors is greater than the prescribed error criterion then the flag is checked to see if it is already set (123). If clear the flag is then set (124) and the routine returns to decode. If the flag is already set (Y)(123), indicating that the previous synchronization word was received with excessive errors, the routine returns to the bit synchronization and transmission squelch routine (108) without decoding. Thus decode operations are terminated after two consecutive erroneous synchronization codewords have been received.
  • the system of the invention gives decoding after the erroneous receipt or loss of one synchronization codeword (SC) such as SC 3 or SC 7 for example ( Figure 2) but will not give decoding if the noise and the loss extends to a second consecutive synchronization codeword and will then revert to the acceptance of the next synchronization codeword (SC) that is obtained correctly, this is shown schematically in Figure 6.
  • SC 1 is correct and decode occurs at d 1 .
  • SC 3 is lost and there are too many erronious synchronization codewords to give a decode at X.
  • SC 4 is correct and decode occurs at d 3 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Systeme de decodage faisant partie d'une unite de recherche de personnes radio-portative pouvant detecter et stocker jusqu'a quatre signaux differents d'alarme par utilisateur. Chaque dispositif de recherche peut etre adresse individuellement. Le systeme de decodage est sensible a un protocole de transmission dans lequel le signal de transmission comprend une position de synchronisation permettant la synchronisation par bit, un mot de code de synchronisation recurrent, et un ou plusieurs mots de codes d'adresses a l'interieur d'un lot de mots de code transmis entre chaque mot de code de synchronisation, un mot de code de synchronisation recurrent separant le premier, le deuxieme et les lots successifs de mots de code dans une pluralite de blocs, le systeme se caracterisant en ce qu'il possede des organes pour le decodage apres la reception d'un mot de code de synchronisation incorrect ou de la perte de celui-ci a son bloc de decodage specifique immediat grace au laps de temps connu s'etant ecoule dans la transmission entre un mot de code de synchronisation obtenu immediatement avant le mot de code de synchronisation incorrect ou perdu et le bloc de decodage specifique suivant immediatement le mot de code de synchronisation incorrect ou perdu.Decoding system as part of a radio portable person search unit capable of detecting and storing up to four different alarm signals per user. Each search device can be addressed individually. The decoding system is sensitive to a transmission protocol in which the transmission signal comprises a synchronization position allowing bit synchronization, a recurrent synchronization code word, and one or more address code words inside. of a batch of code words transmitted between each synchronization code word, a recurrent synchronization code word separating the first, the second and the successive batches of code words in a plurality of blocks, the system being characterized in that that it has organs for decoding after the reception of an incorrect synchronization code word or the loss thereof to its specific immediate decoding block thanks to the known period of time having elapsed in the transmission between a synchronization code word obtained immediately before the incorrect or lost synchronization code word and the specific decoding block immediately following the synchronization code word i incorrect or lost.

Description

IMPROVED PAGER DECODING SYSTEM
DESCRIPTION
This invention relates to a radio receiver (pager) decoding system and a pager arranged to deploy said system. One system producing a code format for use in wide area radio paging is outlined in Appendix A of A Standard Code for Radicpaging (A. report of the studies of the British Post Office Code Standardisation Advisory Group (POCSAG) 1578/1979.
The specification for a standard code format for use in the PCCSAG system is now well known the signal format being a transmission comprising inter alia a preamble followed by batches of complete codewords, each batch beginning with a synchronization codeword (SC).
It is known that the transmission of such a system when in use is vulnerable to fading and loss of definition from impulsive noise. It is highly desirable to accept fading and even loss of a synchronization codeword without the loss of the ability to decode.
This desideratum is achieved according to the present invention by the provision of a radio receiver (pager ) decoding system arranged to receive a transmission signal that comprises a periodically recurring synchronization codeword separating first, second and subsequent batches of codewords in a plurality of frames, characterised in that the system has means for decoding after the receipt of an erroneous synchronization codeword or the loss thereof at its immediate specific decoding frame by virtue of the known time in the transmission between an obtained synchronization codeword immediately before the erroneous or lost synchronization codeword and said specific decoding frame immediately following said erroneous or lost synchronization codeword.
In a preferred system decode operations are terminated after two consecutive erroneous synchronization codewords are received or lost and are not taken-up again until a synchronization codeword is correctly received.
The invention will be more fully understood from the following description given by way of example only with reference to the figures of the accompanying drawings in which:- Figure 1 is a diagram 01 perfect signal format.
Figure 2 is a diagram s imilar to that of Figure 1 but showing a signal format with the receipt of an erroneous or the loss of a synchronization codeword (SC) and the ability of the system of the invention to decode.
Figure 3 is a block diagram showing an embodiment of a pager for incorporation of the system of the present invention.
Figure 4 is a flow diagram of operations to be performed by one decoding circuit.
Figure 5 is a detail flow diagram relating to a part of Figure 4.
Figure 6 is a schematic.
In Figure 1 is shown the well known POCSAG signal format. in which a transmission comprises a preamble followed by batches of complete codewords, each batch beginning with a synchronisation codeword (SC).
Each transmission starts with a preamble to permit a pager to attain bit synchronization and to prepare it to acquire word synchronization. The preamble is a pattern of reversals, 101010 ... repeated for a period of at least 576 bits, i.e. the duration of a batch plus a codeword. In any batch codewords are transmitted comprising a synchronization codeword followed by 8 frames each containing 2 codewords. The frames are numbered 0 to 7 and the pager population is similarly
divided into 3 groups. Each pager is allocated to one of the 8 frames according to the 3 least significant bits (1sb) of its 21 bit identity and will only examine address codewords in that frame. Therefore each pager's address codewords must only be transmitted in the frame that is allocated to those codewords.
Message codewords for any receiver may be transmitted in any frame but will follow, directly, the associated address codeword. A message may consist of any number of codewords transmitted consecutively and may embrace one or more batches but the synchronization codeword must not be displaced by message codewords. Message termination is indicated by the next address codeword or idle codeword. In any frame an idle codeword will be transmitted whenever there is no address codeword or message codeword to be transmitted. In Figure 2 the signal format is extended and shown to a reduced scale. Preamble (P) commences and is followed by synchronization codeword SC and SC2, SC4,
SC5, SC6 ; SC3 and SC7, are erroneous or lost owing to impulsive noise, but decoding is still achieved in the batch follcwir.σ SC3, and SC7 since both the respective decode frames are at predetermined time distance Z from SC2 and SC6.
In Figure 3 a block diagram of a pager unit, includes a decoding circuit. The radio pager comprises a receiver unit 10 having a binary detector 12, which is responsive to receiver 10 and is also responsive to a data enable signal from a microprocessor unit 20 over line 11 and which transmits received pulses to unit 20 over line 13. Unit 20 in one embodiment of the invention is an MC 146805 8-bit microprocessor by Motorola.
Also coupled to unit 20 are an identity ROM (read only memory) 22, a program ROM 24, and a support I.C. 26. The identity ROM 22 is programmed, using fusable links, for example, with the unique identity number of the specific pager. The identity number has two separate parts (1) a base identity code
and (2) the frame number which defines the relative position within a batch at which the frame assigned to the specific pager appears. Each pager in the pager population is assigned one of eight possible frame numbers within a batch. The identity ROM 22 is plug-interchangeable.
Each pager can respond to four different paging addresses and accordingly generates four distinguishable alerting tones. The four different paging addresses are calculated by the unit 20 utilising the base identity code contained in the identity ROM 22, as will be described in greater detail below.
The program ROM 24 contains the computer program which controls the operation of the unit 20 to carry out the desired decoding functions of the decoding circuit. The portion of the computer program which specifically pertains to the decoding system of the present invention is attached hereto in source code form as given in
Appendix A to be understood with Figure 5.
The support I.C. 26 is a general purpose support circuit which, in the context of the present invention, performs three functions. First, it generates and regulates the secondary supply for the unit 20, the identity ROM 22, and the program
ROM 24. Secondly, it contains a timer circuit known as the "deadman timer" (DMT), whose function is to reset the unit 20 after a predetermined interval in the event that a specific instruction either is not received or remains in the instruction register for an excessive period. The function of the
"deadman timer" is to prevent the decoder circuit from being held up in a lengthy software loop. Thirdly, the support I.C. 26 tests the primary power supply level on command and returns an indication of its condition. unit 20 generates the paging alert signals over line 27 to audio frequency amplifier 23 and ultimately transducer 30. A power supply switch 36 is responsive to an enable signal from unit 20 over line 35. When the power supply switch 36 is enabled, the receiver power suppiy is connected to receiver 10 and to binary detector 12 over line 37. Battery 40 provides the primary power supply. Switch 3S is a user-operated on/off switch. Switch 32 is a "cancel" switch, the closure of which cuts short a sounding paging alert. Switch 34 is a switch used to make a selection between "normal mode" and "memory mode".
In "memory mode" upon receipt of a paging request the pager does not generate the paging alert, but it stores the page request in a memory allocated for such purpose in the unit 20. When switch 34 is switched over to the "normal mode", or when the "cancel" switch 32 is depressed at any time, any page requests stored in memory are sequentially read out and their corresponding audible alerts (each uniquely distinguishable) are generated to the pager user.
In Figure 4 is given by means of an orthodox flow sheet, understood by one skilled in the art of wide area radio paging, a logical sequence for use by the unit 20 of Figure 3 which is as given below:-
101 is turn on
102 is battery test
103 is valid battery ?
104 is initialize
105 is audio bleep on completion of initialize 104
106 is bleep cancelled?
107 is bleep complete?
108 is bit synchronization
109 is page received?
110 is bit synchronization achieved ?
111 is word synchronization 1
112 is word synchronization 1 achieved?
113 is battery save
114 is decode 1
115 is decode 2
116 is battery save 117 is page received?
118 is memory mode?
119 is delay
120 is word synchronization 2
121 is word synchronization 2 achieved?
122 is clear flag
123 is flag set
124 is set flag
125 is decrement count
126 is count equals zero?
127 is delay
128 is memory mode?
129 is set asynchronous mode
130 is memory interogate
131 is set asynchronous mode
132 is page received?
133 is test for page function 1, 2, 3 or 4
134 is requisite audio tone
135 is page cancelled?
136 is asynchronous mode?
137 is bit synchronization and decode
138 is bit synchronization and decode
139 is eight second tone complete?
140 is clear tone flag
141 is memory mode? After switch-on the battery is checked and the pager initialized, (A) (101-107). This consists of setting up registers and obtaining identity and operational information from the identity ROM 22 (Figure 3). The pager then proceeds to look for the transmission characteristics and attempt synchronization to bit stream 108. After obtaining bit synchronization initial word synchronization is sought (111). When this has been successfully achieved decode is attempted in the appropriate frame of the transmission B (11 3-116). Following this it is necessary to re-establish word synchronization in a routine called Word Synchronization 2 (120). This routine also optimizes bit synchronization
Word synchronization 2 checks the number of errors in the received synchronization codeword and if less than or equal to the error criterion clears the excess error flag and returns (122) (F) to decode. If the number of errors is greater than the prescribed error criterion then the flag is checked to see if it is already set (123). If clear the flag is then set (124) and the routine returns to decode. If the flag is already set (Y)(123), indicating that the previous synchronization word was received with excessive errors, the routine returns to the bit synchronization and transmission squelch routine (108) without decoding. Thus decode operations are terminated after two consecutive erroneous synchronization codewords have been received.
The essential steps of the invention reside preimarily between points Q1 and Q2 generally of the flow sheets as shown in Figures 4 and 5.
In Figure 5 the sequence is as follows:-
201 is JSR WD SYN2
202 is subroutine WD SYN2
203 is 4, BFLAG clear?
204 is GNOWD2
205 is wait
206 is reset timer, DMT reset receiver off
207 is wait
208 is zero, GFLAG 1 clear?
209 is GNWHOP
210 is set zero GFLAG 1
211 is BRA to GWDOK 1
212 is clear zero, GFLAG 1
213 is reset timer
214 is JMP GBATOK
215 is clear zero GFLAG 1
216 is BRA, GWDOK1 The advantage of the system of the invention is shown by the following table in which the performance in continuous noise for three bit error rates for a system of the flow sheet minus that part between
Q2 and Q3 and a system with the refinement of the present invention are compared respectively in columns A and B.
A B
Bit Error Raxe Success Rate Success Rate
.05 .618 .697
.1 .134 .222
.15 .015 .043
It is to be understood that the system of the invention gives decoding after the erroneous receipt or loss of one synchronization codeword (SC) such as SC3 or SC7 for example (Figure 2) but will not give decoding if the noise and the loss extends to a second consecutive synchronization codeword and will then revert to the acceptance of the next synchronization codeword (SC) that is obtained correctly, this is shown schematically in Figure 6. SC1 is correct and decode occurs at d1.
SC2 is lost, but decode occurs at d2 in harmony with the present invention.
SC3 is lost and there are too many erronious synchronization codewords to give a decode at X.
SC4 is correct and decode occurs at d3.
SC5 is lost, but decode occurs at d4 in harmony with the present invention.
Note SC1 to d2 and SC4 to d4 are at a predetermined time period Z as shown more fully in Figure 2.

Claims

1. A radio receiver (pager) decoding system arranged to receive a transmission signal that comprises a periodically recurring synchronization codeword separating first, second and subsequent batches of codewords in a plurality of frames, characterised in that the system has means for decoding after the receipt of an erroneous synchronization codeword or the loss thereof at its immediate specific decoding frame by virtue of the known time in the transmission between an obtained synchronization codeword immediately before the erroneous or lost synchronization codeword and said specific decoding frame immediately following said erroneous or lost synchronization codeword.
2. A radio receiver (pager) decoding system substantially as hereinbefore described.
3. A radio receiver (pager) decoding system substantially as hereinbefore described and as shown in the figures of the accompanying drawings and the appendix.
EP19820901529 1981-06-16 1982-05-28 Improved pager decoding system Ceased EP0080467A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8118532A GB2100486B (en) 1981-06-16 1981-06-16 Radio receiver (pager) decoding system
GB8118532 1981-06-16

Publications (1)

Publication Number Publication Date
EP0080467A1 true EP0080467A1 (en) 1983-06-08

Family

ID=10522553

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19820901529 Ceased EP0080467A1 (en) 1981-06-16 1982-05-28 Improved pager decoding system

Country Status (4)

Country Link
EP (1) EP0080467A1 (en)
JP (1) JPS58501487A (en)
GB (1) GB2100486B (en)
WO (1) WO1982004514A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129843A (en) * 1982-01-27 1983-08-03 Nec Corp Local call collator
GB2136178A (en) * 1983-02-25 1984-09-12 Philips Electronic Associated Pager decoding system
JP2725480B2 (en) * 1991-06-25 1998-03-11 日本電気株式会社 Radio selective call receiver
GB9424438D0 (en) * 1994-12-02 1995-01-18 Philips Electronics Uk Ltd Fade recovery in digital message transmission systems
JP2699956B2 (en) * 1995-10-30 1998-01-19 日本電気株式会社 Radio selective call receiver

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1422958A (en) * 1964-11-13 1966-01-03 Thomson Houston Comp Francaise Improvements to digital information signal reception systems
GB2086106B (en) * 1980-10-13 1984-06-27 Motorola Ltd Pager decoding system with intelligent synchronisation circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8204514A1 *

Also Published As

Publication number Publication date
WO1982004514A1 (en) 1982-12-23
GB2100486A (en) 1982-12-22
GB2100486B (en) 1985-02-20
JPS58501487A (en) 1983-09-01

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