EP0037566A2 - System to identify a person, for instance in connexion with the control of an apparatus - Google Patents

Abstract

System for identifying, for example, a person for operating an electrical appliance, a mechanical appliance or any other appliance. When the key (2) has been coupled to the electronic lock this first of all transmits, via circuit (18), a single pulse enabling the coded data originally contained in the passive memory formed by the set of switches (10) in the key to be loaded into the shift register (9). The shift register (9) is subsequently read by means of a succession of pulses transmitted by the serial reading circuit (20). The number of pulses corresponds to the number of bits in the shift register (9) owing to the existence of a read stop circuit (23) containing a pulse counter (42). In a variant some of the switches (10) can be replaced by fusible links, the state of which can be changed at will by a writing circuit contained in the electronic key.

Description

The present invention relates to an identification system, for example of a person for the control of an electrical, mechanical or other device. People identification or recognition systems have many applications. They are used in particular for opening doors, managing schedules, managing devices used by several people such as photocopying machines or even in systems for distributing banknotes by credit cards.

In certain identification systems of the conventional type, a removable part is used which includes an identification code and which is in the form of a badge in the form of a credit card which the person to be identified carries with it (see by example U.S. Patent 3,637,994). The identification code is materialized in the badge either by perforations or by a magnetic strip. The use of such badges has many drawbacks. They are indeed relatively bulky and can deteriorate easily. In the case of punched badges, the code is relatively easy to recognize. When the carrier of the identification code is magnetic, the magnetic tape can be damaged by scratches or under the influence of magnets. Furthermore, the device used for reading badges of this type is necessarily complex and must in particular include a mechanical drive system enabling the badge to be moved in order to read the identification code. As a result, the reading devices have a high production cost.

In other identification systems, a removable part is used in the form of an electronic key similar to a conventional key but comprising means for memorizing an identification code which can be detected and recognized by a system. like a lock but comprising a set of electronic circuits (see for example American patent 4,038,637).

In French patent 2,363,837, a programmable memory key system is used in which the identification code can be contained in a shift register housed in the electronic key. The information contained in the key can be read by the electronic lock by means of pulses supplied by a clock located in said lock. The information thus obtained is compared with a code stored in the lock so as to determine the identity of the two codes and the command, for example, of the opening of a keeper or of any other desired operation.

In this document, however, the risk is great of a fraudulent duplication of the electronic key, the reading of the shift register allowing the determination of the identification code is relatively easy for a technician familiar with this type of device.

The present invention therefore relates to an identification system which does not have the drawbacks of the identification systems currently used and known and in which the mobile part analogous to a key is inert so that the simple reading of the shift register contained in the key does not allow simple identification of the identification code.

The identification system, for example of a person, for the control of an electrical device, a mechanical device or any other device according to the invention, comprises a movable part analogous to an electronic key comprising an electronic identification code registered in at least one memory zone of the preprogrammed passive type and comprising at least one parallel / serial shift register. The system further comprises a fixed part similar to an electronic lock, capable of being coupled with the mobile part and comprising means for supplying electric current, electronic means for reading, recognizing and interpreting the content of the register to offset of the mobile part and comparison means with a pre code programmed in said fixed part. According to the invention, electronic means of the fixed part further comprise means for supplying a pulse capable of causing the loading of the electronic identification code stored initially in the mobile part up to the shift register of said mobile part.

In other words, according to the invention, the shift register of the mobile part does not initially contain any information, the identification code being stored in a memory area of the mobile part distinct from the shift register. When the mobile part is coupled to the fixed part, it is the loading pulse which acts on the mobile part so as to pass the code contained in the memory area into the shift register. A reading made without particular precautions of the shift register of the mobile part therefore does not give any information on the identification code which leads to a very high security against any attempt of fraudulent duplication of the electronic key of the system of the present invention.

The memory area of the mobile part preferably comprises a plurality of switches which can be produced for example in the form of fuses or by destroyable connections and the position of which determines the electronic identification code. Each flip-flop of the shift register of the mobile part is associated with one of the switches whose position controls its state by means of two NAND gates receiving the loading pulse on one of their inputs. The first of the aforementioned NON AND gates is connected by its other input to the switch with which it is associated. The second NAND gate receives the output of the first gate on its other input.

In this way, as soon as a loading pulse appears on one of the inputs of the two NAND gates, each flip-flop of the shift register is placed in a state corresponding to that of the switch with which it is associated. As a result, the identification code initially represented by the position of the plurality of switches is is registered in the various flip-flops of the shift register under the action of the above-mentioned loading pulse.

The means for generating the loading pulse included in the fixed part or electronic lock, comprise a loading circuit provided with a double flip-flop of the master-slave type associated with a NAND gate and receiving the clock pulses.

The electronic means included in the fixed part for reading the content of the shift register of the mobile part, include a reading circuit provided with a double flip-flop of the master-slave type associated with a NAND gate receiving the pulses from the above clock connected to the output of the charging circuit. In this way, the reading circuit provides successive pulses allowing the reading in series of the information contained in the shift register of the mobile part after this register has been loaded with the identification code by the action of the pulse of loading.

A read stop circuit makes it possible to limit the number of clock pulses to the exact number of bits of the identification code contained in the shift register of the mobile part. This read stop circuit includes a pulse counter receiving the read pulses from the read circuit and a monostable capable of delivering a read stop pulse when the number of pulses counted corresponds to the number of bits in the register. with shift, that is to say when the content of the shift register of the mobile part has been read once.

In an advantageous embodiment, the system can also comprise, in the fixed part, a circuit for authorizing successive tests. This circuit comprises a succession of flip-flops, the resetting of which depends on the positive result of the comparison made by the comparison means with the code preprogrammed in the fixed part. In this way, a number of unsuccessful attempts is therefore authorized equal to the number of flip-flops in this succession of flip-flops before triggering an alarm.

Suitable timing means can also be provided to reset all of the system's rockers to zero when the key is inserted and after uncoupling.

In a preferred embodiment of the invention, the fixed part also comprises writing means for modifying the state of a determined portion of the memory area of the mobile part. In this way, it is possible, according to the instructions provided by a computer preferably produced in the form of a microprocessor included in the fixed part, to modify the identification code contained in the mobile part according to a periodicity or a determined criterion. or part of this code.

In a first embodiment, the writing means of the fixed part comprise a parallel / serial shift register receiving driving pulses synchronized with the reading pulses of the shift register of the moving part. The modifiable portion of the memory area of the mobile part preferably comprises a plurality of fuses which can be destroyed sequentially or randomly, in place of the aforementioned switches whose position is invariable.

The mobile part can include a second serial / parallel shift register receiving the serial signal from the shift register of the writing means. This signal causes certain selected fuses to blow sequentially or randomly so that the current flowing through them causes them to break.

In a variant, the fixed part of the system of the invention comprises means for supplying a signal for controlling the breaking of fuses after the write stop. This signal is transmitted to a set of AND gates receiving at their other input the output of each of the flip-flops of the second serial / parallel shift register of the mobile part. The output of each AND gate is connected to one of the terminals of a fuse.

In another embodiment, the writing means are associated with a loading circuit and a reading supplying to a parallel / series shift register driving pulses the number of which is determined by independent write stop means.

It is thus possible to modify at will in a sequential or random manner a determined number of bits of the identification code of the mobile part, thereby making any fraudulent use of the system even more difficult.

• la fig. 1 représente la structure générale du système d'identification selon la présente invention;
• la fig. 2 représente d'une manière plus détaillée un exemple d'un système d'identification particulier prévu pour la commande de la gâche d'une porte;
• la fig. 3 illustre la forme des signaux en fonction du temps en divers points du schéma de la fig. 2;
• la fig. 4 est une vue détaillée partielle du registre à décalage de la partie mobile montrant le circuit de commande de chargement du code d'identification;
• la fig. 5 est un schéma analogue à celui de la fig. 2 montrant une variante permettant la programmation du changement de code d'identification et comportant une commande d'écriture synchronisée avec la lecture;
• la fig. 6 illustre une variante du système dé la fig. 5 dans laquelle la commande d'écriture est indépendante de la lecture; et
• la fig. 7 illustre de manière détaillée le circuit électronique de la partie mobile susceptible d'être utilisée dans un système d'identification tel qu'illustré sur les fig. 5 et 6.

The invention will be better understood from the study of a few embodiments taken by way of nonlimiting examples and illustrated by the appended drawings, in which:

• fig. 1 shows the general structure of the identification system according to the present invention;
• fig. 2 shows in more detail an example of a particular identification system provided for controlling the strike of a door;
• fig. 3 illustrates the shape of the signals as a function of time at various points in the diagram of FIG. 2;
• fig. 4 is a partial detailed view of the shift register of the mobile part showing the control circuit for loading the identification code;
• fig. 5 is a diagram similar to that of FIG. 2 showing a variant allowing the programming of the change of identification code and comprising a write command synchronized with the reading;
• fig. 6 illustrates a variant of the system of FIG. 5 in which the write command is independent of reading; and
• fig. 7 illustrates in detail the electronic circuit of the mobile part capable of being used in an identification system as illustrated in FIGS. 5 and 6.

As can be seen in fig. 1, the identification system, for example of a person for the control of an electrical device, a mechanical device or any other device identified by the general reference 1, comprises a removable part transportable by said person and referenced 2. Preferably, said removable part is pre feels like a key. It can advantageously consist of a glass fiber wafer sandwiched by two thicknesses of hard plastic resistant well to solvents and to extreme temperatures. The electronic key is in these conditions very resistant and its wear negligible in particular compared to that of a badge of conventional type.

The electronic key has six or seven electrical contacts depending on the system variants. These contacts can be made mechanically and consist of conductive elements embedded in the plastic material cooperating on the side of the fixed part playing the role of electronic lock with steel balls held by springs.

It is also possible to envisage making these contacts in other ways, for example by opto-electronic link.

The removable or key part 2 comprises a memory assembly 3 of the preprogrammed passive type containing an electronic identification code corresponding to the person or to any other data capable of enabling the command, for example to open a door release.

The identification system further comprises a fixed part designated by the general reference 4 playing the role of electronic lock and comprising electronic means 5 capable of recognizing the electronic code found in the key and of interpreting it in order to carry out the device control 1.

The set of memories 3 is removably coupled to said electronic means 5 by connections 6 made by contacts as has just been said.

The fixed part 4 playing the role of lock further comprises supply means in the form of a battery 7 which supplies the set of memories 3 and the electronic means 5 only when the key 2 is coupled with the lock 4 .

It will be noted that the supply voltage is preferably very low of the order of + 5 volts, the demand current remaining limited to a few milliamps so as to avoid any danger for the user.

The supply is made by a connection 8 provided in the fixed part 4 and the mobile part 2, the supply circuit being shown in FIG. 1 dotted line.

We will now describe an exemplary embodiment of an identification system illustrated in FIG. 2, system which is intended for controlling a door strike.

In the diagram in fig. 2 we find the electronic key 2 shown schematically and comprising a parallel / series shift register 9 controlled by a succession of sixteen switches 10 whose open or closed position defines one of the bits of the identification code. The switches 10 can for example be constituted by connections, part of which was initially destroyed so as to cut the electrical connection between the two terminals.

The key 2 has seven terminals intended to come into contact with corresponding terminals of the electronic lock when the key is coupled with the latter.

The terminals T referenced 11 and 12 connected together in the key 2 are intended to be connected to the ground of the system.

The terminal L referenced 13 is intended to receive a pulse for loading the code contained in the set of switches 10 into the register 9. The terminal H referenced 14 is intended to receive a succession of pulses allowing the reading of the information contained in the shift register 9. The terminals A referenced 15 and 16 interconnected in the key 2 are intended to be connected to the power supply located in the lock. Finally, the output terminal S referenced 17 is connected to the output Q of the shift register 9.

It will immediately be noted that the electronic key 2 is passive and does not include a power source. As long as it is not coupled to the lock, the shift register 9 does not include any information and its reading therefore cannot provide the identification code.

The fixed part or electronic lock also includes seven terminals identified by the same letters T, L, H, A and S arranged so that they can come into contact with the corresponding terminals of the key when the latter is coupled to the lock.

The electronic lock comprises a charging circuit referenced 18 as a whole, the input of which is connected to terminal 12 when the key is coupled with the lock, that is to say with the earth of the system and the output of which provides a charging pulse on terminal L.

The output of the charging circuit 18 is also connected by the connection 19 to the input of a reading circuit referenced 20 as a whole and supplying on terminal H a succession of pulses emitted by a clock circuit 21.

The output of the read circuit 20 is further connected by the connection 22 to the input of a read stop circuit referenced 23 as a whole, the output of which returns via the connection 24 to the read circuit 20 in order to deliver a read stop pulse stopping the emission of clock pulses on terminal H when the content of the shift register 9 has been read once, that is to say when a total number of sixteen pulses have appeared on terminal H, this number being equal to the number of bits of register 9.

The terminal S connected to the output Q of the shift register 9 receives the serial signal representing the information contained in the shift register 9. The terminal S is connected to the input of a circuit 25 performing a serial / parallel conversion and a comparison of the information read from the key 2 with an identification code preprogrammed in the electronic lock itself and constituted in the example illustrated in the form of a set of switches 26 having the same state as the 10 key switches.

The electronic lock further comprises in the example illustrated a circuit for authorizing successive tests 27 connected by an output connection 28 to an alarm device which is actuated after four successive unsuccessful tests. A circuit 29 connected to the terminals A of the key 2 stabilizes the supply at + 5 volts.

A first reset circuit 30 causes all of the flip-flops of the electronic key system to be reset to zero when the key is coupled with the lock.

A second reset circuit 31 causes all of the flip-flops to be reset to zero and the supply cut off when the key is uncoupled.

Finally, a strike control circuit 32 receives a signal when the comparison made in circuit 25 is positive.

We will now describe in more detail the different circuits which have just been reviewed.

The loading circuit 18 comprises a double master-slave flip-flop constituted by a first flip-flop 33 or "master" and a second flip-flop 34 "slave". The two flip-flops 33, 34 are connected to each other in a conventional manner, the second flip-flop 34 receiving on its input T the clock signal coming from the clock circuit 21. The output Q of flip-flop 34 is connected to one of the NAND gate 35 inputs further receiving on its second input the clock signal. The output of the door 35 connected to the terminal L of the lock is also connected to the forcing input R of the first flip-flop 33 so as to reset the latter to zero as soon as an output signal is emitted. Under these conditions we see that the charging circuit 18 provides a single pulse called the charging pulse on the terminal L.

The input T of the first flip-flop 33 is connected via the two timers 36 and 37 to the ground of the system via the terminal T when the key 2 is coupled to the lock. Under these conditions, the system therefore operates in negative logic.

The read circuit 20 is of the same type as the loading circuit 18 and it includes, like the latter, a double master-slave flip-flop 38, 39 mounted in the same way. The input T of the first flip-flop 38 receives, via the inverter 40, the output pulse from the NAND gate 35 of the loading circuit 18. The NAND gate 41 connected to the output of the second flip-flop 39 in the same way as the NAND gate 35 of the charging circuit 18, therefore provides a succession of pulses on the terminal H, these pulses being said in the following description, clock pulses.

The output of the NAND gate 41 is connected by the connection 22 to the read stop circuit 23 which includes a counter by sixteen 42 whose output Q _D is connected to the input A of a monostable 43.

The output pulses from the NAND gate 41 or clock pulses appearing on the terminal H transmitted by the connection 22 via the inverter 44 to the input HA of the counter 42 are counted until reaching the number of sixteen corresponding in the example illustrated to the number of bits of the shift register 9 of the key 2, that is to say to the number of switches 10. When this number is reached, the output Q of the monostable 43 delivers a signal output applied by the connection 24 to the forcing input R of the first flip-flop 38 of the read circuit 20 resetting the latter to zero and thereby stopping the clock pulses emitted by the circuit 20.

By this means, the reading of all the bits of the shift register 9 is therefore obtained.

The signal appearing on the terminal S and representing the identification code initially memorized by the plurality of switches 10 of the key 2, after its reading in series in the shift register 9 feeds the input E of a serial converter / parallel comprising two serial / parallel shift registers 45 and 46 included in the conversion and comparison circuit 25. To synchronize the serial / parallel conversion carried out in the two registers 45 and 46 with the reading of the shift register 9, the pulses d the clock are also applied by the connection 47 to the inputs H of the two registers 45 and 46. The comparison code preprogrammed in the fixed part or lock, materialized by the position of the sixteen switches 26, is compared with the result of the serial conversion / parallel in the circuit of comparison comprising the four comparators 47, 48, 49 and 50 connected in series and connected on the one hand to the different parallel outputs of the two conversion registers 45 and 46 and on the other hand to the different switches 26 grouped by four for each of the comparators 47 at 50.

The result of the comparison from the last element 50 is a "zero" or "one" signal depending on whether the comparison is negative or positive. The result of this comparison appearing on the connection 51 is applied to the input D of the flip-flop 52 receiving further on its input T by the connection 53 the output signal of the read stop circuit 23. When the comparison is positive , a signal is emitted by the output Q of the flip-flop 52 and transmitted by the connection 54 via the amplifier 55 to the relay 56 closing the switch 57 of the door release control circuit 32.

At the same time, the output Q of the flip-flop 52 is connected by the connection 58 to the gate NI (NOR) 59 whose output is connected to the reset reset inputs R of the three flip-flops 60, 61 and 62 of the circuit d authorization for successive tests 27 connected in cascade and connected to the alarm control 28. The input T of the first flip-flop 60 is connected to the output Q of the time delay monostable 63 receiving on its input A the output signal from the read stop circuit 23.

In the case where the comparison is negative, a zero signal appears at the input of the monostable 52 so that the relay 56 is not energized and the strike is not opened. A loading order acts however via the monostable 63 on the input T of the first flip-flop 60 which advances by one notch.

Thanks to the cascade mounting of the flip-flops 60, 61 and 62, it can be seen that four successive unsuccessful tests are authorized before the triggering of the alarm 28 by the authorization circuit for successive tests 27. The power supply stabilization circuit 29 has an input terminal 64 connected to the supply battery, for example + 5 volts contained in the electronic lock but not shown in the figure. The two terminals A intended to cooperate with the terminals 15 and 16 of the key 2 are connected via the capacitor 65 and the diode 66.

When the key 2 is coupled to the electronic lock, the current flows between the two terminals A. The switch 67 closes under the action of the relay 68 so that the current practically no longer flows through the key 2 but through the connection 69 placed in diversion. Under these conditions, the supply of the entire circuit of the electronic lock is not disturbed, in particular during possible vibrations of the key.

The electronic key further comprises in the first reset circuit 30 a monostable 70 receiving on its input A by connection 71 the output signal of the timer 36. Under these conditions, the monostable 70 reacts to a signal having an edge down on the connection 71, that is to say when the key 2 is coupled. The output Q of the flip-flop 70 is connected by the link 72 to one of the inputs of the NI (NOR) gate 73 The output signal from the NI gate 73 allows the counter 42 to be reset to zero via the NAND gate 74 and its output connection 75 l, adite gate 74 receiving on its second input by the connection 76 the output signal of the read stop circuit 23. In the same way, the output of the NI gate 73 allows by the connections 76a, 77, 78 and 79 to reset to zero by the forcing inputs R the two registers 45 and 46 of the series / parallel conversion circuit 25.

The circuit 31 for resetting to zero at the end of reading when the key is removed comprises two monostables 80 and 81 connected in cascade, the output Q of the monostable 80 being connected to the input A of the monostable 81. The first monostable 80 receives on its input B by connection 82 the output signal of timer 37 and reacts taking into account this assembly on a signal having a rising edge on connection 82 that is to say during the uncoupling of the key. The output Q of the second monostable 81 which provides a very short pulse is connected by the connection 83 to the second input of the NI gate 73 which causes, as we have seen previously, the resetting of the counter 42 and of the series / parallel conversion circuit 25. The output Q of the monostable 81 is also connected by the connection 84 to one of the inputs of the NI gate 59 so as to reset the flip-flops 60, 61 and 62 of the authorization circuit for successive tests 27 when the key is uncoupled.

At the time of uncoupling the key, the rising edge signal on the connection 82 at the output of the timer 37 applied via the inverter 85 to the input T of the flip-flop 86 causes, via the amplifier 87 connected to its output Q, triggering of the relay 68 of the supply circuit 29 so that the supply is cut off. The flip-flop 86 is reset to zero by its input R via the connection 76a connected to the output of the NI door 73 when the key is uncoupled from the lock.

It will also be noted that the NAND gate 88 receives on its two inputs respectively the output signal from the NI gate 73 via the connection 79 and the output signal from the inverter 85 via the connection 8 ₉ . The output signal from the NAND gate 88 allows the flip-flop 52 to be reset to zero by its input R by means of the connection 90 and the inverter 91 at the time of the uncoupling of the key after the expiration of the time of timer timer 37.

Fig. 3 illustrates as a function of time the signals appearing at various points in the diagram of FIG. 2. These different diagrams are referenced A to K in alphabetical order.

When the key 2 is introduced into the electronic lock, the entire system is switched on at time t as represented by curve A. The clock circuit 21 emits successive pulses as shown on curve B. The timer 36 delivers at time t ₁ a falling edge signal (curve C) which causes the monostable 70 to exit from the gate NI 73 a reset pulse represented on the curve D.

The output of the second timer 37 delivers a falling edge signal (curve E) at time t ₂ which causes the emission by the charging circuit 18 of a negative charging pulse visible on the curve F.

This loading pulse causes the emission of a succession of sixteen negative clock pulses on terminal H at the output of the read circuit 20 as shown in diagram G. The serial signal appearing on the output terminal S of the register with offset 9 is represented by the diagram H. It comprises a certain number of positive pulses corresponding to the open switches 10.

The output of comparator 50 is shown in diagram I with a rising edge at time t ₃ if the comparison is positive. The negative pulse provided by flip-flop 52 is visible on diagram J and the supply of the strike is represented by diagram K in the form of a falling edge signal.

The detailed structure of the shift register 9 of the key and of the set of switches 10 playing the role of preprogrammed memory is partially illustrated in FIG. 4. As can be seen in this figure, the switch 10a is open which, in the negative logic chosen by way of example for the circuit of FIG. 2, corresponds to a "one" signal. The 1Ob switch connected to ground is closed, which corresponds to a "zero" signal. The other switches have not been shown in FIG. 4. This figure also shows the first two flip-flops 92a and 92b corresponding to the first two bits of the shift register 9 and which receive on their inputs H the clock signals coming from the reading circuit 20 of the lock via the connection 94 connected to terminal H. The different flip-flops 92a, 92b, etc ... are connected together in cascade in a conventional manner, the outputs Q and Q of each upstream flip-flop being connected to the inputs S and R of the flip-flop immediately following so to realize the shift register 9.

Two NAND gates 95a and 96a are associated with the flip-flop 92a, the outputs of the two NAND gates being connected respectively to the input P placing the flip-flop 92a in the "one" state and to the input R placing the flip-flop 92a in the "zero" state.

The first NAND gate 95a is connected by its first input via the connection 97a to the switch 10a and by its second input via the connection 98a at the output of the inverter 99 receiving the charging pulse via terminal L.

The output of the inverter 99 is also connected by the connection 100a to one of the inputs of the NAND gate 96a which receives on its other input by the connection 10la the output of the NONET gate 95a.

The same elements assigned the reference "b" are associated with the flip-flop 92b and with the switch lOb. The same elements are also found for each following flip-flop corresponding to each bit of the shift register 9.

In the case of the switch 10a, a signal "one" is applied to the input 97a of the NAND gate 95a. In view of the presence of the inverter 99, the negative charging pulse results in the presence of a "one" signal on the second input 98a which causes a "zero" signal at the output of the NAND gate 95a. This "zero" signal applied to input 10la of the second NAND gate 96a which receives on its other input a "one" signal, causes the appearance of a "one" signal on the reset input. R of flip-flop 92a. Examination of the circuit associated with the flip-flop 92b shows that the closed position of the switch 10b causes for the flip-flop 92b a state opposite to that of the flip-flop 92a. Under these conditions, the appearance of the single loading pulse on terminal L causes the transfer of the identification code materialized by the position of the different switches 10 in the form of the state of the different flip-flops 92 which can then be read. in series by the clock signals applied to the inputs H . In the absence of a loading pulse, all the flip-flops remain in the zero state in the example illustrated.

It should be noted that the loading pulse could alternatively be suitably calibrated by a suitable circuit in the electronic lock, the pulse then only being taken into account if it corresponds to the expected calibration.

Although the identification system of the invention has been illustrated with reference to the circuit of FIG. 2 for the opening of an electric strike, it will be understood that it would be easy to adapt the system of the invention in order to achieve access control of premises or personnel management. In this case, in fact, it is possible to assign a certain number of bits of the identification code of the key to a predetermined address. One can for example assign the first register 45 of the series / parallel conversion circuit 25 a memory area corresponding to a predetermined fixed address. This fixed address after reading, is compared with a preprogrammed code in a manner analogous to that which is achieved by the comparison elements 47 and 48 of FIG. 2. In the event of a positive comparison, access to the premises is authorized by means of a door or barrier which can be opened, the name of the person and the time of entry or exit may be automatically kept by the electronic lock. The name of the user or a code corresponding to an identification information item stored after the use of the key is entered in another memory zone containing an identification code which is read by the second serial conversion register 46 / parallel.

In some applications, it may be necessary to modify the identification code contained in the key as well as the corresponding pre-programmed code contained in the lock on demand. Fig. 5 illustrates an identification system of this type making it possible to modify, sequentially at selected periods in time or after a determined number of uses of the key, the internal identification code of the latter. The circuit illustrated by way of example in FIG. 5 shows a number of circuit elements already described with reference to FIG. 2 and which therefore bear the same references. As can be seen in fig. 5 the register at shift 9 comprises 32 bits corresponding respectively to sixteen switches 10 analogous to the switches with preprogrammed position of the diagram of FIG. 2 and sixteen fuses 102 which can be destroyed in order to modify the identification code initially contained in the key 2. The various fuses 102 constituting switches which can be modified on demand sequentially or randomly can be eliminated by fusion under the action of '' a signal supplied to terminal E establishing contact between key 2 and the electronic lock. The signal supplied on terminal E comes from a write circuit 103 comprising a parallel / serial shift register 104 and an interface circuit 105. It will be noted that the direction of the shift in the register 104 is that of arrow 106 and that the interface 103 only supplies a coded signal for the bits 16 to 1 of the register 104 corresponding to the positions of the fuses 102 of the register 9.

In the example illustrated in fig. 5, the entire system is controlled by a microprocessor 107 which is capable of sending via the data bus 108 to an interface circuit 109 a code stored in the protected memory 110 which is part of the series / parallel conversion circuit and comparison 25 and which processes bits 32 to 17 of the serial / parallel shift register 111 corresponding to the bits of switches 10.

In the same way, the microprocessor is capable, via the data bus 112 connected to the interface circuit 113, of sending data concerning the key to the comparator 114 which is connected as regards bits 1 to 16 to shift register 111.

The microprocessor is also capable, via the data bus 115, of carrying out a sequential or random modification of the state of the various fuses 102 by acting through the interface 105 on the shift register 104 of the means d writing 103 as previously explained.

The different outputs of the successive test authorization and alarm control circuit 27 are connected by the connections 116 and 117 to the microprocessor 107 for the triggering of the alarm according to methods determined by the programming of the microprocessor.

The microprocessor 107 is also capable of supplying a write authorization signal on the connection 118 connected to the input of two NI (NOR) gates 119 and 120. The first NI gate 119 receives on its other input the pulse of loading coming from the loading circuit 18 via the connection 121. The second NI 120 gate receives on its second input the read pulses coming from the series reading circuit 20 via the connection 122. The outputs of the two gates 119 and 120 are connected via two inverters 123 and 124 respectively to terminal L and terminal H of the shift register 104, terminals which have the same function as the terminals of the same reference in register 9.

The system works as follows: when the key 2 is coupled with the electronic lock, a reading operation similar to that which can be carried out with the system illustrated in FIG. 2. During this operation, the microprocessor 107 does not deliver any write authorization signal on the connection 118 so that the NI doors 119 and 120 are blocked and the write circuit 103 does not work. The read operations first of all make it possible to identify the key using the fixed identification code initially contained in the switches 10. Indeed, after loading the fixed code contained in the switches 10 and the variable code represented by fuses 102 inside the shift register 9 by means of a loading pulse emitted by the circuit 18, the 32 bits of register 9 are read in series by means of the 32 pulses emitted by the read circuit 20. To do this, bits 32 to 17 of the shift register 9 transferred by the shift register 111 are compared with the fixed content of the protected memory 110. Then bits 16 to 1 corresponding to the modifiable portion materialized by fuses 102 are compared to the state of the code contained in the comparator 114. If all of these comparisons give a positive result, the microprocessor 107 provides by the bus 125 a command signal on the circuit or the member to be controlled 126.

When the read operation and the command have thus been carried out, it is possible to modify a portion of the memory area of the key 2 by breaking a number of the fuses 102. This operation can be carried out periodically according to instructions which can be programmed in the microprocessor 107. In this case, the key being coupled to the electronic lock, the microprocessor provides a write authorization signal on the connection 118 so as to change the output state of the two NI doors 119 and 120. Under these conditions, the loading pulse supplied by the loading circuit 18 is applied to the input L of the shift register 104 which allows coded information contained in the microprocessor 107 or in an additional memory to pass through the interface circuit 105 to the various flip-flops corresponding to bits 16 to 1 of the shift register 104. At the same time, the microprocessor eur 107 commands via the data bus 112 and the interface circuit 113, the modification of the code to be compared by the comparator 114. The successive read pulses emitted by the read circuit 20 are transmitted by the gate NI 120 to the terminal H of the register 104 so as to allow the reading thereof and the emission of a serial signal on the terminal E of the shift register 9 of the key 2.

The fuses 102 are chosen so that the low current applied to their terminals as a function of the signal thus supplied is sufficient to cause them to rupture according to the "zero" or "one" level of this signal.

It will be noted that the number of read pulses emitted by the circuit 20 being exactly 32, the read stop circuit 24 comprises two counters by 16, 42a and 42b.

In the simplest embodiment of the system illustrated in FIG. 5, the various fuses 102 are successively grilled from right to left in fig. 5. In a more improved variant, it is possible, according to the programming of the microprocessor 107, to effect, at each writing operation, the random breaking of a number of fuses according to a code determined by the microprocessor 107 and transmitted by the intermediary of the interface circuit 105.

It will be noted that a key which has not yet been the subject of such a modification will be recognized at the time of reading by the fact that the fixed code corresponding to the switches 10 will be suitably recognized, the modifiable part of the zone of memory being different from that contained in the comparator 114. On the other hand, a falsified key will be easily recognized by the fact that no memory zone will correspond to the information coded both in the comparator 110 and in the protected memory zone 114.

In a variant, it is also possible to use the means illustrated in FIG. 5 to cause the rupture of all the fuses 102 in a single write operation when the system detects a falsified key. This results in "destruction" of the key.

It will be understood that the write command can be programmed according to criteria determined by the microprocessor 107 for example according to a determined sequence or each time a key is used or also according to any other determined criterion.

The embodiment illustrated in FIG. 6 differs from the embodiment of FIG. 5 mainly on three points. First the fuses 102 correspond to bits 17 to 32 of the shift register 9 of the key while the switches 10 correspond to bits 1 to 16. The position of the fixed and modifiable zones of the memory of key 2 is therefore reversed. compared to fig. 5. It follows that the interface circuit 105 of the write circuit 103 cooperates with bits 17 to 32 of the shift register 104 and that the positions of the comparator 110 and of the protected memory 114 are reversed with respect to the register to offset 111 of the series / parallel conversion and comparison circuit 25.

Furthermore, the writing circuit 103 is controlled here by independent means comprising a charging circuit 127 at all points similar to the charging circuit 18, a series reading circuit 128 at all points similar to the reading circuit 20 and a write stop circuit 129 similar to the read stop circuit 24 and comprising a counter by sixteen 130 whose output Q _D is connected to the input  of the monostable 131 delivering by its output Q the reset signal to zero of the master-slave flip-flop of the read circuit 128.

The counter 130 is reset to zero by the output signal from the reset circuit 30 via the connection 132 and the NAND gate 133.

The information coded inside the counter 130 is supplied by its inputs A, B, C, D by the connections 134 coming from the microprocessor 107. In this way, it can be seen that it is possible to stop the pulses transmitted. by the read circuit 128 before the sixteenth bit is reached. In this way, it becomes possible to cause the successive rupture of the right to the left of the number of fuses 102 corresponding to the coded information introduced into the counter 130 by the microprocessor 107.

The normal reading operation of the key 2 is done as in the embodiment of FIG. 5 by means of circuits 18 and 20 whose outputs are connected to NAND gates 135 and 136 connected to their output by inverters 137 and 138 at the respective terminals L and H of key 2. The second inputs doors 135 and 136 are connected respectively to the outputs of circuits 127 and 128 via connections 139 and 140.

Note that the writing is also controlled by a signal from the microprocessor via the connection 141 connected to one of the inputs of a NAND gate 142 connected by its other input to terminal 12 of the key via the inverter 143 and supplying the first timer 36 at its output.

In the embodiment illustrated in FIG. 6, means have also been provided for supplying a rupture control signal for the various fuses 102 comprising a monostable 144 whose input Best connected to the Q output of the monostable 131 of the write stop circuit 129. The output Q of the monostable 144 delivers by the connection 145 a breaking signal of the fuses on the terminal F of the key. Under these conditions, after the write stop, that is to say after the last pulse supplied by the circuit 128 when the serial output signal from the register 104 has passed through the register 9, the monostable 144 delivers a pulse allowing to safely cause the desired fuses 102 to rupture.

Fig. 7 partially illustrates the circuit of a key adapted to cooperate with the system illustrated in FIG. 6. First of all, we find in fig. 7 in its lower part, the succession of flip-flops 92 associated with NAND gates 95 and 96, the operation of which has already been explained with reference to FIG. 4. All these flip-flops constitute, as we have seen, a parallel / series shift register, the direction of the shift being represented by arrow 146. The switches 10 shown in FIG. 4 are here replaced by the various fuses 102.

The fuse failure control is carried out by means of a second series / parallel shift register 147 constituted by a plurality of flip-flops 148 whose output Q is connected to an input of an AND gate 149 receiving on its other input by l 'through connection 150 the fuse breaking signal appearing on terminal F. The output of each of the AND gates 149 is connected to one of the terminals of a fuse 102, the other terminal of which is connected to earth by terminal T.

The direction of shift of the second register 147 represented by the arrow 151 is opposite to the direction of shift of the register constituted by the flip-flops 92. Under these conditions the inputs R and S of the first flip-flop 148p situated to the right of FIG. 7 receive via the two inverters 152, 153 cascaded the write signal appearing on the terminal E and coming from the shift register 104 visible in FIG. 6. After the various flip-flops 148 of the register 147 have been placed in the state corresponding to the signal from the shift register 104 of FIG. 6, the breaking signal of the fuses appears on the terminal F, which causes the fuses 102 to rupture, for which a signal appears at the same time on the output Q of the corresponding flip-flop 148.

The various flip-flops 148 are reset to zero by means of the loading signal for flip-flops 92 by means of the connection 154.

In the example of fig. 7, sixteen fuses 102 are shown constituting the modifiable zone of the memory of the key. For simplicity, only the right and left parts of the different elements have been shown in the figure. Nor has the figure shown the fixed part of the memory area corresponding to the various switches 10, the structure of which is identical to that which is illustrated in FIG. 4.

One could of course design a key comprising only fuses 102, that is to say a fully modifiable memory area.

Claims (17)

1. Identification system, for example of a person, for the control of an electrical device, a mechanical device or any other device comprising a mobile part comprising an electronic identification code entered in at least a preprogrammed passive type memory area, comprising at least one parallel / serial shift register and a fixed part capable of being coupled with the mobile part and comprising means for supplying electric current, electronic means for reading, recognizing and interpreting the content of the shift register of the mobile part and means of comparison with a code preprogrammed in said fixed part, characterized by the fact that said electronic means of the fixed part also comprise means (18) for supplying a pulse capable of causing the electronic identification code initially stored in the mobile part (2) to be loaded, up to the shift register (9) of said mobile part. 2. Identification system according to claim 1, characterized in that said means (18) for transmitting a loading pulse comprise a loading circuit provided with a double rocker (33, 34) of the master-slave type associated with a NAND gate (35) and receiving the pulses from a clock (21). 3. Identification system according to claims 1 or 2, characterized in that the electronic means for reading the content of the shift register (9) of the mobile part (2) comprise a reading circuit (20) provided with a double flip-flop (38, 39) of the master-slave type associated with a NAND gate (41) receiving the pulses of a clock (21) and connected to the output of the aforementioned means (18) supplying the loading pulse so as to supply successive pulses for reading in series the information contained in said shift register (9) of the mobile part (2). 4. Identification system according to one of the preceding claims, characterized in that the electronic means of the fixed part also comprise a cir read stop cooked (23) provided with at least one pulse counter (42, 42a, 42b) and a monostable (43) connected to the output of the reading means (20) and capable of delivering a pulse d stop reading when the content of the shift register (9) of the mobile part has been read once. 5. Identification system according to claim 1, characterized in that the memory area of the mobile part comprises a plurality of switches (10) whose position determines the aforementioned electronic identification code and that each flip-flop (92 ) of the shift register (9) of the mobile part is associated with one of the switches (10) whose position controls its state by means of two NAND gates (95, 96) receiving on one of their inputs the loading pulse, the first (95) of said doors being connected by its other input to the switch (10), the second door (96) receiving the output of the first door (95) on its other input. 6. Identification system according to one of the preceding claims, characterized in that it further comprises a circuit (27) for authorization of successive tests provided with a succession, flip-flops (60, 61, 62 ) whose resetting depends on the positive result of the comparison made by comparison means (25) with the code preprogrammed in the fixed part so as to authorize a number of unsuccessful attempts equal to the number of flip-flops of said succession of flip-flops before setting off an alarm. 7. Identification system according to one of the preceding claims, characterized in that it further comprises first timing means (36) connected to a monostable (70) controlling the reset to zero of all the flip-flops of the system after the mobile part (2) has been coupled with the fixed part and before the emission of the loading pulse. 8. Identification system according to one of the preceding claims, characterized in that it further comprises second timing means (37) connected to a set (31) of monostables (80, 81) controlling the delivery to zero of the set of scales of the system and cutting the current supply to the fixed part after the mobile part has been uncoupled from the fixed part. 9. Identification system according to one of the preceding claims, characterized in that the fixed part also comprises writing means (103) for modifying the state of a determined portion of the memory area of the mobile part (2). 10. Identification system according to claim 9, characterized in that the writing means (103) comprise a parallel / serial shift register (104) receiving control pulses synchronized with the read pulses of the shift register (9) of the movable part (2). 11. Identification system according to claim 9, characterized in that the writing means (103) comprise a shift register (104) receiving control pulses the number of which is determined by stop means of writing (129) independent. 12. Identification system according to one of claims 9 to 11, characterized in that the modifiable portion of the memory area of the mobile part (2) comprises a plurality of fuses (102) instead of the switches (10 ) above. 13. Identification system according to one of claims 9 to 12, characterized in that the mobile part (2) further comprises a second serial / parallel register (147) shifted in opposite directions receiving the serial signal from the parallel / serial shift register (104) of the writing means (103). 14. Identification system according to claim 13, characterized in that each flip-flop (148) of the second register (147) is connected to an input of an AND gate (149) receiving on its other input a break signal of fuse and connected at its output to one of the terminals of a fuse (102). 15. Identification system according to one of claims 12 to 14, characterized in that the fixed part further comprises means (144) for supplying a fuse failure control signal after the write stop. 16. Identification system according to claim 11, characterized in that the writing means (103) are 'associated with a loading circuit (127) provided with a double master-slave flip-flop providing a loading pulse d information in the parallel / serial shift register (104) of the writing means (103) and a read circuit (128) provided with a double master-slave flip-flop supplying a succession of control pulses to the shift register (104) the number of these pulses being determined by a write stop circuit (129) provided with at least one counter (130) cooperating with a monostable (131). 17. Identification system according to one of claims 9 to 16, characterized in that it comprises a microprocessor (107) capable of supplying write command commands in order to modify said determined portion of the area of memory of the mobile part according to a periodicity or a determined criterion.

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