DE69423077D1 - Control devices for non-volatile memory devices - Google Patents

Control devices for non-volatile memory devices

Info

Publication number
DE69423077D1
DE69423077D1 DE69423077T DE69423077T DE69423077D1 DE 69423077 D1 DE69423077 D1 DE 69423077D1 DE 69423077 T DE69423077 T DE 69423077T DE 69423077 T DE69423077 T DE 69423077T DE 69423077 D1 DE69423077 D1 DE 69423077D1
Authority
DE
Germany
Prior art keywords
volatile memory
devices
memory devices
control devices
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69423077T
Other languages
German (de)
Other versions
DE69423077T2 (en
Inventor
James R Macdonald
Douglas D Gephardt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spansion LLC
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69423077D1 publication Critical patent/DE69423077D1/en
Publication of DE69423077T2 publication Critical patent/DE69423077T2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
DE69423077T 1993-12-10 1994-12-12 Control devices for non-volatile memory devices Expired - Fee Related DE69423077T2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/166,124 US5630099A (en) 1993-12-10 1993-12-10 Non-volatile memory array controller capable of controlling memory banks having variable bit widths

Publications (2)

Publication Number Publication Date
DE69423077D1 true DE69423077D1 (en) 2000-03-30
DE69423077T2 DE69423077T2 (en) 2000-10-05

Family

ID=22601919

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69423077T Expired - Fee Related DE69423077T2 (en) 1993-12-10 1994-12-12 Control devices for non-volatile memory devices

Country Status (4)

Country Link
US (1) US5630099A (en)
EP (1) EP0657825B1 (en)
JP (1) JPH07200397A (en)
DE (1) DE69423077T2 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0158765B1 (en) * 1994-09-21 1999-02-01 모리사다 요이치 Semiconductor integrated circuit
KR0172001B1 (en) * 1995-12-05 1999-03-30 윤종용 Re-programming apparatus of bios memory
US6801979B1 (en) * 1995-07-31 2004-10-05 Lexar Media, Inc. Method and apparatus for memory control circuit
US6134622A (en) * 1995-12-27 2000-10-17 Intel Corporation Dual mode bus bridge for computer system
JPH09231130A (en) * 1996-02-26 1997-09-05 Mitsubishi Electric Corp Micro computer
JPH1078934A (en) * 1996-07-01 1998-03-24 Sun Microsyst Inc Multi-size bus connection system for packet switching computer system
JP3761635B2 (en) * 1996-07-12 2006-03-29 株式会社ダックス Memory board, memory access method, and memory access device
JPH10326224A (en) * 1997-05-27 1998-12-08 Nec Corp Digital signal processor
US6202143B1 (en) * 1997-08-21 2001-03-13 Samsung Electronics Co., Ltd. System for fetching unit instructions and multi instructions from memories of different bit widths and converting unit instructions to multi instructions by adding NOP instructions
US6625727B1 (en) * 1999-11-23 2003-09-23 Motorola, Inc. Apparatus and method for configuring a data processing system by retrieving a configuration value from storage device using reset vector and configuring parameters after reset
US7149857B2 (en) 2002-05-14 2006-12-12 Micron Technology, Inc. Out of order DRAM sequencer
JP4031996B2 (en) * 2003-01-30 2008-01-09 富士フイルム株式会社 Digital still camera with memory device
CN101031900A (en) * 2004-07-30 2007-09-05 皇家飞利浦电子股份有限公司 Data processing device adaptable to variable external memory size and endianess
US20060069896A1 (en) * 2004-09-27 2006-03-30 Sigmatel, Inc. System and method for storing data
US7757037B2 (en) * 2005-02-16 2010-07-13 Kingston Technology Corporation Configurable flash memory controller and method of use
JP2007179669A (en) * 2005-12-28 2007-07-12 Toshiba Corp Memory system
US20090157949A1 (en) * 2007-12-18 2009-06-18 Leibowitz Robert N Address translation between a memory controller and an external memory device
US10587575B2 (en) 2017-05-26 2020-03-10 Microsoft Technology Licensing, Llc Subsystem firewalls
US10353815B2 (en) 2017-05-26 2019-07-16 Microsoft Technology Licensing, Llc Data security for multiple banks of memory
US10346345B2 (en) * 2017-05-26 2019-07-09 Microsoft Technology Licensing, Llc Core mapping

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4361869A (en) * 1980-01-08 1982-11-30 Honeywell Information Systems Inc. Multimode memory system using a multiword common bus for double word and single word transfer
WO1982002808A1 (en) * 1981-02-06 1982-08-19 Ludowyk Christopher John Gating circuit
US4716527A (en) * 1984-12-10 1987-12-29 Ing. C. Olivetti Bus converter
BG39765A1 (en) * 1985-02-14 1986-08-15 Turlakov Device for connecting 8- degree and 16- degree modules to 16- degree microprocessor system
US4831514A (en) * 1986-02-14 1989-05-16 Dso "Izot" Method and device for connecting a 16-bit microprocessor to 8-bit modules
US5109494A (en) * 1987-12-31 1992-04-28 Texas Instruments Incorporated Passive processor communications interface
US5119498A (en) * 1989-06-12 1992-06-02 International Business Machines Corporation Feature board with automatic adjustment to one of two bus widths based on sensing power level at one connection contact
JPH0484253A (en) * 1990-07-26 1992-03-17 Mitsubishi Electric Corp Bus width control circuit
JPH05120124A (en) * 1990-10-11 1993-05-18 Lsi Logic Corp Built-in microprocessor type memory controlling structure
US5410674A (en) * 1991-10-28 1995-04-25 Eastman Kodak Company Circuit for controlling data transfer from SCSI disk drive to VME bus
US5471632A (en) * 1992-01-10 1995-11-28 Digital Equipment Corporation System for transferring data between a processor and a system bus including a device which packs, unpacks, or buffers data blocks being transferred
US5448521A (en) * 1993-11-12 1995-09-05 International Business Machines Corporation Connecting a short word length non-volatile memory to a long word length address/data multiplexed bus

Also Published As

Publication number Publication date
US5630099A (en) 1997-05-13
JPH07200397A (en) 1995-08-04
DE69423077T2 (en) 2000-10-05
EP0657825A1 (en) 1995-06-14
EP0657825B1 (en) 2000-02-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SPANSION LLC (N.D.GES.D. STAATES DELAWARE), SU, US

8339 Ceased/non-payment of the annual fee