DE4317152C2 - Phase shifter for adaptive array antennas - Google Patents

Description

The invention relates to a phase shifter for adaptive array antennas that are discretely optimized as Component of a phased array with digitized single element signals for training one adapted to the respective reception situation Directional characteristic is operable.

Multi-element adaptive antennas offer u. a. the pros part of an increased profit over a receipt antenna with all-round characteristics. It can continue such an antenna on a given signal situation  to adjust. The availability cheaper and faster Analog-to-digital converter implements the idea already the signals of the individual antenna elements Digitize and digitally process. Univer Signal processors are overstrained, so that only a special solution comes into consideration whose Effort should be kept as low as possible.

To train one to the respective signal situation matched directivity must the individual ment signals are added in the correct phase. It is after Monzingo, R. A .; Miller, T.W .: Introduction to Adapti Arrays, John Wiley & Sons, New York 1980, that the necessary phase shifter on analog Signals are interpreted towards.

Two representatives of this genus are delay lines and vector modulators. Reported about delay lines Grabow, W. in "Numerical and Experimental Subs Mobile Satellite Reception Circular Pola rized waves with adaptive planar antennas "; Disser D 14-34, University of Paderborn 1990.

Vector modulators are the subject of the patent application DE-A-35 11 762 of Robert Bosch GmbH Stuttgart. Even though their mode of action is analogous in nature, they are called Digital phase shifters are called because they are due their value grading via a digital codeword can be made.

These components are analogous in their effect are subject to manufacturing tolerances. With the phases shift, depending on the Pha se, in part associated with unwanted attenuation.  

Is a targeted amplitude weighting made are, so are usually additional Däm necessary. Another, well-known possibility The importance of phase weighting is that the em pfangene partial signal first with analog technology in to break down an in-phase and a quadrature component gene.

Such an approach is described in Tsui, J. B .: Digital Microwave Receivers Artech House, Inc., 685 Canton Street Norwood, MA 02062, 1989. subsequently, ßend takes place a separate analog / digital conversion the two signal components and their weighting. The Disadvantages of this method are in the aforementioned Literature site shown.

Between several possible methods for phase estimation a sampled and digitized signal - z. B. by a quadrature mixer or a Hilbert transformer in each signal branch and subsequent Weighting of the output signals - requires the solution to Klostermeyer, R .: A method for mobile em pfang of signals from direct-beam satellites, Dis sertation D 14-21, University of Paderborn, cont. Ber. VDI Series 10 No. 93, Dusseldorf; VDI-Verlag 1988 the least effort.

Here, each single element signal is initially weighted with only two factors. Fig. 1 shows the block diagram of a phase shifter such a plant nen group antenna, from which the invention proceeds.

From the book "A method for mobile reception of  Signals from direct radiating satellites ", from the series Progress Reports VDI by R. Klostermeyer, Series 10, No. 93, VDI-Verlag 1988, pages 10-15 and pages 32-44, goes a mathematical representation of the principle of a Phase shifter forth. The phases presented here shift uses the multiplication of fre offset and digitized antenna element signals with complex weight factors, causing a desired weight characteristic can be realized can. The complex weight factors are variable because they are adapted to the respective reception condition have to.

Further explanations regarding the physical Design of a phase shifter and information on Optimization of the phase transformation he required coefficients are this document but not to be seen. Moreover, on page 12 the specified document stated that the Ver processing the single element signals the division into different signal components is performed, the so-called in-phase and quadrature-phase components, because of the signal processing speed and so that the sampling rate is unnecessarily lowered.

Likewise, British document GB-2 181 907 describes a phase shifter principle, in which the Ein be broken down into square components, the after digitization using a PROM table be transformed. However, a PROM table counts the most elaborate forms of Signalstellenwirrahtun gene, so that in this way a reduction of the signal Ver processing speed can not be achieved. Also Last but not least, it adds the need for storage  at, the processing speed of the signals we to contribute significantly.

A the phase shifter principle described above Similar process is also known from US Pat. No. 4,807,171 in which the use of memory elements even if it is unavoidable.

For the sake of completeness, please also refer to the article by Proakis and Manolakis referred to in "Introduction to Digital Signal Processing, New York, Maxmillan Publishing Company, 1988, pages 875-877 (ISBN 0-02-396810-9), which describes like output signals from group antennas with help adaptive filter to edit. Information on the Ste increase in processing speed or concrete Approaches by increasing the sampling rate are out of this Reference not to be taken.

The invention is based on the object by digita le signal processing in the training of Richt characteristic of the identified disadvantages of the analog Components to avoid and the signal ver processing speeds and sampling rates too increase. In particular, distortions of the Receiving characteristic by avoidance of Manufacturing tolerances, such as the use of analog Components are known to be excluded. Furthermore, a realization form with possible little effort for the necessary arithmetic operations to find. This should also have no effect on the through the chosen chip technology and the depended on it gige gate running time given maximum sampling rate to take. The advantages of the digital controllability of the  Phase shifters should be preserved.

An inventive solution to this problem is in Claim 1 specified. Further developments of the invent The claims are characterized in the subclaims.

The invention provides a solution that an influence on the respective Empfangssitu Ation adapted directional characteristics allowed.

According to the invention, a phase shifter for adaptive array antennas, which is discretely optimized as a component of a phased array antenna with digitized single element signals to form a matched to the respective receiving situation directional characteristic is operable, such weiterge forms that the digitized A zelelementsignale by appropriate wiring of binary representative signal lines with factors. 2 ^-k , k = 0, 1, 2 ^,. , , can be multiplied such that coefficients required for a phase weighting are added or subtracted from one another by shifting the signals generated by phase shifters of more than two bits resolution and that one for a desired directional characteristic separated into real and imaginary parts before increasing weighting by means of multiplexers, which are separately adjustable for real and imaginary part of a weighted A zelelementsignals.

In this way, the invention requires Phase shifter no memory, so that the Signalverar processing speed can be significantly increased can.  

Preferably, those necessary for the weighting Additions or subtractions with the subsequent Partial signal addition together in rechenzeitgünstiger Carry-save arithmetic is performed, with the maximum realizable sampling rate only by the gate transit time a 1-bit full adder is limited.

According to claim 3 is to ensure the necessary Arithmetic operations of the phase shifter with a Memory coupled, in the register with vorausbere content is available.

Finally, according to claim 4 for each sub-signal ( 1 ) the shift and addition network ( 2 , 3 ) once, the multiplexer ( 4 ) twice, one each for the real and imaginary part provided.

The invention will be described below with reference to embodiment Examples with reference to the drawing exempla described. Show it:

Fig. 1 shows a phase shifter according to the prior art,

Fig. 2 block diagram of the entire phase shifter with the addition of further sub-signals;

Fig. 3 representation of coefficient combinations in the complex plane

Fig. 4 is block diagram of a Koeffizientenmultipli action element for adjusting the discrete optimized weighting factors e ^jn;

Fig. 5 block diagram of the extended coefficient multiplier.

The operating principle of a known phase shifter, from which the invention proceeds, can be represented by the block diagram shown in Fig. 1. There is assumed by a quadrature decomposition by a digital arithmetic unit. x _n (k) represents the signal of the n-th antenna element provided by the analog / digital converter. By the evaluation with the constants a _n = Re {e ^{j φ n} } and b _n = Im {e ^{j φ n} } is the Phasenver shift of the n-th sub-signal by the angle φ _n vorbe riding. A general multiplication is not necessary. For the phase angle φ _n to be set, the known grading of Δφ = 22.5 ° is generally sufficient. By mixing with the oscillator signal s (k) = e ^{j ( π / 2) k} , k = 1, 2, 3,. , , and connecting the low-pass filtering of real and imaginary part with a half-band filter results in φ _n phasenver pushed complex signal u (k). This represents the complex envelope of the input signal X _n (k). The half-band filtering allows a reduction of the data rate of the real and imaginary part from u (k) to half that of the filter input signal.

The addition of the signals x _n , n = 1. , , N of the individual elements of an N-element antenna, separated according to real and imaginary part, can already be done before the modulation with s (k). Thus, only the coefficient multiplier remains as a phase-determining system component prior to the summation of the individual element signals and thus must be present separately for each component signal.

The task of realizing this component with the least possible effort is achieved in a generic device by the characterizing features of claim 1, ie multiplication of digiti-based single element signal with the factors 2- ^k , where k = 0, 1, 2 ,. , , is realized by an appropriate wiring of the binary places verkör pernden signal lines, subsequent addition or subtraction of two of the signals generated by shifting to obtain the weighting necessary for the Phasenge weighting coefficients and finally Se lektion required for the directional weighting weighting separated according to Real and Imagi närteil by a multiplexer.

Such a phase shifter with its components can be joined together with the summation of the sub-signals in a computationally reasonable manner by already carrying out the additions for the phase-determining coefficients a _n and b _n in carry-save arithmetic. For this purpose, according to an embodiment of the antenna according to claim 2, each multiplexer sum and carry bit forward to the Summationsstel le all sub-signals.

A further embodiment of the invention consists in the separate addressing of the multiplexers of a partial weighting according to real and imaginary part according to claim 3. Thus, not only the necessary for a phase shift of the n-th antenna element signal coefficient combinations a _n + jb _n = e ^{j φ n} on the unit circle, but also make amplitude weightings.

For each sub-signal x _n , the Ge weight factors w _n = a _n + jb _{n are} adjustable in this way, with any combination for a _n and b _n can be realized. The amount of weight factors | w _n | = a² _n + b² _n does not always have to be in the vicinity of 1.

In addition to a possible extension of the existing Multiplexers are no further system components necessary. Compared to a pure phase weighting can also be symmetrical to a desired Sender-located disturbers are hidden.

To take advantage of the advances in memory technology, the necessary for adjusting the phase coefficient tenmultiplikation in the formation of the antenna according to claim 4 can be realized by a memory by the binary coded signal x _n (k) and the binary code of the desired phase adjustment is addressed. The corresponding pre-calculated and stored result for each combination is then read from the memory.

The necessary arithmetic operations are so through a memory access to registers with precalculated content.

For further embodiment of the invention is based on the Referenced claims.

The phase shifter proposed by this invention allows a simple circuitry Realisie tion of the task of the invention at high Sampling rates.

It can have both a phase and an amplitude set  be realized weighting.

For the amplitude weighting are - in contrast to Phase shifters for analogue signals - no additional chen modules necessary. Through pipeline processing tion and carry-save arithmetic is the maximum reali sierbare sampling rate only by the gate transit time of a 1-bit full adder limited.

Fig. 2 shows starting from the prior art be writing Fig. 1, the basic waveform of the phase shifter.

x _n (k) denotes the be prepared by the analog / digital converter be partial signal. 1 The subsequent evaluation with the constants a _n for the real part and b _n for the imaginary part ensures the phase shift of the n th partial signal 1 by the angle φ _n .

Before mixing 6 with the oscillator signal s (k) and the subsequent low-pass filtering 7 of real and imaginary närteil the addition of 5 further sub-signals x _n with n = 1. , , N of the individual elements of an N-element antenna, separated according to real and imaginary part. From this structure, it can be deduced that the coefficients tenmultiplizierer before the summation of the individual signals for each sub-signal 1 must be present separately.

The result of this signal sweep and the signal processing performed thereby is the complex signal u (k) shifted by φ _n phases.

FIG. 3 illustrates the coefficient combinations a _n + ^j b _n = e ^{j φ n} required for a phase shift of the n-th antenna signal on the unit circle.

The coordinates, which can be set for each partial signal x _n , for the signal weighting w _n = a _n + j b _n are represented by the crossing points of the grating.

Here are adjustable:

• the weighting factors w _n = e ^{j d n} for pure phase weighting, represented by points of intersection highlighted by circles;
• - Crossings of solid lines are wall without additional effort by coefficient multiplier of Figure 4 adjustable.
• - further crossing points through extended selection counter.

In Fig. 4 on the basis of a block diagram a coef e ^{j φ n} is represented fizientenmultiplizierer for adjusting the discrete optimized weighting factors.

The nine coefficients necessary for the sole phase shift are realized by shifting the following value x _n (k) by a corresponding fixed arrangement of the signal lines 2 representing the binary points and an addition 3 (not required for all coefficients ) . The multiplication with the factor -1 can also be incorporated directly into the construction as a subtraction.

The coefficients necessary for a phase weighting of the grading Δφ = 22.5 ° are reproduced in Table 1. For a given signal situation, the weight coefficients a _n and b _{n of} the n-th partial signal x _n are assigned to one of these values via the respective multiplexer 4 .

Table 2 is that through discrete optimization the coefficients caused errors over one ideal phase weighting with Δφ = 22.5 °. The values for angles not listed in Table 2 between 90 ° and 360 ° result from the specified Values by reflection on the real and imaginary Axis of the complex plane.

a _n , b _n ideal a, b discretely optimized 1.0 | 2 ° = 1.0 0.924 | 2 ° - 2 ^-4 = 0.9375 0.707 | 2 ^-1 + 2 ^-2 = 0.75 0.383 | 2 ^-2 + 2 ^-3 = 0.375 0,0 | 0 = 0,0 -0.383 | -2 ^-2 - 2 ^-3 = -0.375 -0,707 | -2 ^-1 - 2 ^-2 = -0.75 -0.924 | -2 ° + 2 ^-4 = -0.9375 -1.0 | -2 ° = -1.0

Table 1

Ideal and discrete optimized coefficients

Table 2 Error due to optimized coefficients

In FIG. 4, the displacement is symbolized by a rectangle with an arrow pointing in the direction of lower-value places. The arrow indicates the number of dual points by which the operand is moved. The multiplexer 4 selects the factor necessary for the adjustment of the directional characteristic. For each sub-signal is the shift and Addi tion network once, the multiplexer twice (one each for real and imaginary part) provided.

Fig. 5 shows the device for coefficient setting for an additional amplitude weighting. For this purpose, the signals generated by shifting the values of the input sequence, but previously only used for a subsequent addition 3 in the coefficient setting according to FIG. 4, are directly accessible. The weighted with the factors ± 2 ^-4 signal can also be used mitver, but requires an extension of the control of the multiplexer 4 by one binary digit.

The additional adjustment options compared to the arrangement of FIG. 4 are highlighted by fully drawn circles se.

Should requirements be made of an antenna, the with the presented quantization of phase and amplitude can not be met, so lets that The principle underlying the invention also a fine re quantization with correspondingly higher effort. In particular, then further additions / subtracts necessary in the coefficient setting.

Claims (4)

1. phase shifter for adaptive array antennas, which is discretely optimized as a component of a phased array antenna with digitized single element signals to form a matched to the respective receiving situation directional characteristic is operable, characterized in that the digitized A zelelementsignale by appropriate wiring of binary representative signal lines ( 2 ) with factors 2 ^-k , k = 0, 1, 2 ^,. , , are multiplied, that required for a phase weighting coefficients by shifting ( 2 ) the phase shift generated signals of more than two bit resolution are added or subtracted from each other and that one for a desired directional characteristic separated by real and imaginary part before increasing weighting by means of multiplexers ( 4 ), which are separately adjustable for real and imaginary part of a weighted A zelelementsignals adjustable. 2. phase shifter according to claim 2, characterized in that the necessary for weighting additions or subtractions ( 3 ) with the subsequent Teilsignaladdition together in rake time-saving carry-save arithmetic feasible, the maximum feasible sampling rate only by the gate delay of a 1 -bit full adder is limited. 3. phase shifter according to claim 1 or 2, characterized in that to ensure the  necessary arithmetic operations of the phase shifter with a memory is coupled in the register with calculated content is available. 4. phase shifter according to one of claims 1 to 3, characterized in that for each sub-signal ( 1 ) the shift and addition network ( 2 , 3 ) once, the multiplexer ( 4 ) twice, one each for the real and imaginary part provided is.