DE3278519D1 - Asynchronous interface - Google Patents
Asynchronous interfaceInfo
- Publication number
- DE3278519D1 DE3278519D1 DE8282305647T DE3278519T DE3278519D1 DE 3278519 D1 DE3278519 D1 DE 3278519D1 DE 8282305647 T DE8282305647 T DE 8282305647T DE 3278519 T DE3278519 T DE 3278519T DE 3278519 D1 DE3278519 D1 DE 3278519D1
- Authority
- DE
- Germany
- Prior art keywords
- asynchronous interface
- asynchronous
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0669—Configuration or reconfiguration with decentralised address assignment
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
- G06F13/4213—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US31956181A | 1981-11-09 | 1981-11-09 | |
US06/319,559 US4451898A (en) | 1981-11-09 | 1981-11-09 | Asynchronous interface message transmission using source and receive devices |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3278519D1 true DE3278519D1 (en) | 1988-06-23 |
Family
ID=26982059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282305647T Expired DE3278519D1 (en) | 1981-11-09 | 1982-10-25 | Asynchronous interface |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0079159B1 (en) |
DE (1) | DE3278519D1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5296936A (en) * | 1991-07-22 | 1994-03-22 | International Business Machines Corporation | Communication apparatus and method for transferring image data from a source to one or more receivers |
WO2007084134A1 (en) * | 2006-01-23 | 2007-07-26 | Semiconductor Components Industries, L.L.C. | Communication circuit and method therefor |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3803560A (en) * | 1973-01-03 | 1974-04-09 | Honeywell Inf Systems | Technique for detecting memory failures and to provide for automatically for reconfiguration of the memory modules of a memory system |
GB1463626A (en) * | 1974-05-01 | 1977-02-02 | Solartron Electronic Group | Data transmission system |
SE393723B (en) * | 1975-09-18 | 1977-05-16 | Philips Svenska Ab | WAY TO TRANSFER DATA BETWEEN A CENTRAL STATION AND A NUMBER OF TERMINAL STATIONS VIA A CLOSED SERIES TRANSMISSION LOOP AND FACILITIES FOR CARRYING OUT THE KIT |
JPS52117004A (en) * | 1976-03-29 | 1977-10-01 | Hitachi Ltd | Error control for loop transmission |
-
1982
- 1982-10-25 DE DE8282305647T patent/DE3278519D1/en not_active Expired
- 1982-10-25 EP EP19820305647 patent/EP0079159B1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0079159A3 (en) | 1985-05-08 |
EP0079159A2 (en) | 1983-05-18 |
EP0079159B1 (en) | 1988-05-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |