DE3122308A1 - >>Monitoring circuit for the output stage of the transmission part of a data station which is connected to a serial data bus and which transmits for a short period only<< - Google Patents

Abstract

The electronic switches (5 to 8) of the output stage of the transmission part of a data station which is connected to a serial data bus and which transmits for a short period only are connected via resistors (13 to 16) to the supply voltage source (2). The voltages (UA, UV-UB, UC, UV-UD) dropping on the resistors (5 to 8) are fed to an evaluation circuit (21) at whose output a signal indicating a fault occurs if one of the voltages (UA, UB, UC, UD) which are fed to the evaluation circuit (21) deviates for more than a pre-defined fixed time ( DELTA t) from the voltage values which are produced when the switches (5 to 8) are open. A relay (3) which disconnects the output stage of the transmission part from the serial data bus (4) at both poles in the event of a fault is connected to the output of the evaluation circuit (21). <IMAGE>

Description

The invention relates to a monitoring circuit

for the output stage of the transmitter part one with a serial data bus connected, only briefly transmitting data station according to the preamble of the claim 1.

A short circuit of electronic switches that make up the primary winding of the transmitter of the output stage of such a transmitting part permanently to the voltage source switch on or permanently short-circuit the primary winding of the transformer a great burden on the data bus, through which the other data stations signals sent on the data bus experience excessive attenuation.

The invention is based on the object of a monitoring circuit of the type mentioned to create a short circuit of electronic Switches that form the primary winding of the transformer of the output stage of the transmitter section connect to the voltage source, and in the event of a fault, the transmitting part of the Disconnects the data station from the data bus.

According to the invention, this object is achieved by the characterizing features of the patent claim 1 specified features solved.

Advantageous further developments and refinements of the monitoring circuit according to claim 1 are in the claims 2 to 7 marked.

The invention is described in more detail below and Advantages based on an embodiment shown in the drawings explained. FIG. 1 shows a basic circuit diagram of the monitoring circuit according to the invention and the output stage of the transmitting part of a connected to a serial data bus briefly transmitting data station and FIG. 2 shows the block diagram of an evaluation circuit for the monitoring circuit shown in FIG.

The same components are given the same reference symbols in the figures Mistake.

FIG. 1 shows a basic circuit diagram of the monitoring circuit according to the invention as well as the output stage of the transmitter part connected to a serial data bus briefly transmitting data station. The output stage of the transmitter part has a Transformer 1, whose primary winding la with two electronic switches a voltage source 2 can be connected. The secondary winding lb of the transformer 1 is via contacts 3a and 3b of a relay 3 with the designed as a coaxial cable serial data bus 4 connected. The electronic switch that controls the primary winding la can be connected according to the desired direction of current flow; are with the Reference numerals 5 and 6 for one current flow direction and with the Reference numerals 7 and 8 for the opposite direction of current flow. The control inputs the electronic switches 5 to 8 are provided with the reference numerals 5a to 8a. The control inputs 5a to 8a are connected to a control unit, not shown here connected, which closes the electronic switches 5 and 6 for a positive pulse and the electronic switches 7 and 8 close for a negative pulse. in the In the idle state, the four electronic switches 5 to 8 are open. An L signal consists of a positive pulse, a negative pulse and a pulse pause same length, while a 0 signal consists of a negative pulse, a positive one Pulse and a pulse pause of the same length. Choosing a pulse duration of 1/3 / us, the result is a duration of for an L signal or for a 0 signal 1 each For a positive pulse, the current flows from the positive terminal + Uv of the voltage source 2 via the electronic switch 5, a diode 9, the Primary winding la, a limiting resistor 10 and the electronic switch 6 to the negative connection 0 of the voltage source 2. For a negative pulse the current flows from the positive terminal + UV of the voltage source 2 via the electronic Switch 7, a diode 11, the primary winding 1 a, a limiting resistor 12 and the electronic switch 8 to the negative terminal 0 of the voltage source 2.

The switches 5, 6, 7 and 8 are each via a resistor 13, 14, 15 or 16 is connected to the other terminal of the voltage source 2 in each case. The resistances 13 to 16 are each significantly larger than the limiting resistors 10 and 12. The connection points of the electronic switches 5 to 8 with the resistors 13 to 16 are identified by the reference symbols A, B, C and

D called. The one on the negative terminal 0 of the voltage source 2 related potentials of points A to D are via lines 17 to 20 of an evaluation circuit 21 supplied.

The voltages UA and Uc are the voltages dropping across the resistors 13 and 15, while the voltages UB and. and the difference between the voltage Uv and the voltage drop across the resistor 14 or 16. The table below shows the various. Switching states of the electronic switches 5 to 8 summarize the values of the voltages UA to UD: Switch 5 6 7 8 open UA = 0 UB = UV UC = 0 UD = UV closed UA = UV UB = 0 UC = UV UD = 0 In addition to the voltages UA to UD, the evaluation circuit 21 is supplied with the voltage Uv and the reference potential 0.

In the evaluation circuit 21, the voltages UA and Uc are a OR element 22 directly and the voltages UB and UD via a NOT element 23 or 24 fed .. The output of the OR gate 22 is with the one Input of another OR gate 25 connected. The output of the OR gate 25 is direct with one input of an AND element 26 and with the other input Connected via a monostable toggle element 27 and another NOT element 28. Of the The output of the AND element 26 is via a line 29 and via the coil of the relay 3 connected to the positive terminal + Uv of the voltage source 2., A freewheeling diode 30 is connected in parallel to the coil of the relay 3.

Each data station can only be used within a so-called transmission frame, whose time length is fixed, send data to the data bus. To the end of the 'transmission frame are therefore in undisturbed operation, the electronic Switches 5 to -8 open. The evaluation circuit 21 are thus as follows Voltage values supplied: UA = ° UB = Uv, -Uc = 0 and UD = um. Within the evaluation circuit 21, the voltage zero corresponds to a 0 signal and the voltage UV to an L signal. There is thus a 0 signal at the output of the OR gate 22. In the following explanations it is assumed that the input SR of the evaluation circuit 21 has a 0 signal pending. With this prerequisite, there is also a 0 signal at the output of the OR element 25 at. A 0 signal is also present at the output of AND element 26, since it represents an L signal at the output of the AND gate 26 at both inputs an L signal would be required. As already explained above, a 0 signal corresponds to the evaluation circuit 21 of zero voltage, i.e. H. the output of the AND element is at reference potential. The relay 3 is energized and the contacts 3a and 3b are closed.

The terminal does not start now because of a command from here To send data to the higher-level control unit shown, is available at the output of the OR gate 22 to an L signal, since depending on the desired direction of current flow in the primary winding la of the transformer 1, two of the electronic switches 5 to 8 are closed and therefore the voltages UA and UB or Uc and UD from the one open switch deviate from the corresponding values. At the output of the OR gate 25 there is also an L signal. The monostable flip-flop 27 starts a pulse whose length is slightly longer than the length of the transmission frame. The length of this Impulse is denoted by at in the following. The output of the monostable Flip element 27 is negated by the NOT element 28, so that the AND element 26 during the duration of the pulse generated by the monostable flip-flop 27 from the OR gate 25 an L signal and from the NOT element 28 a 0 signal is supplied. So stands a 0 signal continues to be present at the output of the AND element 26.

In trouble-free operation are at the latest at the end of the transmission frame the electronic switches 5 to 8 re-opened, so that after the expiry of the from the monostable flip-flop 27 generated pulse to the AND gate 26 from the OR gate 25 a 0 signal and from the NOT element 28 an L signal is supplied is. A 0 signal is therefore still present at the output of the AND element 26.

As stated above, an L signal on the data bus consists of: positive and a negative pulse as well as a pulse pause and a corresponding 0 signal on the data bus from a negative and a positive pulse as well as a pulse pause. Since when data is being sent, the input SR of the evaluation circuit 21 has an L signal is supplied, is at the output of the OR gate 25 also in the pulse pauses Signals on the data bus to an L signal.

As an example of a disturbance, it is assumed that during transmission the data station a short circuit of the electronic switch 5 takes place. After this The sequence of the pulse generated by the monostable flip-flop 27 indicates the voltage UA has the value UV, which corresponds to an L signal for the OR element 22. So stands also at the output of the OR gate 25 an L signal, and the AND gate 26 are from the OR gate 25 and from the NOT gate 28, an L signal is supplied.

At the output of the AND element 26 there is now an L signal - correspondingly the voltage Uv - on. The relay 3 drops out and the contacts 3a and 3b are open. The secondary winding 1b of the transformer 1 is thus separated from the data bus, and there is no longer any risk of inadmissible loading of the data bus by the defective electronic switch of the output stage of the transmitter part of the data station.

As a further example of a fault, it is assumed that the short circuit an electronic switch outside the transmission mode of the data station in question he follows.

With the occurrence of the short circuit z. B. the electronic switch 5, the evaluation circuit 21 is the voltage UA = UV, corresponding to an L signal fed. This means that there is an L signal at the output of the OR gates 22 and 25 at. Until the pulse generated by the monostable flip-flop 27 has expired at the output of the AND gate 26 still a 0 signal. After the time has elapsed there is then an L signal at the output of the AND element 26, which - as described above - The separation of the secondary winding .lb of the transformer 1 from the data bus 4 causes. Since the duration at of the pulse generated by the monostable flip-flop 27 in the Practice is less than 100 / us, the short-term load on the data bus has an effect practically not off until shutdown.

The monitoring circuit according to the invention also offers the possibility of also the duration of the transmission frame signal.

for the respective data station to be monitored. This is the OR element 25 of the evaluation circuit 21 via the input SR during the transmission frame L signal supplied. In the same way as described above, arises at the exit of AND gate 26 has an L signal when the transmission frame signal longer than the predetermined time ot generated by the monostable flip-flop 27 Impulse is pending.

FIG. 2 shows the block diagram of an evaluation circuit 31, in which the impulse with the predetermined duration nt with the help of an electronic Counter is realized. The voltages UA, UB, Uc and UD are an OR element 32, which corresponds to the OR element 22 of the evaluation circuit 21 of FIG. The 'output of the OR gate 32 is connected to a NOR gate 33, the output of which with one input of a further OR gate 34 is connected. The exit The OR element 34 is connected to the reset input R of an electronic counter 35 tied together. An output Q of the electronic counter 35 is connected to the base of a transistor 36 connected, the emitter of which is connected to the line leading to the relay 3 (see FIG. 1) 29 is connected. The collector of the transistor 36 is connected to the reference potential. The output Q of the electronic counter 35 is still via a NOT element 37 with one input of an AND gate 38.

connected, the other input to the output of a clock 39 is connected. The output of the AND gate 38 is connected to the clock input T of the electronic Counter 35 connected.

The output Q of the electronic counter 35 also has an input of the NOR gate 33 connected. The other input of the OR gate 34 is via a resistor 40 connected to the reference potential and connectable to the voltage + Uv via a button 41. When the button -41 is closed, the input of the OR- Limb 34 an L signal, while a 0 signal is present when the button 41 is open. With the Evaluation circuit 31 can be monitored as with evaluation circuit 21 the length of the transmission frame signal SR. This is the transmission frame signal SR is fed to a further input of the NOR element 33.

In fault-free operation and with open electronic switches 5 to 8 is a 0 signal at the output Q of the electronic counter 35, and the Transistor 3.6. is conductive.

The relay 3 is energized and the contacts 3a and 3b are closed. It is assumed that at the input of the NOR gate 33 for the transmission frame signal SR is a 0 signal and at the output of the OR gate 32 because of the open Switches 5 to 8 also have a 0 signal, it is at the output of the NOR element 33 has an L signal. Thus - regardless of the position of the button 41 on Output of the OR gate 34 also has an L signal. The clock pulses of the clock generator 39 are fed to the clock input T of the electronic counter 35 as at the output of the NOT element 37 has an L signal. pa the L signal at the output of the OR gate 34, however, constantly resets the electronic counter 35 to its zero position, there is still a 0 signal at output Q.

If at least one of the electronic switches 5 to 8 is now closed, so there is a 32 at the output of the OR gate L signal on and on The output of the NOR element 33 is a 0 signal. With the discontinuation of the reset signal the electronic counter 35 starts counting. The output Q of the electronic Counter 35 is like this among the various outputs of the electronic counter selected, that after 28 = 256 clock pulses an L signal is present. At one frequency of the clock signals of 3MHz correspond to 256 clock pulses with a time at of approximately 85 / us. If the output of the OR gate 32 is again a 0 signal before 256 clock pulses are counted - as is the case in trouble-free operation, so is the counter reset to its zero position. The zero position is retained, until due to an L signal at the output of the OR gate 32 or an L signal of the transmission frame signal SR to the reset input R of the electronic counter 35 0 signal is supplied.

In the event of a malfunction, if z. B. one of the electronic switches 5 to 8 has a short circuit or if the transmission frame signal SR is too long Period is pending, is at the output Q of the electronic counter 35 after 256 clock pulses an L signal on. This L signal blocked transistor 36.

The relay 3 drops out and the contacts 3a and 3b are open.

At the same time, the supply of clock pulses to the clock input T. of the electronic counter 35 is interrupted because the output of the NOT element 37 is a O signal is present. The L signal that the NOR gate 33 from the output Q of the electronic Counter is supplied, causes a self-holding of the error message.

That means, even if this is the error message and the shutdown of the secondary winding Ib from the data bus 4 causing L signal at the output of the OR gate 32 or from the sender åhmen signal SR disappears again after the fault message has been triggered, the shutdown and the fault message are retained.

The counter 35 can only be reset by closing the button 41. There is then again a 0 signal at output Q.

The relay 3 is energized and the contacts 3a and 3b are closed.

L e r s e i t e

Claims (7)

Monitoring circuit for the output stage of the transmitter part of a Data station that is connected to a serial data bus and only transmits briefly Claims: Oil monitoring circuit for the output stage of the transmitting part of a Data station that is connected to a serial data bus and only transmits briefly, which has a transformer whose primary winding depends on the to sending Data can be connected to a voltage source via electronic switches and its Secondary winding is connected to the serial data bus, the two Connections of the primary winding via an electronic switch each the desired direction of current flow is connected to the two connections of the voltage source are, characterized in - that one connection of each electronic switch (5, 6, 7 and 8) directly to a connection (+ Uv or o) of the voltage source (2) and the other connection of the electronic switches (5, 6, 7 and 8) via a resistor (13, 14, 15 or 16) with the other connection (0 or + Vv) of the voltage source (2) is connected, - that the resistors (13, 14, 15 and 16) falling Voltages (UA, UV - UB, UC or UV - UD) are fed to an evaluation circuit (21) are and - that the evaluation circuit (21) these voltages (UA, UV - UB, UC and UV - UD) with the fault-free operation with open switches (5 to 8) compares the resulting voltage values, if there is a deviation, a pulse is given Duration (# t) starts and the secondary winding (lb) of the transformer (1) of the disconnects serial data bus (4) if, after the pulse has expired, that of the evaluation circuit (21; 31) supplied voltages (UA, UB, Uc and UD) from the themselves voltages resulting in fault-free operation with currentless primary winding (la) differ. 2. Monitoring circuit according to claim 1, characterized in that that the first connection (+ Uv) of the voltage source (2) via a first electronic Switch (5) and a first resistor (13) to the second connection (O) of the voltage source (2) is connected, - that the first connection (+ Uv) of the voltage source (2) via a second resistor (16) and a second electronic switch (8) with the second Terminal (0) of the voltage source (2) is connected, - that the first terminal (+ Uv) the voltage source (2) via a third electronic switch (7) and a third resistor (15) with the second connection (0) of the voltage source (2) .verbunden is that the first connection (+ Uv) of the voltage source (2) via a fourth resistor (14) and a fourth electronic switch (6) with the second connection (0) the voltage source (2) is connected, - that between the first (5) and the second (8) Electronic switches a first diode (9) and switched in the forward direction a fifth resistor (12) is connected, - that between the third (7) and the fourth (6) electronic; Switch a second diode connected in the forward direction (11) and a sixth resistor (10) is connected, - that the a connection of the primary winding (la) of the transformer (1) to the common circuit point of the first diode (9) and the fifth resistor (12) is connected, - that the other connection of the primary winding (la) of the transformer (1) with the common Connection point of the second diode (11) and the sixth resistor (10) and - that the common circuit point (A, B, C or D) of an electronic Switch and the corresponding resistor with the evaluation circuit (21; 31) is connected. 3. Monitoring circuit according to claim 1 or claim 2, characterized characterized in that a relay (3) with the output of the evaluation circuit (21; 31) its contacts (3a, 3b) are connected to the secondary winding in the event of a fault (lb) of over. Disconnect the carrier (1) from the serial data bus (4) in two poles. 4. Monitoring circuit according to one of the preceding claims, characterized in - that the fifth resistor (10) is the same size as the has sixth resistor (12) and - that the first four resistors (13 to 16) are each significantly larger than the fifth (10) or sixth (12) resistor. 5. Monitoring circuit according to one of the preceding claims, characterized in that - that the evaluation circuit (21; 31) a signal (SR) fed is that specifies the transmission frame for the terminal, - That this signal (SR) starts a pulse of predetermined duration (at) and the The secondary winding (lb) of the transformer (1) is separated from the serial data bus (4), if the signal (SR) specifying the transmission frame is still present after the pulse has expired. 6. Monitoring circuit according to one of claims 1 to 4, characterized characterized - that the evaluation circuit (31) has a counter (35), when closing one of the electronic switches (5 to 8) with a new counting process that begins when opening the four electronic switches (5 to 8) before reaching a specified counter setting, the counting process is aborted and the counter (35) is reset that when the predetermined counter position is reached, the secondary winding (lb) des.Übertragers (1) is separated from the serial data bus (4), the counting process stopped and a reset of the counter (35) when opening the four electronic Switch (5 to 8) is prevented and - that to reset the counter (35) after when the specified counter position is reached, the reset input (R) of the counter (35) an additional reset pulse can be supplied. 7. monitoring circuit .according to claims 5 and 6, characterized in that that the signal (SR) specifying the transmission frame in the sense of an OR link with the signal is linked to the closing of one of the four electronic switches (5 to 8).