DE3066708D1 - Multiprocessor system including i/o interrupt handling mechanism - Google Patents

Multiprocessor system including i/o interrupt handling mechanism

Info

Publication number
DE3066708D1
DE3066708D1 DE8080106268T DE3066708T DE3066708D1 DE 3066708 D1 DE3066708 D1 DE 3066708D1 DE 8080106268 T DE8080106268 T DE 8080106268T DE 3066708 T DE3066708 T DE 3066708T DE 3066708 D1 DE3066708 D1 DE 3066708D1
Authority
DE
Germany
Prior art keywords
system including
multiprocessor system
handling mechanism
interrupt handling
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080106268T
Other languages
English (en)
Inventor
Neal Taylor Christensen
Loo William Charles Van
Robert Helmut Werner
Joseph Albert Wetzel
Zeitler, Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3066708D1 publication Critical patent/DE3066708D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
DE8080106268T 1979-11-06 1980-10-15 Multiprocessor system including i/o interrupt handling mechanism Expired DE3066708D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/091,902 US4271468A (en) 1979-11-06 1979-11-06 Multiprocessor mechanism for handling channel interrupts

Publications (1)

Publication Number Publication Date
DE3066708D1 true DE3066708D1 (en) 1984-03-29

Family

ID=22230224

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080106268T Expired DE3066708D1 (en) 1979-11-06 1980-10-15 Multiprocessor system including i/o interrupt handling mechanism

Country Status (5)

Country Link
US (1) US4271468A (de)
EP (1) EP0028335B1 (de)
JP (1) JPS5820059B2 (de)
CA (1) CA1143852A (de)
DE (1) DE3066708D1 (de)

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Also Published As

Publication number Publication date
JPS5671130A (en) 1981-06-13
JPS5820059B2 (ja) 1983-04-21
EP0028335B1 (de) 1984-02-22
CA1143852A (en) 1983-03-29
EP0028335A1 (de) 1981-05-13
US4271468A (en) 1981-06-02

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