DE2833050C2 - Pulse Doppler radar filter arrangement - Google Patents

Description

The invention relates to a filter arrangement in the receiver of a pulse Doppler radar for suppressing unwanted clutter signals or echo signals within a certain lower and certain higher speed range of a received target object echo, which forms the response signal of radar pulses that are transmitted by the radar with an irregular pulse repetition frequency ("staggering") is emitted, the arrangement containing a first and a second digital filter, of which the frequency limit between the pass band and the stop band of the first filter is chosen so that the clutter signals fall within the lower speed range in the stop band of the first filter, but such that the desired target echo signal falls within its passband. Such "clutter signals" can be caused, for example, by the ground, the sea or rain.
One of the tasks of a radar receiver is to suppress radar echoes or so-called »clutter«, which are caused by reflections on irrelevant target objects, for example on the ground, on the sea or by precipitation (rain or snow), and only the desired moving ones To capture target object, for example an aircraft. For this purpose, the speed difference between the undesired target objects and the desired target object or objects is used. In a coherent pulse Doppler radar of known type, a pulsed high-frequency signal with a certain carrier frequency is transmitted which, after reflection on a moving target object, returns with a certain changed frequency fo ± fd , while the change fd depends on the Doppler shift, i.e. the relative radial velocity of the moving target object to the radar station. The incoming echo signal is mixed in the receiver with the carrier frequency fo , the Doppler frequency fd being obtained. If the transmitted signal (the carrier frequency fo) were not pulsed, a pure sinusoidal signal would be obtained, the frequency of which is the Doppler frequency fd . Since the transmitted signal has a pulse frequency //? = 1 IT, where T is the period time, the receiver outputs a pulsed signal which is sine-modulated, the modulation quantity having a frequency which is equal to the Doppler frequency fd . Furthermore, the received signal contains frequency components emanating from undesired targets, which leads to the

received signal is not modulated in a purely sinusoidal manner. The received and mixed in the receiver Signal thus contains a number of wanted and unwanted sequence components.

It is already known to provide filters (so-called Doppler filters) in a receiver for pulse Doppler radar devices, the task of these filters being to suppress to the greatest possible extent the frequency components emanating from the undesired target objects, mainly the low frequency components which caused by the soil, the sea and precipitation. The Doppler filter may consist of a digital filter that eliminates the components whose frequencies are lower than a certain value corresponding to a certain target object speed. Such a Doppler filter shows a certain characteristic within the frequency band determined by the period time / of the radar transmitter, which is shown in dashed lines in FIG. 1 of the accompanying drawing. It is desirable that the filter for low frequencies has a band-stop characteristic which is, for example, less than 1/8 T , the filter for high frequency values having a band filter characteristic, which leads to the result that any moving target objects whose radial velocity is greater than that of the "blemishes" can be detected. However, the use of a Doppler filter is limited by the size of the passband. If, for example, the upper frequency limit of the filter stop band is fmax ** 1/8 Γ and the period time T of the radar pulses is limited downwards by the desired range Rmax , then T = 2Rmax / c, where c is the propagation speed; the highest clutter velocity in the filter stopband is vmax = Xc / l6Rmax, where λ = radar wavelength. For example, if λ = 1 dm (the 5-band) and Rmax = 10.10 "m, then vmax << 2 m / s, which implies that only the ground clutter can be suppressed by the filter, while the remaining clutter with higher frequency components remain unaffected.

If the radar is operated in the lower PRF mode, ie the period time T is adjusted so that all radar echoes of interest are reflected and received before the next radar pulse is transmitted, this implies that the Doppler frequency fd of the target object can be greater than the pulse repetition frequency 1/7 ". As can be seen from Fig. 1, however, this means that d & t target object echo can also be suppressed by the Doppler filter for so-called blind speeds, more precisely for speeds that result in Doppler frequencies which are multiples of the frequency 1/7 " are. It is already known to prevent such target object echoes from being suppressed by introducing a so-called “graduation”, that is to say in that the period time T changes from one transmitted radar pulse to the next.

Another known method for eliminating the unwanted clutter spectrum is to to carry out a speed compensation before the sieving in the Doppler filter. This becomes the clutter speed estimated, for example by phase measurement during successive sweeps. For example, by regulating the local oscillator of the receiver, the clutter spectrum be shifted so that its dominant component assumes the value 0 and consequently within of the suppression band of the filter. In this method, however, it is assumed that the Störflekkcnspektrum has a dominant component that can be easily calculated.

The object of the invention is to provide a Doppler filter arrangement in the receiver of a pulse Doppler radar create, with which a filtering out of the low ground and sea clutter frequencies as well as a filtering out the remaining clutter with a higher Doppler frequency by means of digital filters of known design can be done.

This object is achieved by a filter arrangement of the type described in the introduction, which according to the invention is characterized by a circuit device connected to the output of the first filter is to calculate a dominant frequency component of the clutter signal within the higher Speed range and to carry out a frequency conversion of the obtained from the first filter Clutter signals such that the center frequency of the clutter signals within the higher Speed range assumes a value that is lower than the value before the overpass, where the The output of the circuit device is connected to the input of the second digital filter, the stop band of which mainly coincides with the stop band of the first filter at low frequencies, for suppression the clutter signals that are in the higher speed range prior to the overpass.

The invention is thus based on the previously mentioned known method, but shows the additional advantage that, because the calculation of the moving clutter occurs after filtering out the Eoden clutter, these snails do not affect the calculation.

Further features and usefulnesses of the invention emerge from the description of exemplary embodiments based on the figures. From the figures shows

F i g. 1 is a frequency diagram in which, on the one hand, the frequency spectrum of a received radar signal and on the other hand, a certain selected filter or sieve characteristic is shown;

F i g. 2, for explanatory purposes, is a block diagram of certain units included in a radar receiver are, these units de; Doppler filter arrangement according to the invention precede;

3 shows the principle of a Doppler filter according to the invention in the form of a block diagram;

F i g. 4 details of a digital filter of known design, which in the arrangement according to FIG. 3 is included; and

5 shows a block diagram of an embodiment of the Doppler filter arrangement according to the invention.

In the frequency diagram shown in FIG. 1, a spot frequency spectrum is shown together with the spectrum of an incoming target body echo at a certain distance from the radar station. The filter characteristic of a digital filter contained in the Doppler filter arrangement is shown in dashed lines and shows a stop band on the one hand for low frequencies, for example for frequencies <1/87 "and on the other hand for frequencies between 7 / 8Γ and MT and a passband in between.

The filter characteristic is then periodic with a period HT. The spectrum of the desired target body or target is denoted by s , and the moving clutter has a dominant spectrum s _u , the center frequency of which is denoted by f _D. The Doppler filter, the construction or design of which is explained in more detail in connection with FIGS. 4 and 5, has the task of suppressing the ground clutter spectrum sg on the one hand and the spectrum s _{D of} the dominant moving clutter, which is mainly caused by precipitation ( Rain or snow).

For a better understanding of the signal handling and the construction of the filter arrangement according to the invention, first of all, FIG. 2 describes those units that precede the filter assembly. A signal appears at input A.

AU) = cos [2 κ (fo + fd) l + φ]

from the duplexer of the radar receiver. The frequency fd is the Doppler frequency for the desired target body. The signal AU) is fed to the two channels / and Q , which each contain a mixer 51 or B1 , together with an analog / digital converter AD 1 or AD1. The mixer B or Bl 1 is supplied to a reference signal nfot cosine and sine 2 2 nfot from an Rcfcrenzozillator OSC in the receiver. Then the output signals cosine (2 nfd + φ) and sine (2 nfd + φ) are obtained, which are then fed to the analog / digital converter AD \ or AD1. In these converters, the signals for the sampling moments tn are sampled by means of clock pulses from a clock circuit CL , so that the output signals X, = cosine (2 nfdtn + φ) in channel / or X _Q = sine (2 nfdtn + φ) in channel Q can be obtained. The signals X ₁ Un) and X _Q Un) can each be represented by the signal

The sampling moments can be selected so that regular sampling is carried out, ie tn = nT (n = 1,2,3 ...), or in such a way that the time between successive sampling pulses changes within a certain time interval NT , but the same Sampling pattern reappears after the sampling moment tn = Nt , which is what is known as "staggering". In the last-mentioned case it applies that the sampling takes place at the times WVr + tk , where ν = 0.1 ... and k = 0, 1, 2, ..., NI.

The principle of the Doppler filter arrangement according to the invention is based on FIG. 3 emerges. The filter arrangement contains a first digital filter DFl of a known type, expediently a transversal filter, which is dimensioned so that it eliminates the bottom and sea clutter, so clutter at low speed or the filter characteristic of FIG. 1. Since the filter characteristic of a digital filter is periodic with a period equal to the inverted value of the sampling frequency, the stop band reappears at the frequencies corresponding to certain higher speeds and reappears periodically when regular sampling is used. If the sampling frequency changes (staggering), the characteristics of the filter DF1 are irregular, and no specific position of its stop band can be specified except for very low frequencies, which correspond to the ground and sea clutter. In the latter case, the filter DF1 cannot generally be dimensioned in such a way that clutter at very low speed (ground and sea) and clutter at higher speed can be eliminated at the same time. The input signal of the filter is with X | (in) and its output signal is denoted by y _t (tn). The block HK is connected to the output of the filter DFl , the structure of which is based on FIG. 5 will be explained in more detail. The block HK calculates the clutter that remain in the first filter DF1 after the filtering or sieving process, and performs a speed compensation of the main frequency fm of the dominant clutter spectrum. This compensation means that all frequency components of the incoming signal> ·, (tn) are changed in frequency so that the remaining moving clutter falls below a certain frequency limit, for example below the value 1/87 "in the diagram according to FIG. 1. The subsequent digital filter DFl, which is connected after the block Hd , is dimensioned according to the same principle as the first filter DFl, which is dimensioned so that its stop band coincides with the clutter, the frequencies of which have a low value (ground and sea clutter) This translates the dimensioning problem for the second filter DF1 through the use of "staggering" into the relatively simple dimensioning problem that applies to the first filter DF1. The filter DF1 thus eliminates the remaining moving clutter, and the only assumption is that that the remaining clutter have a dominant spectrum whose center freq uenz fm can be calculated in the block HK.

Each filter DF1, DF1 consists of a digital filter known per se, the design of which is shown in FIG. 4 is shown. The filter according to FIG. 4 contains a number of delay circuits, for example three circuits DL I -DL 3, each with a delay T equal to the period time of the radar pulses. The output signal of each delay circuit is applied to a multiplier MUQ -MU3 with the coefficients

oO len Z.0 (n), Ll (n), Ll (n) and L3 (n) for the filter DFl and with the coefficients K ₀ (n), K, (n), K ₂ (n), Ky ( n) for the filter DFl, the index (n) indicating that the value of the coefficients can change for the different sampling moments tn . The output signals of all multipliers are fed to an adding circuit ADD. In the following, only the version with staggering is considered, where the time interval between successive sampling pulses changes in accordance with the information given above. The regular sampling case is a special case where tn = nT.

The proposed according to the invention speed compensation of the output signal> ί Un) from the filter DFl is first described with respect to the signals, and then a suitable execution

rungsl'orm of the block HK and the subsequent filter DF1 (Fig. 3) explained in more detail with reference to FIG. In the case of staggering, the time between successive sampling pulses changes, but the change is periodic with the period NT, which means that the characteristics of the filters DF1, DF1 are repeated after the times NT, 2NT, .... If the input signal of the filter DFl has the value

the output signal of the filter DFl is:

''

y \ U _n ) = X L \ ⁿ⁾ t ^J2 "SdI'NT + ,, -,)
(= 0

~ 2-i L, e ■ "'e / '0

where r \ is the number of delay circuits in the filter DFl.

In this case it applies that the amplitude and the phase of the output signal y _t Un), represented by the factor Cn (fd), are time-dependent. The speed compensation includes that the signal y _{ Un) is divided by the signal

where fm is the result of a measurement of the center frequency of the dominant clutter spectrum behind the filter DF1 . The following applies:

C (f)

^ n \ Jm /

The output signal of the filter DFl is given by

n) T

where rl is the number of delay circuits in the filter DFl. The expressions for ^ ₁ (/ n), x ₂ (in) and y ₂ U ") show that:

a) if the Doppler frequency fd »0, the signal in the first filter DFl can be eliminated because Cn (fd) « V u »i = ο

can be done

b) if the Doppler frequency fd 40 and a correct calculation of this frequency of the dominant Störricckcnsprum in the block HK , ie fm « fd, the input signal of the filter DFl the value

X ₂ Un) = eJ ² "<f ^ä -f ^m >< ^vN +"> ^T

, whereby a signal with a low frequency is represented, which can be eliminated in the filter DFl in the same way as the signal e · ^'21 ^ "' which was eliminated in the filter DFl for fd = 0.

To calculate the filter coefficients L / ¹ " ¹ and Κ \ ^η) , the following requirements are placed on the output signals j», (tn) and y ₂ Un) :

y _{ (tn ) «0, if the incoming signal consists of ground clutter, ie f ₀ » 0. It is specifically required that /, (tn) = 0, because / ß = Af _K , K = \, ... r ^ .Af _K is chosen within the frequency range of the ground clutter spectrum. This requirement can be met by making the following choice: 6ü

A '= 1, ... Γ | Ι

η ■ = 1, ... N 65 I

ie filter DFl eliminates the ground clutter. The equation Cn (Af _k) = 0 leads to the following The same §

system for calculating the filter coefficients Z,! " ¹ : h

V " £ JK

/ -0

If Af _K is chosen to be symmetrical about the frequency 0, then the notations given above lead to real and time-dependent coefficients L ', " ¹ .

The signal y ₂ (t “) » 0 if the input signal consists of moving clutter with the frequency f _d . The center frequency of the clutter was measured to be f _m » f _d. In particular, it is required that y ₂ (/ „) = 0 door fo ~ fm ⁼ 6f _K , K = 1, ... r ₂ . δ f _K is then chosen so that / n _{, + öf K} lies within the frequency range of the moving clutter. This condition gives the following system of equations

2 ^C l (/ + tfA) - / 2 _r . _dA . . ,. Γ = 0 A "- I. ... r.

2 ^ _e

, · 0 C "- \ (fm)

for the determination of the filter coefficients K \ "K

F i g. 5 shows a block diagram of an embodiment of the in FIG. 3 shown blocks HK for obtaining a speed compensation, together with the two filters DFl, DFl. From the expression for JC ₂ (in) it follows from the above explanations that the compensation with respect to the signals is carried out by dividing the output signal y _x (tn) from the filter DF1 by the factor

Cn (fm) e ' ^{2 rfm [} ' ^{s +} "' ^r , where fm represents a calculated value of the center frequency of the dominant spectrum sd of the moving clutter. A signal Re {y _{ (tn)) am / - is obtained from the filter DFX. channel and a signal in y \ (tn) at the Q-channel received. each channel /, Q is a phase measuring circuit FK connected to the phase difference Δ φ between two successive filtered samples to be measured. This is done in a known manner by first two components of the sample are measured in the / -and Q channel, where a value of the phase angle _φ ι relative to a certain reference value is obtained. Thereafter, in the same way the phase angle φ ₂ door the next sample measured and the difference Αφ = ψι ψ ~ \ formed. tn for each graduation sequence samples are obtained, η between two successive sieved or filtered samples ^ a sequence of phase differences Δ φ, yield (tn). This sequence Δ φ η wi rd for the received phase difference values A φ η during the time period NT, which corresponds to a complete graduation sequence, is supplied to an accumulator 5. The accumulator is known per se and can for example consist of a feedback summation device. Ml and Ml designate two memory units, for example PROMs (programmable read-only memories). The memory Ml consists of a matrix in which the values of the coefficients Cn (fm) are written for different values of the phase difference A φ and for different values of tn in the graduation sequence. Tn for each pair of values, that is, a certain value of the coefficient Cn (fm) A φ is obtained, since fm is calculated from the value Αφ = 2 π T ■ fm, where T is known.

The memory unit M1 consists of a matrix in the form of a PROM in which the sine and cosine values are listed for different angles φ , these angles being obtained from the accumulator 5. The memory unit M 1 has only one output at which the value 111 Cn (fm) \ appears, but two inputs at which the input value Δφ and the clock pulses c 1 appear, the latter at the sampling times tn in each interval vNT.

The storage unit Ml has a / - and Q output at which the values - sine φ and cosine φ appear, where φ is the accumulated phase. A multiplier MU is connected to the two outputs of the unit Ml and the output of the unit Ml, by a factor of I WCn (/ m) LMIT or the sinus. multiply by the cosine values of the accumulated phase. Two components consequently appear at the / - or the Q output of the multiplier MU

- sine φ . Cosine φ

^ZW '

which are required to get the complex value

Cn (Jm)
to build.

Corresponding to the description above, with regard to signal handling, the factor

Cn (fd) ■ eJ ² - "" ·· * ⁷ "+ '" ¹
for speed compensation with the factor

1
Cn (fm)

must be multiplied. The complex multiplier MK, which is connected to the output of the filter DF1 and to the multiplier MU , carries out these complex multiplications, since the / - and Q components of the complex factors are available as signal values on the respective channel. So be and the (^ output of the multiplying MK the corresponding signal components from - where /

χ, (Ι η) =

JΛΐ . , 2 .τ (./i/ -Vm) UNT Y ι »)

CJfJ

obtained, namely the above.

The filter DF1 contains a digital transversal filter DFA in FIG. 4 design shown. In order to achieve good interference leakage suppression within the entire speed range, it is generally necessary to select different filter coefficients A ^ "'for different measured frequencies fm . The filter coefficients K *" ¹ are determined from the relationship given above.

A memory unit MF is connected to the multipliers contained in the filter DFA , for example in the form of the PROM, in which the coefficients K \ ⁿ⁾ for each value of A φ and each point in time tn are written in matrix form. For this purpose, the memory unit MF is connected with its two control inputs on the one hand to the output of the phase measuring circuit FK, at which the value of Δ φ appears, and on the other hand to the clock pulse generator (not shown), which generates the clock pulses el at the right time with the graduation sequence in (within every interval ν NT) . The values of the coefficients K \ "\ which depend on A φ and in are applied to the multipliers in the filter DFA , and the quadrature components of the desired filtered signal ^ ₂ {in) appear at the outputs / and Q of the filter.

The filters DFl, DFl are, as mentioned, according to FIG. 4 trained. However, this figure only shows the layout for one channel, for example the / channel, and the multipliers MUQ-MUl multiply the signal components of χ, (tn) and x ₂ (tn) in this channel by the corresponding components of the coefficients L) "' and K \'". The corresponding filter circuits are contained in the other channel Q , and in the complex multiplication in the multipliers MUO-MU1 the values in the channels / and Q are mixed with one another. The filters DFl, DFl have a given passband for a given order (determined by the number of delay circuits DL I-DL 13), the width of which can be expanded in a known manner by choosing filters with a high order.

25th

For this purpose 2 sheets of drawings

Claims (3)

Patent claims: 1. Filter arrangement in the receiver of a pulse Doppler radar to reduce unwanted clutter signals within a certain lower and a certain higher speed range of a received target object echo, which forms the response signal of radar pulses that is transmitted by the radar with an irregular pulse repetition frequency ("staggering"), the arrangement including a first and a second digital filter, of which the frequency limit between the pass and stop bands of the first filter is selected so that the clutter signals fall within the lower speed range in the stop band of the first filter, but such that the desired target object echo signal falls in its pass band, characterized by a circuit device (HK), which is connected to the output of the first filter (DFl) , for calculating a dominant frequency component (fm) of the clutter signal within the higher speed B range and to carry out a frequency transfer of the clutter signals obtained from the first filter (DF1) in such a way that the center frequency of the clutter signals within the higher speed range assumes a value which is lower than the value before the overpass, whereby the output the circuit device is connected to the input of the second digital filter (DFl) whose stop band mainly coincides with the stop band of the first filter (DFl) at low frequencies, to suppress the clutter signals that are in the higher speed range before the transfer. 2. Filter arrangement according to claim 1, characterized in that the circuit device has a phase measuring circuit (FK) for determining a sequence of phase differences (A φ η) between two consecutive and in the first filter (DFl) filtered samples for each sequence of transmitted radar pulses, one first memory unit (Ml) for the formation of the inverted value of the coefficients (Cn), which are equal to the sample values of the output signal (y, (in)) of the first filter, which correspond to a certain phase difference, a multiplier circuit (AfAT), which between the first and second filter (DFl, DFl) is placed and connected to the memory unit (M 1) for multiplying the output signal by the inverted value, and contains a second memory unit (MF) which is connected to the phase measurement circuit and to the second digital filter for storing the coefficient values (K \ " ^] ) belonging to the second filter (DF1) for each P measured phase difference and for each sampling moment (in) within a grading sequence. 3. Filter arrangement according to claim 2, characterized in that the multiplier circuit (MK) consists of a complex multiplier with two input pairs, each pair of which corresponds to the I or Q channel of the radar receiver, that the first input pair with the output of the first Filters (DFl) is connected, that an accumulator (S) is connected to the output of the phase measuring circuit (FK) for forming an average value (φ ) of this sequence of phase differences (A φ n) , that a third memory unit is provided for forming the sine - And cosine values of this mean value and that a further multiplier (MU) is connected to the first memory unit (M 1) and to the third memory unit (M 1) for multiplying these sine and cosine values by the inverted value, the multiplied values being dem second input pair of the complex multiplier to the assigned channels / or Q are fed.