DE2251926B2 - Control device for a selectively operating electrophotographic copier - Google Patents

Description

The invention relates to a control device for a selectively operating electrophotographic copier with a moving recording material and with several work stations, in which originals are successively fed to an exposure station and in that of markings on the templates Selection control signals for the control of the transfer station be derived.

From the DT-AS 10 99 241 is a selectively working known electrophotographic copier in which such a control device is used. at In this known copier, originals which carry coded information come to a first Scanning station where this information is scanned. They then go to a second scanning station in which the image to be reproduced or the information is scanned by means of optical devices and an electrostatic latent image is formed on the recording material. The one in the first Scanned information is sent to a comparison device, from which a pulse is issued when an original is not to be copied. This pulse is sent to a magnetic drum recorded with the help of a write head. The magnetic drum is with the drum-shaped recording material rotationally connected. A read head is used to test whether the magnetic drum a signal has been registered or not. When a signal is detected, it is fed to the transfer station, in which a tape-shaped image receiving material is brought out of contact with the surface of the recording material. The transport of the tape-shaped image receiving material is interrupted. There is no further signal from the read head detected, the transmitting station is in the Controlled state in which image transfer is possible and the tape-shaped image receiving material is set in motion again

The disadvantage of this known copier is that a magnetic drum is used to in Control the transmission station depending on the signals registered on it. That kind of control is very complex, since both a magnetic drum and a read and write head are required. the The use of a magnetic drum as a signal memory is very susceptible to failure, as it is already due to low levels of contamination the magnetic drum surface the reliable reading of a registered signal is called into question. Especially in copiers, in which contamination from toner particles can easily occur special measures are required to avoid contamination of the magnetic drum surface.

Another disadvantage of this known copier is that regardless of whether a If the original is to be copied or not, a latent image is produced from this and then developed will. As a result, images that are not transferred to the image receiving material are also developed should. This results in a waste of the toner material.

It is therefore the invention to develop the control device mentioned at the outset in such a way that it has a has a simple structure, is less susceptible to interference, and enables a more versatile control of the copier.

According to the invention, this object is achieved in that the selection control signals are one by clock pulses switchable, multi-stage circuit arrangement are supplied that at the outputs of the individual Levels of control signals can be derived that the timing of the operation of the workstations during correspond to a copy cycle and that depending on the selection control signals occurring at the stage outputs the workstations are controllable.

The invention creates a control device which makes it possible without major The effort to control the various workstations required to make a copy. There one switchable, multi-stage circuit arrangement is provided, which is switched on in such a way that the on the outputs of the individual stages occurring control signals the timing of the actuation of the Corresponding workstations during a copy cycle, there is no risk of sine Pollution a malfunction of the control occurs.

In an advantageous development of the invention, a first group of stages of the multi-stage circuit ^{arrangement is assigned to a number of image positions i r} > along the path of movement of the recording material between the exposure station and the exit point of the developer station, and the outputs of the first group of stages are connected to a first circuit arrangement wherein at the output of the first circuit arrangement, when at least one control signal is present in the first group of stages, a signal can be derived by means of which the developing device can be switched on or its switched-on state can be maintained.

This advantageous development of the invention ensures that a electrostatic latent image is only developed when a copy is made target. In the above-mentioned copier, an electrostatic latent image of each original is on the Recording drum generated and then developed. As a result, it becomes a much larger one Amount of toner required than if only those images are developed which are subsequently on one Image receiving material is to be transmitted.

Another advantage is that the cleaning station, in which, after a transfer, remains Toner located on the recording material is removed, is less stressed, since by the Cleaning station no surface areas of the recording drum are performed, on which the entire applied in the development station is Toner is located.

Further advantageous embodiments of the invention are specified in the subclaims.

Details and advantages of the invention emerge from the following description of an exemplary embodiment on the basis of the drawings. It shows

F i g. 1 is a schematic representation of a selective working electrophotographic copier,

F i g. 2A to 2D present a control device for generation. Selection control signals from the markings of the Templates,

F i g. 3 a scanning and selection circuit which is used in the copier according to FIG. 1 can be used, and

F i g. 4 is a schematic circuit diagram of a control device according to the invention, which in the Copier according to FIG. 1 is used.

In Fig. 1, a selectively operating electrophotographic copier is shown schematically, in which the electrophotographic process known from US Pat. No. 2,297,691 is used. The copier has a continuously rotating photoconductive drum 20, along the circumference of which a loading station G, an exposure station C, a development station D, a transfer station E and a cleaning station F are arranged.

The photoconductive drum 20 is shown in the example as a simple drum with two layers, an insulator 31 and a conductor 32. Since it is not the subject of the invention, it is sufficient for that Understanding to mention that when using the selective copier with conventional electrophotographic Method operated, the conductor 32 is made of any suitable conductive material or of may consist of a dielectric with a coating of a conductive foil. The isolator 31 can be made from consist of a material which has photoconductive properties, so that the insulator 31 insulates normally and has a special ability to hold charge by exposure to electromagnetic radiation but becomes selectively conductive. The electromagnetic radiation can appear as a chiaroscuro pattern too to be copied. Reflective exposure can also be used. The for Materials used for the insulator 31 may be any of those commonly used in electrophotographic processes used can be selected.

The charging station G can comprise one or more charging devices of a conventional type, which in the known manner sensitize the photoconductive drum 20 by charging the surface of the insulator to a uniform potential. For example, a charging device can be provided in the charging station G , as described in US Pat. No. 2,588,699 or US Pat. No. 2,836,725 and 2,879,395.

The exposure station C on the drum periphery has a conventional form of projection device 33 in which optical imaging technology is used to successively image a light and dark pattern of each data card 1 of a stack of cards on the surface of the insulator 31. In Fig. 1, a slit exposure device 34 is shown, but any other optical system containing lenses or the like can also be used. In the embodiment shown, the exposure station C is arranged in such a way that the rotating photoconductive drum 20 is first sensitized in the charging station G and then exposed in the station C, but the process steps of charging and exposure can also be carried out simultaneously, for which purpose the spatial arrangement the exposure station C and / or the charging station G changes accordingly. Furthermore, in the example according to FIG. 1, there is only a simplified method

shown with a single charging step and a single exposure step; it can however, additional electrophotographic process steps can also be used, for example a second Charging to form the electrostatic latent image, or the electrostatic latent image can be after the formation can be reversed or otherwise changed using additional process steps, such as this is familiar to the person skilled in the art.

The development station D has a reservoir 35 which is suitable for portions of the photoconductive Drum 20 with the cascade development process or the like in the manner known to those skilled in the art to develop. The reservoir assembly 35 can be driven by a motor 24 and one of the be common devices as commonly used in the electrophotographic development technology are deposited on the image area in the selective pattern of the charged, fine particles called toner to deposit previously formed electrostatic image.

The transfer station E contains a charging device 30 which serves to apply a certain charge to a part of an image receiving material in the form of a copy tape 9 near the drum 20, thereby to transfer a toner image from the surface of the photoconductive drum 20 to the copy tape 9 effect when the latter has applied to the drum. The copy strip 9 can be made of a suitable copy material, for example paper, plastic or other materials serving as copy material. The same devices as for the charging station G can be used as the charging device. Any charging device which is able to apply a certain level of charge to the surface of the copy tape 9 can be used for the transfer station E. The charger 30 of FIG. 1 is connected to a potential source, for example a conventional direct current source.

The cleaning station F can be a conventional cleaning device, for example in the form of fur brushes, Wipers or cascade cleaning agents contain which, in a known manner, remove the remaining toner from the Surface of the photoconductive drum 20 removed. Since the expert is aware of the possibilities for this, it is sufficient to state that the cleaning station Fso operates to remove the residual toner particles from the surface of the photoconductive drum 20, and thus makes it ready for reuse.

The remaining components of the selective copier of FIG. 1 are described below in Explained within a general description of the function of the copier.

Several data cards, some of which are to be selectively copied, are stacked on a feed tray 2 and from there are conveyed one after the other with the aid of an infeed roller 6 through a scanning station and a projection system 33 to a stacking base 49. Two laterally offset collars 10 and .Mi 10 'are mounted coaxially on the drive shaft 5 of the infeed roller 6. Each collar 10 and 10 'has an adjusting screw 19 or 19', so that it can be displaced in the lateral direction on the drive shaft 5 and can be adjusted about the latter in the direction of rotation. Coaxial time slices 4 and 4 'are attached to the collars 10 and 10'. b ^r . In addition, a collar 11 is attached to the collar 10 and a collar W is attached to the collar 10 '. The collars 11 and W also have adjusting screws 21 and 21 'for lateral adjustment and setting in the direction of rotation on the collars 10 and 10'. Time slices 3 and 3 'are attached to the collars 11 and 11'. A light source 7 is fixedly attached between the pane combinations 3 and 4 and 3 'and 4'. A light-sensitive device 8 is arranged on the side of the pane combination 3, 4 remote from the light source 7; on the side of the pane combination 3 ', 4' remote from the light source 7 there is a further light-sensitive device 8 '. With each revolution of the infeed roller 6 in the clockwise direction, the open inclined slot, see FIG. 2B, light rays from the light source 7 to the photosensitive device 8 fall. With each such revolution of the infeed roller 6, the open inclined slot Θ ', see FIG. 2C that light from the light source 7 reaches the light-sensitive device 8 '. The photosensitive device 8 constitutes part of a clock generator 70 of the FIG. As will be described in detail in the context of the function of this circuit, the light-sensitive device 8 generates a dark edge control pulse for each revolution of the infeed roller 6, the duration of which is determined by the deviation between the leading edge of the time slice 3 and the trailing edge of the time disc 4 (360-Θ) is determined when the infeed roller 6 rotates clockwise. The light-sensitive device 8 'represents part of a selective clock generator 98, which is also shown on the basis of FIGS. 4 will be described and which generates a clock pulse with a duration which is determined by the interval (360-Θ ') which is determined by the leading edge of the disc 3' and the trailing edge of the disc 4 'for each revolution of the infeed roller 6 in Clockwise is formed. Since the relative positions of the disks 3 and 4, as well as 3 'and 4' are such that the angle θ is smaller than the angle Θ ', and since the leading edge of the disk 3 of the leading edge of the disk 3' by an angle Φ , see Fig. 2D, in advance, the pulses generated by the photosensitive device 8 are obviously synchronized with the pulses generated by the photosensitive device 8 '; however, the former are of shorter duration and lead the pulses generated by the light-sensitive device 8 'by the time span which the disk 6 needs to traverse an angle of Φ °. As shown in FIG. 4, the energization of a one-turn clutch 15 is controlled by the leading edge of the clock 70 and the selective transmission device 25 is immediately thereafter set in motion by the pulse generated by the clock 98 so that the copy tape 9 is set to the speed of the photoconductive drum 20 is brought before it comes into contact with the toner image on the drum 20 in the transfer station £.

On the way of the data cards 1 from the insertion tray 2 to the stacking base 49, a scanning station B is arranged at a point in front of the slit exposure device 34 of the projection system 33. At this station B , the scanning and selection circuit of FIG. 3 scans the coded information on the data card 1 and delivers to the control device of FIG Data cards in station B can be queried. Each such signal is only a pressure signal if certain

selected preconditions are met, which in the sampling and selection circuit of FIG. 3 are determined by the state of the selection modules. These preconditions must be fulfilled by the coded information which is read from the data card associated with this signal, namely by establishing that special coded information is present on the card and possibly that other special coded information is missing on the card. This signal is usually derived simultaneously with the scanning of the data card to which it relates in the scanning station B and appears at the output of the inverter and buffer stage 69 of FIG. however, it is used by the control device of FIG. 4 in a controlled time sequence for various coordinated control functions of the various elements of the selective printing device of FIG. 1 used. The circuit of FIG. 4 receives these signals and shifts them sequentially through several stages so that there is an immediate correspondence between the stage to which a particular signal has advanced and the position in which the image on the photoconductive drum 20 moves who heard the signal has continued to turn. The signal (print or jump) in a certain stage can therefore be used by the logic circuit connected to this stage to control the functions required at the corresponding position of the associated image.

In order to enable the described mode of operation, a card edge detector 50 is provided which generates a pulse when the leading edge of each data card 1 comes into the scanning station B; In this station there are also several scanning elements 50-5OC which are set so that they read out the precoded information on each data card when it reaches station B. In this context, it should be noted that the data cards in the illustrated embodiment have a format that has a series of identical bit positions that are perpendicular to the direction of travel of the card and are used to precode the cards with a specific code that relates to the Obtains visible receipt information from the data card. In this way, by selectively marking special bit positions in a known manner, the precoded information can be read out at the scanning station B while the bit positions of the data card pass the scanning elements 50-5OC. So that the scanning elements 50 / 4-50C only perform scanning in station B during the period in which the bit positions of the data card entering station B are located directly on the scanning elements, the scanning and selection circuit of FIG. 3 uses the mentioned pulse from the card edge detector to provide a periodic scanning function which is delayed by the same amount of time that each data card needs to get from the point where its edge was detected to the point where the bit positions on the data card are located directly on the sensing elements 50A-50C.

Various alternative map formats with regard to the bit positions and selective rearrangements of the spatial position of the scanning elements 50 / 4-5OC are known to those skilled in the art. When the sampling and selection circuit of FIG. 3 is modified in such a way that a single scanning element carries out the scanning one after the other instead of the simultaneous scanning by several scanning elements, then has a palendes data card format for the bit positions on a column of bit positions which is aligned in the direction of the card advance, including a clock track or a external clock must be provided.
When the data cards run in a sequence from the scanning station B through the projection system 33 to the stacking base 49, optical images of the receipt information of each data card pass the slot exposure device 34 and are successively with the help of a

ίο mirror and lens arrangement of the projection system 33 is projected onto the surface of the photoconductive drum 20. Since the drum 20 rotates at a constant angular velocity in such a way that its surface moves at the same speed as the data cards pass through the exposure device 34, latent electrostatic images of the receipt information of the data cards are formed on the successive fields of the drum 20, while the cards pass through exposure station C. In addition, since each data card scanned in station B needs a certain period of time to get from station B to the slit exposure device 34, and since the various stations on the circumference of drum 20 have fixed spatial distances from one another and the drum rotates at a constant angular velocity, progresses the mentioned print or jump signal for each data card advances in time and creates a specific time relationship between the formation of the electrostatic latent image belonging to the data card and the subsequent process steps relating to the field on which the image is formed during this field moves through the various circumferential stations D, E, F and G.

As will be described in more detail with reference to the control device in FIG. 4, the print or jump signals for the scanned cards are used by the circuit to provide several logical and control functions through which an optimally coordinated operation in the development station D and the transfer station E is achieved. As explained in a simultaneously filed US patent application, these pressure or jump signals can be used to achieve further operational advantages with the aid of a novel melting device. Since such a melting device is not necessarily part of the device according to the invention, but only an expedient embodiment that is used in the system according to the invention

so, if the toner is to be fixed, it will only be mentioned here in general.

Selective copiers, which form electrostatic latent images for each scanned card, but transfer only selected images, have had problems with background toner deposition and excessive use of toner in the development stations. A background overlay with toner often occurs with such printers because they are placed one after the other on the rotating drum

bo shaped latent electrostatic images in the Development station are all developed one after the other, and then only some selected ones of the developed ones Images are transferred in the transmitter station. Therefore, the cleaning station must be in such a

b5 doesn't just take the remaining toner out of the printer But also remove image fields from which the toner was transferred in the transfer station all the toner from the image fields from which

no toner was transferred in the transfer station because a jump command for these image fields was present. Since all cleaning stations remove all the toner from the Image fields do not work optimally, accumulates on the background in the image fields, which with some Drum rotations are skipped, the toner gradually increases.

In order to keep the unnecessary use of toner and the background coverage with toner as low as possible, the aforementioned print or jump signal is activated for each data card by the control device in FIG. 4 is used to set the motor 24 of the developing device in motion before the arrival of an image field which carries an electrostatic image of a data card with a print command and to keep it in operation only as long as such an image field which can be identified with a print signal resides in the chamber of development station D The reservoir assembly 35 thus operates intermittently to reduce the number of electrostatic latent images which are developed in station D and whose toner is not subsequently transferred to the transfer station because it has been instructed to jump. Since such intermittent operation of the reservoir assembly 35 ensures the development of at least all of the latent electrostatic images which are subsequently transferred in station E and also reduces the unnecessarily developed images, the consumption of toner is reduced and at the same time the accumulation of toner on the background is reduced , thereby increasing print quality and reducing costs.

In order to achieve a selective image transmission in station E in accordance with the print or jump commands of the control device of FIG. 4, the selective copier of FIG. 1, a selective transfer mechanism, a drive for the strip and a strip retention mechanism. The selective transmission mechanism comprises two parallel T-beams 36, only one of which can be seen. Its horizontal web is connected at one end to an anchoring element 37 in such a way that a pivoting movement about a fixed axis which runs parallel to the axis of rotation of the drum 20 is possible. A shaft extending parallel to the axis of rotation of the drum extends between the central parts of the T-beams. A roller 25e is rotatably arranged on this shaft. A stripping rod 25 / (this is not shown) extends parallel to the axis of rotation of the drum 20 between the ends of the horizontal webs of the T-beams 36, which are furthest away from the anchorage 37. The vertical sections of the T-beams 36 are Connected to one another via a cross support (this is not shown). A bistable drive 25Λ, one end of which is attached to the transverse support and the other end of which is rigidly fixed, has a normally energized solenoid 27 which controls the selective transmission mechanism 25 (and especially the roller 25e for the strip) in one of the surface of the Drum 20 holds the lifted position, as well as an expansion spring 28, which pivots the selective transmission mechanism when the solenoid 27 is de-energized at high speed in an arc up to the drum 20. The drive mechanism for the strip in the present embodiment is in the form of a one-turn clutch 15, a pin wheel 16 for strip feed, the intermittent rotation of which is controlled by the clutch 15, and an alignment roller 17 for the strip. The strip retention mechanism is in the form of a friction lock 18. The clutch 15 is such that it rotates a fixed, predetermined amount when energized by the leading edge of a pulse derived from the clock 70. Accordingly, when the clutch 15 is energized, the pin wheel 16 is rotated by a fixed amount and causes the copy strip 9 to travel a fixed distance during each individual cycle of the machine of, for example, 332 ms duration. Preferably, the step of moving the copy tape 9 for each machine cycle is made equal to the size of the developed image to be transferred. As a result, the images can be printed out next to one another on the copy strip 9 in a space-saving manner.
As shown in FIG. 1, the strip 9 is guided in such a way that it runs from a supply roll 13 through the friction lock 18, around the roll 25e, then under the stripping rod 25 / and through a melting device 40, if the toner is to be fixed, then further around the Alignment roller 17 and pin wheel 16 in a receiving trough for the strip. This arrangement normally maintains the strip in a constant state of relatively high tension (e.g. 226 g) whether the strip is moving in preparation for transfer or during selective transfer of the developed image at station E itself, or remains stationary during a jump condition, and also regardless of whether the transfer tape 9 moves towards the drum 20 before the transfer or after the transfer is complete

J5 removed from the drum again.

The operation of the selective transmission mechanism 25 shown in FIG. 1 is shown below briefly presented. As already mentioned, the control device of FIG. 4 several stages into which the

Pressure or jump signals in direct correspondence with the special spatial positions of the associated images are moved on the drum 20. At the point in time when a developed image, to which a pressure signal is assigned, a position

reached, which flies something in front of the transmission station, the associated pressure signal is switched through to a certain stage to which a logic circuit is connected which first causes the one-turn clutch 15 to rotate the pin wheel 16 clockwise initiate in order to adjust the speed of the copy strip 9 in time to the peripheral speed of the drum 20 to accelerate, and secondly, after a short delay, the selective transmission relay 26 drops so that the solenoid 27 is de-energized will. During this de-energization, the carriers 36 are pivoted upward by the expansion spring 28, with the roller 25e and the stripping rod 25 / also move upwards, the latter by a larger one Route due to its greater distance from the

bo swivel axis.

Since the roller 25e is located on the side of the drum 20 near the pivot axis and the Stripping rod 25 / on the other side of the drum and thus closer to the aligning roller 17, causes the

b5 described upward movement that the copy strip 9 rests in a contact arc on the drum 20, since an adjustable spring stop 28a on the rod 7 & b in the expansion spring 28 a whole

Upstroke, which brings the roller 25e in a position that, although still removed from the drum surface, allows the tight copy strip 9 to go beyond a tangential position to the drum 20. With the adjustable spring stop 28a acts together with an adjustable solenoid stop 27a, which controls the downward movement an armature of the solenoid 27 is limited. The movement limit positions can be set by means of the spring stop 28a and the solenoid stop 27a the role 25e clearly defined and ι ο fine-tuned if necessary to a controlled to achieve constant contact arc when the copy strip 9 for printing with the photoconductive Drum 20 is brought into contact ", and around the copy strip 9 during a jump in a π specific position close to the drum surface. Because between the roller 25e and the surface the photoconductive drum 20 is not in contact under any operational circumstances this roller approach the drum 20 at a very high speed without causing damage is feared. Since the copy tape 9 is held in a high tension state and within a very high a short period of time from the lifted position is brought into the contact position with the drum 20, 2ϊ for example, in 30 ms over a distance of 3.2 mm, is obtained practically immediately after de-energizing the Solenoids 27 have a constant contact arc.

As long as consecutive images that are located on the photoconductive drum 20 are «1 the copy strips 9 are to be transferred, the solenoid remains in its de-energized state. As soon however, an image that is currently being transmitted is not immediately another image to be transmitted follows, the solenoid 27 is energized so that the T-beams » 36 can be pivoted away from the drum 20, whereby the copy strip 9 out of contact with the Surface of the photoconductive drum 20 arrives.

In Fig. 3 is an example of a sampling and selection circuit shown schematically in the selective copier of FIG. 1 can be used. F i g. 4 shows an example of a control device for the copier. For the description of the FIG. 3 and 4 are assumed to be The TTL logic is used consistently for all gates, inverters, registers and flip-flops, while as Amplifiers Operational amplifiers in the form of conventional integrated circuits are used. As for that A person skilled in the art can easily understand, one uses complementary logic, for example the NOR-tle- · ϊο mente to perform AND and / or OR functions so that the design requirements of both regarding the use of logic elements readily available on the market as well as the Use of the smallest possible number of components can be optimized. It is also for obvious to a person skilled in the art that all of the logical described in connection with FIGS Components and arrangements replaced by other components or groups of components w> that deliver the same outputs for the same input states, even if the logical Operating mode in the component level from that described in connection with FIGS differs as long as the resulting modification is calculated in such a way that it gives the same result or a provides slightly different results for the same purpose. Even if it was mentioned that TTL logic and integrated circuits as operational amplifiers consistently in the circuit examples described 3 and 4 can be used, but individual MSJ circuit parts or MOS-equipped circuit parts Circuit platelets can be easily exchanged without thereby deviating from the teaching of the invention would be given.

F i g. FIG. 3 shows a schematic representation of an example of a sampling and selection circuit for the one in FIG. 1 illustrated selective copier. The circuit of FIG. 3 includes a card edge detector 50, the already mentioned scanning elements 50 / 4-5OC, several associated data channels AC, several print selection modules 1-3, a decoder formed by gates 51 and 52 and controlled output means 53. In accordance with the description of the selective copier is also assumed here that the unprocessed data, which contain the selectively printed receipt information, have the form of individual data cards, which carry a series of 12 bit positions for the visible receipt information, which is coded by marking or not marking each sole τι bit position according to a certain code applied to the receipt information contained in a given batch of such data cards. It is further assumed that the selection is made by scanning the marked or unmarked information in certain three of the twelve bit positions; however, a different number of bit positions can be scanned simultaneously, depending on the desired degree of selectivity, by providing more or fewer scanning elements 50 / 4-5OC with associated data channels AC or one or more such scanning elements being repositioned over another bit position brings. For the person skilled in the art, this is readily apparent from the symmetry of FIG. 3 shown circuit can be seen. The shown three scanning elements 50, 4-5OC and three data channels A- C of FIG. 3 are only intended to serve as an example.

The card edge detector 50 and all scanning elements 50 / 4-5OC can take the form of individual light-sensitive devices such as phototransistors, photodiodes or the like, which, as shown in FIG. 1 shows are arranged in suitable places in order to discover the information. The card edge detector 50 provides in the FIG. 1, the leading edge of each data card is fixed when it is transported from the insertion tray 2 to the scanning station S, as a result of the covering of rays by the card edge. Since the detector 50 only has to perceive the presence of an edge of a data card, a capacitive or mechanical detector can also be used instead of the illustrated light-sensitive device. The scanning elements 50 / 4-50C are arranged opposite the bit positions to be scanned on a card that has arrived in the scanning station B and each generate a signal for the marking or non-marking of the checked bit position due to the difference in the radiation intensity received by the light-sensitive device when marking or not marking will. The card edge detector 50 and each scanning element 50 / 4-50C contain preamplifier stages, such as conventional transistor amplifiers or operational amplifiers, so that the signals generated, which in the case of phototransistors are negative impulses for a marking, are amplified to the selected logic level, before they are applied to the remaining circuit point in FIG. To the

Noise suppression and avoidance of interfering signals at the output are preferably suitable Noise barriers, such as direct current shunts to earth, are provided.

The output of the card edge detector 50 is connected to the> clock 54 for the interrogation window, which generates a pulse of sufficient duration, approximately 25 ms, for each input pulse received by the card edge detector 50. After a delay of about 120 ms, which is equal to the time required for a data card or the like, the leading edge of which was perceived by the detector 50, to reach the scanning point under the scanning elements 50A-50C then the sampling and data evaluation take place. The clock 54 for the query window can be in the form of a conventional monostable multivibrator with a duty cycle equal to the desired pulse duration, in the present case 25 ms, which is arranged in a known manner to be triggered by a conventional delay circuit, in the present case a Delay would have to provide 120 ms. It is expedient to design the clock generator 54 for the interrogation window in such a way that it shields interference signals due to the perception of the rear edge of the card. This can be achieved in that the trigger pulses for the monostable multivibrator are controlled by a second monostable multivibrator, the duty cycle of which is equal to the desired delay and which thereby generates a pulse of suitable duration, the trailing edge of which is used to drive the monostable multivibrator with a duty cycle of 25 ms trigger. The output of the clock 54 for the query window is connected via a line 55 to the flip-flop 56, a control input for the in FIG. 4 and 3> is connected to each data channel AC , where it opens and closes the query window with the appropriate timing, so that only the information is queried and used. The period of time during which the query window is open is made so long that the data can be read even if the data card or the marking information on the card is crooked within acceptable limits. The flip-flop 56 may take the form of a conventional monostable multivibrator, triggered by the trailing edge of the pulse provided by the clock 54 and having an appropriate duty cycle to generate a pulse of suitable duration, approximately 1-5 ms, which is used as the control signal is applied to the controlled output means 53. The output of the flip-flop 56 is connected to a control input of the output means 53 and is also applied to the line 55 in order to extend the period of time during which the interrogation window of the data channels A- C is open by 1.5 ms. Instead of the monostable flip-flop 56, other masking arrangements can also be used which produce the same result.

The output of the individual scanning elements 50 / 4-5OC is connected to the associated data channel AC . Since the data channels are all the same, only data channel A is shown in detail; the data channels B and C have the same structural elements as those shown in FIG. 3 are indicated by corresponding blocks. As FIG. 3 shows, the data channel A has a threshold amplifier 57, an inverter 58, a flip-flop 59 and an inverter and buffer stage, which is indicated by the block 60. All of these elements shown in the data channel A , as indicated by the dashed block, can comprise customary integrated circuits as operational amplifiers and standard TTL components. The threshold amplifier 57 is connected at its inverting input to the output of the sampling element 50/4; its threshold value is set at its input connected to a potentiometer 61. The threshold amplifier 57 works in a known manner by distinguishing between negative going input pulses that exceed the set threshold value and those that do not exceed this threshold value, with only those exceeding the threshold value reversed after negative going impulses and applied to the output of the amplifier. The threshold value of the amplifier 57 is set to a level such that only those negative-going impulses which represent genuine marking information reach the amplifier output with certainty; in this way it provides noise blanking. Further isolation of interference inputs can be achieved by an AC coupling and noise suppression circuit, as is known to those skilled in the art. A positive going pulse at the output of the threshold amplifier 57 is therefore an indication that marking information is present, whereas the absence of a pulse at the output of the threshold amplifier 57 indicates that no marking information is present and therefore, if a bit position is being scanned, that this is not marked. The output of the threshold amplifier 57 is connected to the input of the inverter 58, which can take the form of a conventional TTL inverter. The output of the inverter 58 is connected to the input of the flip-flop 59. The flip-flop 59 is of a conventional type; however, its free input is connected to the output of the inverter 58, while its set input receives control pulses from the clock 54 for the query window via the line 55. Because of this mode of operation, the flip-flop 59 is normally held in the reset state and can therefore not be set by a negative-going pulse from the inverter 58 unless a control pulse is present on the line 55. When the control pulse on the line 55 ends, the flip-flop 59 returns to the reset state and remains in this state until the next control pulse arrives, even if disturbance inputs from the inverter 58 arrive. Looking at this control associated with the function of the clock 54, it can be seen that the flip-flop 59 actually acts as an interrogation window, the marking or non-marking information can only be stored therein if the clock 54 is generated by the generation of a corresponding control pulse. indicates that a data card is in the scan position. The output of the flip-flop 59, in which a positive or high level represents a marking, whereas earth or a low level indicates a non-marking, is applied to an inverter and buffer stage 60. The inverter and buffer stage 60 can take the form of a conventional TTL inverter, which has a low output resistance and reverses the outputs of the flip-flop 59 fed to it, so that a low level is a mark and a signal in its output. high level a non-marking in the queried. Represents bit position, while the low output resistance offers security against noise in the line. As described, are in each

Data channel A-C made several inversions of the signal; however, this is mainly a function of the logic circuitry used and can easily be avoided if other components and / or logic circuits are used, for example by deriving a low output level from the flip-flop for the marking

The output of the data channels .4 — C is connected to the Selection modules 1-3 in the in FIG. 3 connected. Since the U N D selection modules 1 and 2 in all match while the OR selection module 3 of the UN D selection modules 1 and 2 only through the substitution of a NAND gate Place of the single NOR gate used therein and a slightly different data-free state differs is shown in FIG. 3 only the AND selection module 1 shown in detail during the AND selection module 2 and the OR selection module 3 Blocks are indicated schematically. The selection modules 2 and 3 have the same form and practice the same function as the UN D selection module 1. with the exception of the areas specifically mentioned below.

The AND selection module 1 has for each data channel / 4-C a three-way switch Sm. Si β and Sie, as well as a NOR gate 61 and a selector switch Sm \ for the operating mode. Each of the three-way switches Sm. S \ b and Sie can take the form of a mechanical switch, as shown, and is used to select whether marking or non-marking information is to be determined from the assigned channels A-C , or it can be indifferent State can be selected by bringing the switch into the exhibition. The top contact of the three-way switch, which is labeled MARK , is used when data cards are to be selected that have a marking in the J5 corresponding queried bit position; it is directly connected to the output of the inverter and buffer stage 60 of the associated data channels, as shown in FIG. 3 is shown. If a marking condition is encountered during the scan, a low-level output is present at the Af / tKK switching contacts of the three-way switch Sm-Sie, while the detection of a non-marking is indicated by a high output level. The middle contact of the three-way switch, which is labeled OFF. is used when the marking or unmarking state of the particular bit position scanned is not important to the selection sequence being carried out. The off contact of the three-way switch Si / t, Sie and Sie is connected to earth G via a conductor and is therefore kept at a low level, regardless of whether a marker is detected or not. The lower contact of the three-way switch, which is labeled NO MARK , is used when a state is to be selected in which the scanned bit position contains no mark. This contact of the three -way switch is in each case connected to the output of the associated data channel A-C via an inverting circuit 63A-63C, which can take the form of the inverter 58. When the switch is set to NO MARK , a marking status is indicated by a high output level, whereas the selected non-marking is indicated by a low output level. With all three-way switches Sm-Sie, as soon as the selected b5 state is found in the scanned bit position on the data card, a low output level is applied from the set switch contact to the switch arm of the switch; on the other hand, if an unselected condition is sensed, the switch arm receives a high output level from the selected contact.

The switch arm contacts of the three-way switches are each connected to the NOR gate 61 via one of the lines 64A- 64C.

The NOR gate 61 may take the form of a conventional TTL-NOR circuit; however, due to the prevailing input conditions, the NOR gate 61 functions in the same way as an inverting AND gate. So if all the inputs from the three-way switches Sm-Sie are low, indicating that the selected input conditions are met by the bit positions of the scanned data card, the UN D input conditions for the NOR gate 61 are met and the output of the gate is high . However, if one or more of the inputs from the three-way switches are high, indicating that the selected input conditions are not satisfied by the bit positions of the scanned data card, the AND input conditions for NOR gate 61 are not satisfied and the output of the gate is low. At this point in the description of FIG. 3 it should be mentioned that additional bit position selectivity is readily available and can be achieved by simply adding further scanning elements 50D-Z and the associated data channels DZ and associated inverter circuits 63D-63Z, three-way switches Sid-Siz and inputs 64D-64Z for the NOR -Gate 61 provides.

The output of the NOR gate 61 is applied via a conductor 65 to terminals a and c / of the selector switch Smi for the operating mode. The operating mode selector switch Smi can take the form of a conventional two-pole three-way switch, such as a disc switch or the like, in which the contact arms are mechanically connected for common rotation. The upper and lower contacts a and d of the operating mode selector switch Smi are, as already mentioned, connected to the output of the NOR gate 61, while the two middle contacts b and c are grounded, as shown in FIG. 3 shows. The selector switch Smi is used to select the mode of operation of the selective printing device with respect to the data cards which meet the AND data requirements set by the three-way switch Sm-Sie; In detail, the operating mode selector switch Smi is used to cause the printing of the document information on the data cards that meet the AND data requirements of the switch position Sm-You when it is set to the A US WAWL position (SELECT) in which the Contacts a and h can be used. On the other hand, if the selector switch is in the SPÄLWG position (SKIP), in which contacts c and d are used, the receipt information on the data cards that meet the AND data requirements set by the three-way switch Sm-Sie is not printed, ie to be skipped. If the operating mode selector switch Smi is set to the Λί / S position (OFF) , in which the contacts b and c are used, the AND selection module 1 is made ineffective, so that any data conditions that may be set by the three-way switch Sm-You do not affect the printing or non-printing of the receipt information on a particular data card.

The upper switch arm contact of the operating mode selector switch Smi is connected to the conductor with

SELECT \ , which indicates that the logic level on this conductor belongs to the selection or print information from the UN D selection module 1; the lower switch arm contact is connected to the conductor labeled SKIPi, which indicates that the logic level on this conductor belongs to the jump or non-pressure information. How the logic levels on the SELECT-i-3 and SKIP-i-3 conductors are used, in order to control the operation of the selective printing device according to the invention will be explained further below. It should be mentioned here only that if the UN D data conditions set by the three-way switches Sm-Sie are present on the card just scanned, at the output of the NOR gate 61 becomes a high level is present, whereas if the data conditions are not present, at the output of the NOR gate 61 becomes a low level is present, so if the operation mode selector switch S _Ml is at SELECT and a and connects b, has the Conductor SKiPi always has a low level because contact b is grounded, while conductor SELECTi can have a high or low logic level, depending on whether it is being queried e data card which fulfills or not the AND data conditions set by the three-way switch Sm-Sie. If, on the other hand, the operating mode selector switch S _M i is in the SAT / P position and connects c and d , the conductor SELECTi is always at a low level because the Contact c is grounded, whereas the SKIP 1 conductor can have a high or low logic level, depending on whether the data card being scanned fulfills the AND data conditions set by the three-way switch Sm- Sie or not In the Λί / S position of the operating mode- Selector switch Sm \ is due to the grounding of contacts b and c, both conductors J5 SELECTi and SKIPi in a low logic state. The AND selection module 1 thus ensures the selection of the data cards via the markings or non-markings, which all have three specific bit position criteria, while the operating mode selector switch Sm allows the operator to determine whether the data cards selected in this way should be printed or skipped.

The AND selection module 2 is, as already mentioned, identical to the AND selection module 1 and thus enables a second selection of data cards that are coded with markings or non-markings, according to whether they meet a second group of up to three bit digit criteria during the associated operating mode selection switch Sm ₂ (not shown) allows the operator to determine whether this second data card group should be printed or skipped. The OR selection module 3 differs from the AND selection module 1 in that the y4i / S position of all three-way switches S ₃ AS ₃ C is not grounded, but is set to a high level and replaces the NOR gate 61 with a NAND gate where all connections to this NAND gate are the same as those described for NOR gate 61. feo

The NAND gate works, as is obvious to a person skilled in the art, not as an inverting AND gate, but as an inverting OR gate and therefore delivers a high output level as soon as one of the special bit states that is set on the three-way switches S ₃ AS ₃ C (not shown ) are set, is present, as it only provides a low output level, if none of the specific bit states on the data card is present, the <4L / S-position of the three-way switch S _3A -S ₃ C is connected here to a high level, so that no selection takes place if an indifferent state is indicated in the absence of at least one of the special criteria. The OR selection module 3 thus takes into account a third selection of data cards encoded with markings and non-markings, which have any one of a group of up to three specified bit position criteria, while the associated operating mode selector switch Sm (not shown) gives the operator the opportunity to determine whether to print or skip the third group of data cards selected in this way. In Fig. 3 three selection modules 1-3 are shown; however, it will be apparent to those skilled in the art that a greater or lesser number of selection modules can be used to provide the necessary selectivity for a particular application. For this purpose, AND and / or OR selection modules only need to be added to the selection modules connected in cascade in FIG. 3 or removed from the latter.

The conductors SELECTi-3 of the selection modules 1-3 are connected to one of the logic inputs of the NOR gate 51, the conductors SKIP i-3 are each connected to one of the logic inputs of the NOR gate 52 is connected to ground and the output of NOR gate 51 is at the input of NOR gate 52. NOR gates 51 and 52 can have the same shape as NOR gate 61; however, the input conditions of the NOR gates 51 and 52 are such that the NOR gate 51 operates as an inverting OR gate and the NOR gate 52 as an inverting AND gate. The NOR gates 51 and 52 form a decoder circuit for the various selection and jump inputs of the selection modules 1-3, which function in such a way that a jump input has priority and thus the receipt information from a queried data card which is sent to one of the selection modules 1-3 a jump output is generated and a selection output is not printed by another selection module 1–3. The NOR gate 51 operates, as mentioned, as an inverting OR gate; thus if any of its inputs is high, which is a selection condition, the NOR gate 51 produces a low output which now represents a selection level; a high output at NOR gate 51, representing the absence of a selection condition, is generated only when all inputs are low. The NOR gate 52 functions as an inverting AND gate; so it only produces a high output level, which is a select or print condition, when all of its inputs are low. If only one of the inputs to NOR gate 52 is high, its output is low, indicating a no print or jump condition. Recall that a jump condition on conductors SKIPi-3 is indicated by a high level, a no-jump condition on the same conductors is indicated by a low level, and that NOR gate 51 will only have a low output on conductor 66 provides if at least one high or select input is given to it. All inputs of the NOR gate 52 are low and thus supply a high-level selection signal when at least one selection level is applied to the NOR gate 51

and a non-jump level is present on conductors SKIPi-3. Under all other conditions, the output of NOR gate 52 is low, indicating a jump condition so as to give priority to jump signals applied to conductors SKIPi-3 . The input to NOR gate 67 is a forced high input which is used when all interrogated data cards are to be printed and is activated when the "PRINT / tLL" key (not shown) is pressed to set the output of NOR -Gate 52 forcibly high regardless of any other inputs on that gate.

The output of the NOR gate 52 is connected via the conductor 68 to an input of the AND gate 53, which can take the form of a conventional AND circuit, which only generates a high output level when both inputs are high. The second or control input to AND gate 53 is to the flip-flop 56 connected, which, as already mentioned, a 1.5 ms pulse generated upon termination of the window pulse. The output of AND gate 53 is through the inverter and buffer stage 69, which can have the same form as the inverter and buffer stage 60, with the one shown in FIG logic and control circuit shown connected.

To describe the operation of the scanning and selection circuit of FIG. 3, it is assumed that the receipt information is to be printed from all data cards of a particular stack which have the data combination 010 in the three bit positions of the data cards belonging to the stack, and also the receipt information of all data cards that have a one (1) in the first or third bit position, with the exception of those with the combination Hl, where the marking information should be marked with a one (1) and the j ^r > non-marking information should be marked with a zero (0) and the data channels A - CaIs the first, second and third bit positions are considered. For this special example of selection conditions, the three-way switches S \ a and S \ c in the 4i> AND selection module 1 are set to A / OAM /? / C (non- marking), while S \ b are set to the MARK position (marking) and the operating mode selector switch Smi is set to the SüLirCT position, which ensures that the data cards are printed on which the data combination 010 appears in the scanned bit positions. Correspondingly, the three-way switches S ₃ A and S ₃ C in the OR selection module 3 are to be set to the MARK position, while the three-way switch 53β must be in the OFF position, ie in the indifferent position and the operating mode selector switch S / m in the SELECT position is provided. This achieves the selection level of all scanned data cards that have a one (1) in the first or third bit position. The rule, do not print 111 for the general OR state is fulfilled by bringing all three-way switches S ₂ AS ₂ C in the AND selection module 2 into their MARK control, while the operating mode selector switch Sm _{2 is} in SKIP, ie jump position is set. This ensures a bo non-printing level when the exception condition is discovered. The data cards of the selected batch can then be filled into the insertion tray and the start button can be pressed to initiate the selective printing process.

When the sampling and selection circuit of FIG. 3 is in operation, the leading edge of each card introduced into the scanning station B is detected by the card edge detector 50 and after a sufficient delay to bring the data of the inserted data card into position under the scanning elements 50Λ-5OC, the clock 54 sets the Interrogation window sends a pulse of sufficient duration to flip-flop 59 of each data channel A- Can to open the interrogation window and hold it open until the bit position data is sampled and processed. Typical values for the delay between the perception of the leading edge of the data card and the generation of the interrogation window pulse can be about 120 ms, while the duration of the interrogation window pulse applied to conductor 55 can be, for example, 25 ms. When the interrogation window is opened by applying the clock pulse on conductor 55 to the set input of flip-flop 59 of each data channel, the flip-flops are released from their forced reset state so that their logic state can be set. At this point in time the sensed data card is in the scanning station and therefore the output states of the scanning elements 50Λ-50C identify the marking or non-marking state of the particular bit positions on the scanned data card. After the silence weeding and reversal by the threshold amplifier 57 and the inverter 58, the output of each sensing element 50Λ-50CaIs set input is applied to the flip-flops 59 such that a negative going pulse indicating a marker sets each flip-flop 59 to its high level , while the absence of such a pulse keeps the flip-flop 59 in the reset state, ie at a low output. The output level of the flip-flops 59 in each data channel AC is reversed and buffered by the inverter and buffer stage 60 and applied to all selection modules 1-3. As a result of the clock pulses applied to it, each flip-flop 59 acts as a correct time-controlled masking device which only allows data to be fed into it when bit information is definitely scanned, but this bit information is skewed within reasonable limits permitted.

The output of the data channel A is applied directly to the MARK-K.onla.kte of the three -way switches S \ _A -S _3A and also reversed at the inverter 63/4 and applied to the NO-MARK contacts of the switches S \ _A -S _3A . Similarly, the output of the data channels is flund Can the corresponding contacts of the three-way switch S \ _B - S ₃ B and ^{w-ski 'e} ^ ^en ° for the switch Sm S ₃ a described created. The operation of the section modules 1-3 and the decoder formed by the NOR gates 51 and 52 will be explained for the data conditions assumed above. When a data card is scanned through the interrogation window under the control of the clock 54, the bit position information read is compared with the conditions set in the selection modules 1-3 and then decoded by the NOR gates 51 and 52 so that either a selection or Print signal with a high level or a jump or non-print signal with a low level appear at the output of the NOR gate 52 for each interrogated data card. These print and jump signals at the output of the NOR gate 52, which appear one after the other, are applied via the conductor 68 to the AND gate 53 and switched through as a result of the action of the flip-flop 56, so that for each scanned card either a print or a Fault signal to the in

4 is applied, in the correct time sequence, which represents the actual speed with which the data cards are queried at the scanning station B.

Under the conditions of the above-mentioned specific example, as soon as a data card with the data combination 010 is read, an output level high-low-high appears at the outputs of the data channels AC due to the inversion carried out by the buffer and inverter stage 60. Since the three-way switches 5m in AND selection module 1 are set to NO-MARK or MARK or NO-MARK , all inputs to NOR gate 61 on conductors 64A-64C are low due to the action of inverters 63 / V and 63C, and thus meet the AND condition at the input of this gate. Therefore, since the operating mode selector switch Sm \ is selected, there is a high output on the SELECTi conductor and a low output on the SKIP 1 conductor. In the AND selection module 2, all three-way switches S2A- Äc are set to their marking state in order to look for a 111 state, and an input level high-low-high is therefore applied to the inputs of the NOR gate 61 in the AND selection module 2. Since the AND conditions of the NOR gate 61 in the AND selection module 2 are thus not met, the outputs on both the SELECT2 conductor and the SKIP 2 conductor are low. Correspondingly, the three-way _{switches S 2/1} and Sk- are set to MA _{ΛΚ in the OR selection module 2} , while the switch S 2 S is in its AL / S position, ie in the indifferent position, which is the case with the OR selection module 2 is a high level in order to prevent the NAND gate 61 from generating a high level when it is set to this position alone. Since none of the OR conditions of the NAND gate 61 is met in the OR selection module 3, because only inputs with a high level are applied to it, the outputs on the conductors SELECT3 and SKIP3 are low. If a 010 state is scanned with the switch positions described, the conductor SELECTi has a high level, while the conductors SELECT2 and 3 and SKIP 1 -3 are held at a low level. As already mentioned, the NOR gate 51 operates as an inverting OR gate and therefore provides a low output on conductor 66. Since there is a low level on conductor 66 and also on all conductors SKIP 1-3, the AND conditions for NOR gate 52 are met, causing the output of NOR gate 52 to go high and generating a print signal for the sensed state.

As soon as a data card with a one (1) or a marking in the first and / or third bit position is found, one of the following conditions is present at the outputs of the data channels A - C, the sequence of the inversion carried out by the buffer and inverter stage 60:

A. B. C. 1 high high low 2 high low low 3 low high high 4th low high low 5 low low high 6th low low low

For each of these states, the output from the AND selection module I on both conductors SELECTX and SKIPi is low because the operating mode selector switch Smi is set to SELECT and thus the line: SKIPi is grounded, while the 010 (NO MARK-MARK-NO M / t /? K> Adjustment of the three-way switch

■ -, Sm-you the AND input conditions of the NOR Gate 61 is not satisfied for any of the data combinations listed in the table. Corresponding is for everyone Input conditions of the table with the exception of the last, the output from AND selection module 2 au

ίο both conductors SELECT2 and SKIP2 low, because the operating mode selector switch S \ a is set to jump and thus conductor SELECT2 is grounded, while the Hl (MAKK-MARK-MARK) emste \\\ ing the three-way _{switch Sm-S 2} C the AND input conditions

The condition for the NOR gate is only fulfilled if the last data combination in the table is detected. For the data combination 1-5 of the table, both conductors SELECT2 and SKIP2 remain at a low level, whereas in the case of the last data combination in the table, the conductor SELECT * is low and the conductor SKIP2 goes high.

The three-way switch Sm-You in the OR Selek tion module 3 are, as already mentioned, set to MARK- AUS-MARK , so that every low level at the MA RK input of the three-way switch Sm or S ₃ C the OR condition of the NAND- Gate 61 meet and generated a high level at the output. Since the operating mode selector switch S / m is set to selection, the reception causes one of the in the table

jo combined input conditions a high level on the SELECT3 conductor and a low level on the SKIP3 conductor, since this conductor is grounded. So the head SELECT3 is high for each of the input conditions 1 to 5 of Tabelli while Leite

j-, SELECTi and 2 and SKIP 1-3 are low. The fulfills the OR conditions of the NOR gate 51 which applies a low level to the conductor 66, so that all low inputs are applied to the NOR gate 52, which leads to the generation of a high level at the output corresponding to the selection, leads. However, if the input condition listed in the table under 6 is found, a high level is present on both conductors SKIP 2 and SELECT3 , while all other conductors have a low level. The high level on the SELECT wire. fulfills the OR conditions of NOR gate 51, s (that a low level is present on conductor 66. However, the high level on conductor SKIP2 contradicts the AND condition for NOR gate 52, S (that on conductor 68 a low level is present, which is selectively switched by the AND gate 53. It can therefore be seen that the above set up for example printing conditions are satisfied by the settings described for the selection modules 1-3 and result in selection or pressure signals that are to be de The logic and control circuit of FIG. 4 are switched through when the desired conditions are established, while jump signals are passed on when data cards are scanned which di>

do not meet the conditions set.

F i g. 4 schematically illustrates an embodiment of a control device for the selective Copier. For the description of this circuit: it is assumed that throughout, if not

b5 mentioned otherwise, use common TTL circuits will. The control device of FIG. 4 has a system clock 70, a signal generator 71 for there Start and stop signals, an OR gate 72, a

Flip-flop buffer stage 73, a shift register 74, a logic controller 75 for the development motor, a logic controller 76 for the one-turn clutch, a logic controller 77 for the relay decoupler 101 of the selective transmission mechanism and a counter 78 for controlling the relay 104 for the start-stop signal Generator on. The system clock 70 may take the form of a radiation actuated clock device that provides a pulse of a predetermined duration at the time a data card is advanced from the insertion tray to the scanning or exposure station. The system clock can operate in a number of ways; In the present example, a light-sensitive input is derived from the time slices 3 and 4, which sit on the drive shaft 5 of the infeed roller 6, see FIG. 1. For this purpose, as shown in FIG. 1, a light source 7 is attached to one side of the time slices 3 and 4 and a light-sensitive device 8, such as a phototransistor, a photodiode or the like, on the other side when the trailing edge of the pane 4 passes the light-sensitive device 8 and this radiation entrance remains until the leading edge of the pane 3 again covers the rays coming from the light source 7. Accordingly, the photosensitive device 8 generates in a known manner a negative going pulse for each revolution of the feed roller 6, regardless of whether a data card is fed or not. This pulse has a duration which is determined by the offset θ between the trailing edge of the second time slice 4 and the leading edge of the first time slice 3. In contrast, the photosensitive device 8 has a high output during the entire time interval (360 ° --Θ) in which it is covered by the leading edge of the first time slice 3 until it is released again by the trailing edge of the second time slice 4, and this Interval (360 ° - Θ) is used to determine the duration of the clock pulses supplied by the system clock generator 70. A dark edge triggering is used to have the system clock generator 70 driven by the light-sensitive device 8, 4 ^r > where the timing of the leading edge of the clock pulse generated is determined by the position of the leading edge of the first time slice 3 on the shaft 5 , while the duration of the clock pulse, which is given by the temporal appearance of the trailing edge of the w clock pulse, depends on the position of the trailing edge of the time slice 4. So if one assumes for the system according to the invention according to the example described that about three data cards are entered per second, then the feed roller 6 will perform a full revolution every 332 ms and thus cause the light-sensitive device 8 to generate one pulse for each revolution and thus one Provide a working cycle of 332 ms for the machine. The system clock pulse 70 can then have the form of a Schmitt trigger, a flip-flop or another known feedback converter, which follows the output of the light-sensitive device 8 in a known manner and thus from the positive trailing edge of this pulse e> 5 is reset. For a machine cycle duration of 332 ms, a clock pulse of about 230 ms is suitable. Therefore, the offset θ between the times, 3 and 4 can be chosen so that clock pulses with a pulse duration of about 230 ms through the coverage interval (360- Θ) are generated. In the present case, the clock pulse duration can be adjusted by adjusting the time slices 3 and 4, but clock pulses of constant duration can be obtained using monostable multivibrators, and under these circumstances the number of time slices can be reduced. Under the above conditions, the system clock generator 70 generates a clock pulse for each revolution of the infeed roller 6, the duration of which is approximately 230 ms and the leading edge of which coincides with the appearance of the leading edge of the first time slice 3 on the infeed roller 6. In addition to the mentioned Schmitt trigger or flip-flop as a clock pulse generator, other masking devices can be used, and if particularly well-defined or pure clock pulses are desired, two Schmitt triggers can be used to provide additional definition of the input. The output of the system clock 70 is applied via a conductor 79 to a reset input to the flip-flop buffer stage 73, a clock input for the shift register 74 and a clock input for the logic controller 76 of the single-turn clutch, which controls the advance of the transmission strip 9.

The signal generator 71 for the start-stop signal has a relay which is actuated when the inventive selective printing device works, and when it falls, the printing device stops. This Relay is actuated by depressing a start button for the device. In what way it de-excites becomes clear later from the description of the counter 78. Just so much here: Whenever the relay is in the signal generator is de-energized, a low logic level is present at its output, which is the shift register 74 clears for the next pass and a low or pressure signal into OR gate 72 enters, so that a blank strip between the selective print runs of the device according to the invention is printed. The output of the start / stop signal generator 71 is connected to a clear input via a line 80 of the shift register 74 and applied to a data input of the OR gate 72.

OR gate 72 is a conventional OR logic element that operates in a well known manner a certain output level is generated as soon as a certain input level is applied to one of its inputs lies. As already mentioned, one input of the OR gate 72 is connected to the output of the start / stop signal generator 71 connected, while a second gate input at the output of the buffer and inverter stage 69 of the in F i g. 3 is the sampling and selection circuit shown and accordingly a sequence of switched Selection and / or jump signals received, according to the print and non-print sequence of the queried Data stack. A low input level to OR gate 72 represents a select or print command, whereas a high level means a jump or no print command. For each pass is however, the first input to the OR gate 72 is a low level from the start-stop signal generator 71, so that a blank printout on the strip initiates the printing sequence. The other inputs of the cycle come from the inverter and buffer stage 69 of FIG. 3 and agree with the print and non-print sequence for the scanned Data card stack match. The outcome of the OR gate 72 is connected to the input of the flip-flop buffer

ferstufe 73 connected. The flip-flop buffer stage 73 is a conventional flip-flop which is used here to briefly store each selection or non-selection signal applied to the OR gate 72 in order to then input it to the shift register 74. The input of the flip-flop buffer stage 73 in front of the OR gate 72 is at the set input of this stage, while the £> input of the flip-flop is grounded. A select input or low level from the OR gate 72 thus sets the flip-flop buffer stage 73 to a high state and the flip-flop is automatically reset to its low state when a clock pulse is applied by the system clock generator 70. The output of the flip-flop 73 is connected to a data input of the shift register 74. The shift register 74 may consist of a conventional sixteen bit shift register which advances the select and skip levels through the system at the rate at which the data cards are scanned and processed. However, since the TTL logic is to be preferred, the 16-bit register is in practice composed of two 8-bit registers which are connected in series in a known manner. In the shift register 74, a high level received from the flip-flop buffer stage 73 represents a selection signal, while a low level represents a jump. The shift register 74 can be classified as a series input and parallel output shift register. In FIG. 4 only the outputs 5-12 are indicated, since only these outputs are of interest. The clock input of the shift register 74 is connected to the system clock generator 70, while the clear input is connected to the start / stop signal generator 71.

Between the receipt information of a given card made according to the electrophotographic technique of FIG. 1 is treated, and the information read out from the data card resulting in a print or jump signal which is advanced by the shift register 74, there is such a relationship that when the print or jump signal reaches the output 5 of the shift register 74, the receipt information on imaged on the photosensitive drum. The exposed information, which forms a latent electrostatic image, enters the development station D at the point in time when its associated scanned information has reached stage 6 of shift register 74 but has not yet been switched to stage 7. The image of the receipt information rotates through development station D as the information scanned by the data card is advanced through stages 7-9 and leaves development station D at about the time when the scanned information on the data card has reached stage 10. By the time the scanned information reaches stage 12 of the shift register, the developed image will have reached a point on the periphery of the rotating drum just before the transfer station Fer. The presence of predetermined bits of the scanned information in certain stages of the shift register 74 can thus be used to selectively control the development motor 24, the single-speed clutch 15 and the selective transmission device 25.

Outputs 5-10 of shift register 74 are connected in parallel to logic controller 75 for development motor 24. As with the description of FIG. 1 already mentioned, it is useful to operate the developing device 13 in such a way that it is normally out of operation in order to save toner, etc., and then to switch on the developing motor 24 shortly before the arrival of any image to be transferred at the developing station and while in Leave to operate until there is no longer any image to be transferred in the development station D. This mode of operation is achieved with the aid of the logic controller 75, which comprises two NOR gates 81 and 82, the input conditions of which make them operate as inverting OR gates, as has already been done for

ίο the NOR gate 51 of FIG. 3 has been described. The outputs 5-7 of the shift register 74 are connected to the input of the NOR gate 81, while the outputs 8-10 of the shift register are connected to the NOR gate 82 in the same way. The NOR gates produce a low level output whenever a high input level characterizing selection or print information is applied to them; thus, an output is generated by the NOR gate 81 and / or NOR gate 82 whenever a document information item containing a selection signal is located between the exposure station C and the exit point of the development station D. The outputs of NOR gates 81 and 82 are connected to the inputs of an OR gate 83 which may take the same form as OR gate 72 except that its output is capable of providing a winding 84 for energizing the development motor 24 to drive. The motor of the development station D is normally switched off and the logic control for the

The development motor 75 operates in such a way that it starts the development station D when a selection signal is present in stage 5 of the shift register 74 and keeps it in operation as long as this or another selection signal in stages 5-10 of the shift register 74 is present is available. In this manner, the development motor 24 can normally remain idle but can be turned on before an image enters the development station so that sufficient toner flow is established before it does

The developing image enters the developing station D , the operation of the developing station D being prevented from being interrupted if a selection signal follows within a 6-bit range.
The outputs 11 and 12 of the shift register 74 are connected to the logic controller 76 for the one-turn clutch, which initiates one full revolution of the pin wheel 16 for the paper advance in a single machine cycle, so that the paper is brought to the speed of the surface of the photosensitive drum 17 when or before it comes into contact with the drum surface as a result of the action of the selective transfer mechanism 25. The logic controller 76 for the one-turn clutch consists of first and second inverting AND gates 85 and 86, the first inverting AND gate 85 controlling the intermittent operation of the single-turn clutch, while the second inverting AND gate 86 controls its continuous operation, both inverting AND gates 85 and 86

w) can take the form of common logic gates that produce an inverted or low output level if each of its inputs has a high Level is present. A first input of the first inverting AND gate 85 is via a conductor 79 connected to the system clock 70, while the second input via a conductor 87 to the output of the Stage 12 of the shift register 74 is set. The first input to the second inverting AND gate 86 is

connected via a conductor 88 to the output of the stage 12 of the shift register 74, while the second Input is connected to the output of stage 11 via a conductor 89. As mentioned earlier, there is a bit in Stage 12 of the shift register is assigned to document information that is located shortly before the transfer point is located, while a bit of level 11 belongs to document information that corresponds to level 12 belonging next follows. The first inverting UN D gate 85 monitors whether a feed of the Transmission strip is required for a present transmission, while the second is inverting UN D gate 86 monitors whether for the next receipt information arriving at the transmission point a transmission should take place or not. Since yes the pulse duration of a clock pulse from the system clock 70 is 230 ms, while a machine cycle and thus the shift speed of the shift register 74 is 332 ms, the output of the first inverting AND gate 85 goes when a high level is present in stage 12 of shift register 74, only for the dwell time of the two inputs low, the 230 ms. The second inverting AND gate 86, however, receives both inputs a dem Machine cycle for a corresponding period of time. Therefore, if both stages 11 and 12 of the shift register 74 are high, the output of the second inverting AND gate 86 remains low for a period of 332 ms. Accordingly, if both stages 11 and 12 of the shift register 74 are high or a selection information included, the output of the second inverting AND gate 86 is used to activate the single-speed clutch for the paper feed to keep going until the bit of level 11 is shifted to level 12 to so to achieve continuous operation. The outputs of the first and second inverting AND gates 85 and 86 are connected to the first and second inputs of an OR gate 90. The OR gate 90 can take the same form as the OR gate 72; it creates a low Output level whenever a lower one at one of its inputs or at both inputs Signal level is present. The output of the OR gate 90 is connected to an input of an OR gate 91 connected. The OR gate 91 can have the same form as the OR gate 83. It acts a winding 92 for actuating the single-turn clutch 15, which the pin wheel 16 for a single revolution detected and thus brings the copy strip 9 to the speed of the drum 17. A second The input to the OR gate 91 is fed by a signal generator 93 for the strip feed. The signal generator 93 may take the form of a conventional push button operated signal generator employing the OR gate 91 is supplied with a low input level when an operator presses the switch button presses and thus switches on the signal generator. Purpose of the signal generator 93 for advancing the transfer tape is to slide the copy tape 9 out of the machine after the last data card is read and when no more decks of cards are inserted. The OR gate 91 responds a low signal level from the signal generator 93 and applied to the winding 92 in the same Way it does for a low input from OR gate 90.

The output of the stage 12 of the shift register 74 is also connected to the logic via a conductor 94 Controller 77 connected for selective tripping of the transmission relay. At the entrance of this logical Control is also the output of the second inverting AND gate 86. The logical control " > tion for the selective relay triggering comprises an inverting AND gate 95 and a flip-flop memory 96. The inverting AND gate 95 may have the same shape as the first and second inverting AND gates 85 and 86. It works in

κι the way that there is a pulsed operation of the selective Triggering of the transmission relay 101 supplies. The flip-flop memory 96 can be a conventional TTL flip-flop have, which here serves to ensure continuous operation for triggering the selective transmission > Provide a relay; it should be noted that a flip-flop is used instead of an AND gate, so that whose storage capacity can be used to set a dwell time for the shift between the To provide stages 11 and 12 of shift register 74,

-> o to avoid time problems. An entrance to the The inverting AND gate 95 is connected to the output of the stage 12 of the shift register 74 via a η conductor 94 connected, the second input is via a conductor

97 to a timer 98 for selective transmission. j ") The timer 98 may be as described above System clocks 70 are the same except that the clock pulses are slightly longer in duration and the Control input for the time control pulse generated therein is initiated by the pulse from the

in second photosensitive device 8 'at the Perception of the dark edge is generated by the second pair of time slices 3 'and 4'. So if the second light-sensitive device 8 'during the rotation of the time slice 3' of the second time slice

i "> paires 3 ', 4' on the shaft 5 of the insertion roller of the leading edge of this disc is covered against the light source 7, generates the second light-sensitive device 8 'a positive-going trigger pulse for the timer 98 of the

• »ο selective transfer. This trigger pulse is at the further rotation is terminated by the trailing edge of the time disc 4 '. As this is a similar Arrangement is as that described for the clock 70, it will be understood that the timer 98 for

4 "> every revolution of the infeed roller 6 a clock pulse with a duration of (360 ° - Θ ') generated by the shift Θ' between the time slices 3 'and 4' given is. However, the leading edge of the clock pulse generated by the timer 98 is opposite to the

'.ο leading edges of the system clock 70 generated pulses as a result of the adjustable shift Φ between the leading edges of the Time slices 3 and 3 'delayed, as shown in Figure 2D. This ensures that the transmission

T) movement strip comes up to speed before he starts with the toner image on the photosensitive drum 20 is brought into contact. The clock pulses of the System clocks 70 are thus initiated by the position of the leading edge of time slice 3.

In other words, the timer 98 generates clock pulses which are initiated by the leading edge of the time slice 3 '. The shift Φ between the leading edges of the time slices 3 and 3 'thus determines the time delay between the

b ^r j pulses of the clock 70 and those of the timer

98 and thus the time difference between the initiation of the strip feed and the triggering of the relay 26 for the selective transmission mechanism. the

Slice shift Φ is due to the mentioned Adjustability of time slices 3 and 4, as well as 3 'and 4' changeable; in the case of printing labels or the like. would she z. B. to be chosen so that there is a time delay of 10 ms.

The output of the second inverting AND gate 86 is applied to the data input (D) of the flip-flop memory 96, while the clock input (C) is connected via the conductor 97 to the timer 98 for the selective transmission mechanism. The flip-flop memory 96 is therefore set by an input from the AND gate 86 only when a clock pulse appears from the timer 99 and then remains in this state until the next clock pulse appears; then it can be set to the initial state of AND gate 86 again. The flip-flop memory 96 can thus be set to its low state by a low input from the second inverting AND gate 86 as soon as a clock pulse is generated by the timer 98 for the selective transfer, and remains in this state until it goes high is reset when AND gate 86 goes high and a clock pulse is generated by timer 98. The AND gate 95th responds to the presence of a selection signal, ie a high level in stage 12 of the shift register 74 and generates a low output level which appears when the next clock pulse is received from the timer 98; the flip-flop memory 96, on the other hand, is set to its low level when a clock pulse appears if there are selection levels in stages 11 and 12 of the shift register 74 which are detected by the second inverting AND gate 86, and remains in this state until the next The clock pulse from the timer 98 for the selective transfer mechanism gives it the opportunity to adapt to the output of the AND gate 86. This means that the output of the inverting AND gate goes low to a selection level in stage 12 of the shift register 74 at the right time when the relay 26 of the selective transfer mechanism is to be triggered, which is determined by the leading edge of the clock pulse of the timer 98, and that it remains low only for the duration of this impulse. As soon as a selection level is present in stage 11 of the shift register 74, which indicates that the next picture is also to be transmitted, the flip-flop memory 96 is set to its low state and remains in this state at least until the inverting AND gate 95 switches to the Shifting the bit information from stage 11 to stage 12 goes low again and the next clock pulse from the timer 98 for the selective transfer mechanism arrives. In this way, a continuous operation of the selective transmission mechanism 25 is guaranteed when adjacent selection commands appear. The outputs of the inverting AND gate 95 and of the flip-flop memory% are connected to an inverting OR gate 99. The inverting OR gate 99 may take the form of a conventional logic circuit which, in the presence of a low input level at one or both of its inputs, produces a high output level. The output of the inverting OR gate 99 is connected to the input of a driver stage 100. The driver stage 100 can take the form of a conventional TTL relay driver stage which is based on

responds to a high input level and generates an output signal of sufficient energy to a relay zi steer. The output of the driver stage 100 is connected to a release winding 101 for the relay 26 of the selective Transmission mechanism connected and causes be excitation that the relay 26 drops out, so that de The transfer tape is immediately brought into contact with the drum ii. The logical control for there Relay of the selective transmission mechanism wire so after a sufficient delay to de To bring the copy strip 9 up to speed, do and let the relay 26 drop; she does this in a pulsed or continuous operating mode depending on whether the next image is to be transmitted or not.

The counter 78 can consist of a conventional 4-bit counter, which in a known manner each of its inputs! counts from the cleared state up to an available number of sixteen. The delete input of the counter 78 is, as shown, connected to the output of the timer 54 for the query window via a <line 55, see FIG. 3. The data input of the counter 78 is via a conductor 102 to the output of the system clock 70 connected, so that the clock pulses generated by the latter are counted. The task of the counter 78 is to switch off the system by de-energizing the relay in the start-stop signal generator 7 after all the loaded data cards have been scanned and processed. It should be remembered that the timer 54 for the query window only generates a clock pulse when the leading edge of an inserted data card is detected, while the system clock 70 generates a clock pulse for each revolution of the shaft of the infeed roller 5 under normal operating conditions, the counter 78 counts one pulse by the system clock 70 and immediately afterwards cleared by a pulse of the timer 5 ' for the query window. As long as data cards are being fed in, the counter 78 normally registers a count of one and is then immediately cleared if the card feeding does not occur intermittently, with several counters then being registered. However, as soon as the entire stack of cards is inserted, there are no more clear pulses from timer 54 for the query window and the count of counter 78 is continuously increased by the clock pulses from system clock 7 (. The output of counter 78 is, as in FIG 4 shows taken from the fifteenth counting position, but any preceding stage could also be used. "The output of the counter 78 is applied to a driver stage 10; Relay 104 for the start-stop signal generator 7 is connected and, when energized, causes the relay to drop out and thus the system to be switched off The relay of the start / stop signal generator drops out, which switches off operation.

For the description of the functioning of the ir F i g. 4 is assumed to be the control device shown that a stack of eleven data cards is loaded and that the settings of the selection modules 1-3 ir F i g. 3 for the in F i g. 3 scanning and selection circuit shown the following 'information sequence on Input of gate 72 results in:

Bit no.

State

1 selection 2 selection 3 Leap 4th selection 5 Leap 6th Leap 7th Leap 8th Leap 9 Leap 10 Leap 11 selection

When the operator operates the start-stop signal generator 71 to start the machine, there is a delay in warming up and closing the relays before the relay in the start-stop signal generator 7t is energized, so that disturbance caused by noise is not a problem. In the de-energized state, the relay in the start-stop signal generator 71 holds the shift register 74 in the cleared state and applies a low level to the input of the OR gate 72. The relay then closes and thus initiates the operation of the machine and the original to the OR The low signal level applied to gate 72 is input to flip-flop 73 as a first selection bit, hereinafter referred to as the zero position bit. This selection bit, which is automatically inserted at the beginning of the cycle, supplies an empty strip at the output of the machine, which marks a new work cycle.

The zero position bit is input to the first stage of shift register 74 from flip-flop 73. It is followed in sequence by bits 1-11 according to the table above, which are generated by the sampling and selection circuit of FIG. 3 are applied to the OR gate 72 with each clock pulse, from where they are fed to the flip-flop 73, which inputs them into the shift register 74. When the zero position bit reaches stage 5 of shift register 74, its high level, which characterizes the selection, is applied to the input of NOR gate 81 via conductor 105. The OR conditions of the NOR gate 81 are thus fulfilled, which accordingly produces a low output level which is applied through the OR gate 83 to the winding 84 of the development motor in order to set the latter in motion. The document information belonging to the zero position bit, which is empty in this case, is now in exposure station C. It should be noted that at this point in time bits 1-4 of the table above are fed into stages 4-1 of the shift register.

While the zero position bit advances through shift register 74 to stage 10 , winding 84 maintains development motor 14 on due to the action of NOR gates 81 and 82 on the high levels of the zero position bit and select bits 1, 2 and 4, the after the zero position bit are shifted through the shift register 74 in sequence every 332 ms. Thus, when the zero position bit reaches stage 10 of shift register 74, the output of NOR gate 82 is low due to the presence of the zero position bit in stage 10, the one position bit in stage 9, and the two position bit in stage 8, while NOR gate 81 is low due to the presence of the quad position bit in stage 6 of the Sch! 'cregisters 74. For the example chosen, the normally switched off development motor 24 is switched on when the zero position bit arrives in stage 5 of the shift register 74 and remains in operation until the selection bit in the fourth position reaches stage 11 of the shift register 74 Development motor 24 turned off because bits 5-11 are jump signals or low levels that do not meet the OR requirements of NOR gates 81 and 82

ίο suffice. The motor remains off until bit 11 reaches stage 5 of shift register 74. It can thus be seen that the developing device is normally left idle so that toner is not wasted unnecessarily and the accumulation of residual toner is avoided, but that the developing motor is started early enough to ensure adequate toner flow when an image is transferred is to be and remains in operation as long as an image to be transferred is formed on the photosensitive drum 20 or is present in the development station D.

When the zero position bit reaches stage 12 of shift register 74, its associated high level is applied to inverting AND gates 85, 86 and 95 via conductors 87, 88 and 94 to set up those gates. Simultaneously with the shift of the zero position bit into stage 12, the ones position bit, which is also a selection bit, is shifted into stage 11 , and a clock pulse from system clock 70 causing this shift is present on conductor 79. The AND conditions of the first inverting AND gate 85 are thus fulfilled and the output of this gate goes negative for 230 ms. This represents the dwell time between the machine cycle and the duration of the clock pulse. Correspondingly, the output of the second inverting AND gate 86 goes low, since a high level corresponding to the selection is present at each gate input. However, the second inverting AND gate 86 remains low for 332 ms, which corresponds to the machine cycle time or the shift speed of the shift register 74. The outputs of the first and second inverting AND gates 85 and 86 meet the OR conditions of the OR gate 90, which then generates a low output level. This low output is fed to the input of the OR gate 91, which also goes low and thereby energizes the winding 92 of the single-turn clutch 15 so that the feed of the copy tape 9 begins. The low output of the second inverting AND gate 86 is also applied to the D input of the flip-flop 96; however, this flip-flop is only set by this input when a clock pulse is generated by the timer 98 for the selective transfer mechanism.

After the copy strip 9 has come up to speed and at a point in time that is due to the Position of the leading edge of the time slice 3 ′ with respect to the leading edge of the time slice 3 is determined, which in the present case represents an interval of 10 ms, for example, is generated by the timer 98 of the selective transmission mechanism, a clock pulse which, under the conditions mentioned above, the inverting AND gate 95 controls and allows the flip-flop memory 96 through the input from the second inverting AND gate 86 is set. The output of the inverting AND gate 95 remains although only low for the duration of the clock pulse, the

however, the low output of flip-flop 96 remains until it is later changed by changing the Output level of AND gate 86 and the simultaneous appearance of a clock pulse from the timer 98 is reset. Both outputs, that of the inverting AND gate 95 and that of the flip-flop memory So 96 are low and so are the input conditions for the inverting OR gate 99 met So the output of the inverting OR gate 99 goes high, causing the relay the selective transmission mechanism under the action of the relay driver stage 100 and the relay winding 101 is released so that the copy tape 9 in the form shown in FIG. 1 described quickly with the photosensitive drum 20 is brought into contact. So if in stage 12 of the shift register 74 on Selection level is present, the paper feed is set in motion so that the transfer tape on Speed can come, and after that the relay 26 becomes the selective transmission mechanism brought to fall, whereby the solenoid 27 of the transmission mechanism is de-energized and the selective transmission mechanism 25 in the FIG. 1 set into action to transfer the toner image.

If in the next machine cycle the ones position bit in stage 11 of shift register 74 in stage 12 is shifted and the twos position bit of level

10 is shifted to stage 11, the first inverting AND gate 85 goes low and shortly thereafter it is followed by the inverting AND gate 95. Due to the holding effect of the second inverting AND gate 86 and the corresponding effect of the flip-flop 96, the one-turn clutch 15 is not disengaged and the relay 26 is not closed. So the transfer process is ongoing continuously during this period as the copy tape 9 is continuously advanced and from the transfer mechanism is kept in contact with the photosensitive drum. Since also the two position bit in stage 11 is also a selection bit, the holding effect of the second inverting bit is repeated during this operating cycle AND gate 86 and the flip-flop memory 96. If, however, on the next machine cycle, the two-position bit (Selection) is shifted to stage 12, the triple position bit (jump) is shifted to stage 11 of the shift register. True, the inverting AND gates 85 and 95 of the selection bit in stage 12 of the shift register are still satisfied, so that the One-turn clutch 15 is kept engaged and the relay 26 remains de-energized, in each case for the duration their corresponding clock pulses; the holding action of the second inverting AND gate 86 and the Flip-flop memory 96, however, is not brought into play. Therefore, after the completion of the first inverting AND gate 85 applied system clock pulse the one-turn clutch 15 after a full Revolution disengaged, with which the advance of the transfer strip is ended. Next is after Completion of the clock pulse supplied by the timer 98 brought the relay 26 into contact, whereupon the copy tape 9 is quickly lifted off the photosensitive drum 20 by the solenoid 27 energized and the transmission mechanism 25 is pivoted. This state remains with the above Example of a data input sequence persist until the bit

11 shifted to stage 12 of shift register 74

will. At this point in time, the pulsed operating mode begins again solely in that the inverting AND gates 85 and 95 are activated in the manner just described. As can be seen, as soon as a selection bit enters stage 12 of the shift register, which corresponds to the position of the associated document information in the vicinity of the transfer point E , the one-turn clutch 15 is engaged to initiate the feed of the copy strip 9, and a short time afterwards When the relay 26 of the transmission mechanism is lifted, the copy tape 9 is brought into contact with the drum 20. This is done by de-energizing the contraction solenoid 27, whereupon the expansion spring

28 drives the selective transmission mechanism 25 in its second position. This process stands under the control of system clock 70 and timer 98 for transmission and runs in less as one machine cycle, if not the previous stage of the shift register 74 also one Contains selection bit, whereby continuous operation is obtained for the entire machine cycle. Assuming that the infeed roller 6 is operating properly, the counter 78 receives one Clock pulse from the system clock 70 for each revolution of the infeed roller 6, followed by a pulse of the Timer 54 for the query window when the leading edge of the data card is inserted and is perceived. Since the system clock 70 is connected to the data input of the counter 78, and the query window timer 54 with the clear input of the counter results for the one considered above Bit sequence of the eleven data cards that the counter 70 is set to one eleven times and then cleared. if

J5, however, the cards are used up, d. i. after the When the eleventh card is entered, no more clear entries are received from the timer 54. From then on it switches the counter 78 advances one step for each pulse received from the system clock until the Counter reading has reached fifteen. When the counter has counted to fifteen, there will be a for that count characteristic signal applied to the driver stage 103, whereby the start-stop relay 104 is de-energized and the system is switched off. Then a next batch of data cards can be loaded for more Passes or the signal generator 93 for the advancement of the transfer tape can be of a Operator operated to select the strip section on which the selective copies are attached

have become to output from the selective printing device.

The invention has been described above for a single detailed embodiment; but lets a broad term of selective electrophotographic printing systems as described herein, a Numerous variations, modifications, and alterations in the specific techniques discussed herein to which should be included in the invention. So was z. B. the invention in connection with a

bo selective printing device described in the receipt information mapped with relatively small dimensions on coded records and selectively transferred to a copy element; yet the teaching of the invention is based on evidence information Any dimensions and any format applicable, so that within the scope of the invention all Forms of information recordings on any common or suitable record format selectively

can be read out and copied. Also, the invention is equally applicable to toner images Dimension applicable and to any transfer process that requires a suitable form of a copier element, such as a sheet, web, strip, or drum is used. In place of the shown drive for the transfer tape any suitable winding and winding device or a Belt conveyors occur, provided that this device is able to use the copying element ι υ stop and start selectively and, once started, bring it up to speed quickly. at In the example shown, complete toner images were transferred. But the invention can just as well provide for the transfer of selected portions of the toner images from appropriately encoded recordings or rearranging the format on a copy element. In the example, a assumed optical coding of the recording medium, but other coding and Scanning techniques can be used, such as magnetic coding and scanning. The invention is independent of the specific electrophotographic used to form an image to be transferred Procedure.

Instead of the special switching arrangements described for scanning and selection and the logic and control, many modifications can be used within the scope of the invention. So you can, for example use delay circuits with variable taps instead of the shifting device described. Since the position of certain selection and jump bits in the shifter depends on the position corresponds to the assigned document information in the electrophotographic process, one can therefrom derive any number of control outputs. The specific logical configurations of the figure and description can be replaced by any conventional logic arrangement calculated so that they serve the same purpose; specific logical elements can also be varied at will to suit the chosen construction. In the selection circuit you can choose more or less Selection channels are used to meet the requirements of a particular design, and A greater or lesser selectivity can easily be achieved within a given selection channel achieve.

For this purpose 3 sheets of drawings

Claims (6)

Patent claims: 1. Control device for a selectively operating electrophotographic copier with a moving Recording material and with several workstations, in which the templates one after the other an exposure station and in which of markings on the originals selection control signals for the control of the transmission ι ο station are derived, characterized in that that the selection control signals of a multi-stage which can be incremented by clock pulses Circuit arrangement (74) are supplied that at the outputs of the individual stages (S-12) Control signals can be derived that the timing of the operation of the work stations during correspond to a copy cycle and that in dependence on occurring at the step outputs Selection control signals the workstations are controllable. 2. Control device according to claim 1, characterized in that the multi-stage circuit arrangement (74) has a series input and parallel outputs. 3. Control device according to claim 1 or 2, characterized in that the multi-stage Circuit arrangement (74) is a shift register (74). 4. Control device according to one of claims 1 m to 3, characterized in that a first group of stages (5-10) of the multi-stage circuit arrangement (74) a number of image positions along the path of movement of the recording material between the exposure station (C) and the exit point the developer station (D) is assigned that the outputs of the first group of stages (5-10) are connected to a first circuit arrangement (75, 83), with at least one control signal at the output of the first circuit arrangement (75, 83) a signal can be derived in the first group of stages (5-10), by means of which the developer station (D) can be switched on or its switched-on state can be maintained. 5. Control device according to one of claims 1 to 4, characterized in that a second group of stages (11-12) of the multi-stage circuit arrangement (74) comprises a first (11) and a second (12) stage immediately following this, wherein the second stage (12) is assigned to an image position along the path of movement of the recording material shortly before the transfer station (E) , so that the outputs of this first (11) and this second (12) stage are connected to a second circuit arrangement (76, 90), wherein A signal can be derived at an output of this second circuit arrangement (76, 90) by means of which a drive device for moving an image receiving material (9) can be switched on during the image transmission when a selection control signal is present in the second stage (12) and through which, if a selection control signal is present at the same time a selection control signal in the first stage (11), the switched-on state of the drive device can be maintained. 6. Control device according to claim 5, characterized in that a third circuit arrangement (77,99,100) is provided which is connected to the second stage (12) of the second group of stages (11, 12) and to an output of the second circuit arrangement (76, 90) is connected that a signal can be derived at the output of the third circuit arrangement (77, 99, 100), by means of which the transmission station (E) can be controlled in the image transmission state in the presence of a selection control signal in the second stage (12) and through which the the simultaneous presence of a selection signal in the first stage (11) of the second group of stages (11, 12), the image transmission state can be maintained