DE19933266A1 - Radio signal reception device for mobile communications IC - Google Patents

Abstract

The device includes a signal processing arrangement (3) which subjects a received signal to an automatic frequency correction, filtrating, and a DC-offset elimination, and which outputs the resulting signal for further signal processing. The radio signals are preferably phase-modulated radio signals with an In-phase component (I) and a Quadrature component (Q), whereby the signal processing arrangement is designed in such way, that it processes.

Description

The present invention relates to a device for emp catch radio signals, especially for receiving band spread cellular signals.

Telecommunications is one of the fastest developing winding technologies. In the field of mobile radio immediately at the standardization and development of the the so-called third generation of mobile communications, which with the term UMTS (Universal Mobile Telecommunications Sy stem) is called and a global uniform Chen provides cellular standard.

According to the UMTS cellular standard is called multiple access process the so-called CDMA (Code Division Multiple Access) - or code division multiplex technology used. It acts it is a multiple access method in which all part is allowed to subscribers of the corresponding mobile radio system, at the same time the entire available system belt wide use. To avoid collisions between the individual The individual will be able to avoid participants Verse subscriber signals with different code sequences hen, which is a clear assignment of the received Enable signals. One occurs during this process Spreading of the individual signals on, which increases the bandwidth multiplied, so that this technique is also used as a spread spectrum technology is called. In particular, those to be transferred data of a participant with a code sequence multi plicated or spread, which is independent of the over carrying data. The band-spread Sig thus obtained nal is then mounted on a high-frequency carrier dulated and transmitted to a corresponding recipient. The Receiver demodulates this band-spread signal and performs a de-spreading or de-spreading, whereby a syn  chrone code sequence is used. The recipient receives not just the desired signal from the transmitter, but also additional signals from other transmitters that are in the same Send frequency range. The despreading process will but ensured that only the signal despreads and in the Bandwidth is reduced, which is the same and synchro NEN spreading code used as the receiver, so that after the Despread the desired signal in a simple way can be filtered out.

While receiving devices for the currently usual GSM (Global System For Mobile Communication) -Mo are known, the problem of reception band-spread signals in mobile devices for the third Mobile phone generation not yet resolved.

The present invention is therefore based on the object to provide a device for receiving radio signals len, which in particular in receivers of the third Mo bilfunkgeneration can be used and thus also for Reception of spread spectrum signals is suitable.

This object is achieved by a device with solved the features of claim 1. The subclaims de define preferred and advantageous embodiments men of the present invention.

According to the invention, a received radio signal is transmitted from a Automatic frequency signal conditioning device correction, filtering and a DC offset offset subjected to side. In the signal processing device can also gradually decimate the sampling rate and Synchronization of the received signal take place.

In a first embodiment, the au Tomatical frequency correction, then the low pass filtering and finally the DC offset correction, while at  a second embodiment of the invention, the reception signal first wave filtering, then the DC component offset side and only then the automatic fre frequency correction and the final low-pass filtering un is educated.

Suitable for performing automatic frequency correction the so-called CORDIC algorithm, whereby within the The present invention has a corresponding circuit technical implementation is proposed.

The receiving device according to the invention is more advantageous programmable and can therefore be extremely flexible software adjustment can be modified if later other standards are to be included. The hardware does not have to be changed for this.

The present invention is particularly suitable for one set in UMTS receivers, d. H. the invention is suitable special, but not only, for processing bandge spread signals. In general, the present invention u. a. when using FDD (Frequency Division Duplex) -, TDD (Time Division Duplex) or multi-carrier CDMA technology advantageous.

The invention is described below with reference to the Drawing based on preferred embodiments, he closer purifies.

Fig. 1 is a simplified block diagram showing a first embodiment of a device according to the invention,

Fig. 2 is a simplified block diagram showing a second embodiment of a device according to the invention,

FIG. 3 shows a block diagram of a frequency correction unit provided in FIGS. 1 and 2, and

FIGS. 4A and 4B are views for explaining the radio tion as an opening provided in Fig. 1 and Fig. 2 RRC (root raised cosine) unit.

In Fig. 1 a first embodiment of the present invention in the form of a Vorempfängerstufe (receiver front-end) is shown a mobile radio receiver; which the I and Q components of a spread spectrum signal are supplied.

Phase-modulated signals can be used as a vector in the phase space represent, thus referred to as an I / Q diagram Representation of the signal pointer is obtained. Inscribed I the signal component which is in phase with the respective gene carrier signal, while Q is that signal component referred to, which is perpendicular to the carrier phase. The I-com component is therefore also used as an in-phase component and the Q-Kom component called the quadrature component.

The device shown in FIG. 1 contains an analog low-pass filter 1 for both the I branch and the Q branch, the output signal of which is converted into a digital signal with a resolution by an analog / digital converter 2 (A / D converter) of 8 bits, for example. The digital signal supplied by the A / D converters 2 can, for example, be oversampled eight times and thus have a frequency of 8 / T _c , where T _c denotes the receive bit period.

According to the invention the digital signal is subjected to decimation of the sampling rate then ei ner signal processing unit 3, an automatic Fre quenzkorrektur (Automatic Frequency Correction, AFC), a DC offset canceller (DC offset removal) and digital filtering for the suppression of adjacent channel interference . The respectively valid parameter values for frequency correction, DC offset elimination and / or digital filtering are set by a digital signal processor 18 via a corresponding programming bus. The output signal of this signal processing unit 3 has a rate of 2 / T _c and a resolution of 8 bits.

To realize the above-described objects of the signal processing unit 3 is shown in FIG. 1, first an AFC A unit 7 for automatic frequency correction provided, the output signals processed by a digital FIR filter (Finite Impulse Response) and low-pass filtered who to, while in addition the sampling rate is reduced. The output signals of the FIR filter 8 are finally fed to a unit 9 for eliminating the DC offset.

In FIG. 2, a second embodiment of the present the invention for the construction of the signal processing unit 3, wherein this embodiment differs from that shown in Fig. 1 embodiment in that first a digital wave filter 10 is provided to which the output signals of the upstream A / D converter 2 (see FIG. 1) are supplied. The digital wave filter 10 is followed by the unit 9 for DC elimination already shown in FIG. 1 and the AFC unit 7 . In addition (corresponding to the FIR filter 8 shown in FIG. 1), a digital low-pass filter 11 is provided on the output side according to FIG. 2 for decimating the sampling rate.

The embodiments shown in Fig. 1 and Fig. 2 for the structure of the signal conditioning unit 3 thus differ essentially in the order of under different processing operations.

The output signals of the signal conditioning unit 3 are fed to an RRC unit 4 (root-raised cosine) for pulse shaping both in accordance with FIG. 1 and in accordance with FIG. 2. The RRC unit 4 corresponds in principle to a digital filter whose filter coefficients can also be programmed by the digital signal processor 18 via the programming bus mentioned above. The output signals of the RRC unit 4 have, for example, a word length of 8 bits and a sampling rate of 2 / T _c . On the output side, the RRC unit 4 is connected to an RSSI unit 5 (radio signal strength indicator) and a rake receiver 6 .

The RSSI unit 5 measures the signal values supplied by the RRC unit 4 and is fed back either directly or indirectly via the digital signal processor 18 to the digital reception filters 8 and 11 , respectively, in order to set these filters accordingly, if necessary, to limit the reception signal level .

The rake receiver 6 enables a clear signal gain through the use of multiple signals that reach the receiving device with different delay delays. For this purpose, the signal coming from the antenna of the receiving device is processed in several paths (the so-called "fingers" of the rake receiver). Each of these "fingers" is optimally adjusted to a specific multipath signal with regard to its phase position. In addition, at least one "search finger" is usually provided, which is constantly looking for stronger multipath signals. If the "search finger" has discovered such a signal, the finger of the weakest signal to date is optimally adjusted to the newly discovered multi-way signal. In this way, several strong multi-way signals can be demodulated and combined in the receiver. The output signals supplied by the rake receiver 6 are then output for further processing, in particular for despreading (when using CDMA technology) and decoding.

The individual components shown in FIGS. 1 and 2 are to be explained in more detail below.

The AFC unit 7 uses the so-called CORDIC algorithm for automatic frequency correction. It is an iterative algorithm that can be used to eliminate a specific frequency offset. The general basics of the CORDIC algorithm are described, for example, in "The CORDIC Trigometric Computing Technique", JE Volder, IRE Trans. Electronic Computers, vol. 8, pages 330-334, 1959 or "A Unified Algorithm For Elementary Functions", JS Walther, Spring Joint Conference pages 370-385, 1971.

In the present case, the CORDIC algorithm is used in the trigonometric coordinate system, with an input vector with the pair of values (I _n , Q _n ) around the predetermined angle

α _n = arctan (2 ^-n ) with n = 0, 1 ^,. . . , N-1

is rotated. N denotes the iteration length.

The angular sequence {α ₀ , α ₁ ,. . . , α _N-1 } with α ₀ <α ₁ <. . . <α _N-1 is determined such that in each case an angle z which defines the condition | z | ≦ D with D = α ₀ + α ₁ + .., +. . . , α _N-1 fulfilled, can be represented by a suitable linear combination of the individual angles α _n :

z ≈ σ ₀ α ₀ + σ ₁ α ₁ +. . . + σ _N-1 α _N-1 with σ _n = ± 1

D is referred to as the convergence area.

In this way, the input vector (I _n , Q _n ) is not rotated directly by the angle z, but by a sequence of N on successive "microrotations" by the smaller angles σ _n α _n . Here, σ _n corresponds to the sign of the nth micro rotation, which is determined as a function of the angle z.

The basic idea of the CORDIC algorithm is to implement all microrotations by simple shifting and adding processes:

I _{n + 1} = I _n - σ _n 2 ^-n Q _n
Q _{n + 1} = σ _n 2 ^-n I _n + Q _n

As can be derived from the above formula for α _n , the vector (I _N , Q _N ) depending on the vector (I ₀ , Q ₀ ) can be used to represent:

K is a constant scaling factor that is independent of is the angle of rotation z.

In Fig. 3 is a circuit arrangement for implementing the automatic frequency correction using the CORDIC algorithm is illustrated. It is assumed that f _{0 represents} the frequency offset to be corrected, T _c the received bit period and m the oversampling factor of the baseband signal to be processed with the CORDIC algorithm.

The complex baseband signal i (k) + jq (k) (k denotes the scanning index) defined by the signal components i (k) and q (k) is multiplied by exp (jz (k)), where:

This multiplication is carried out using the CORDIC algorithm, the phase accumulation being carried out by the accumulator 16 shown in FIG. 3. A control unit 14 designed in the form of a ROM memory is used to control the individual microrotation units 13 ₀ . . . 13 _N-1 required rotational sign σ ₀ . . . σ _N-1 generated. The iteration length can be, for example, N = 16, so that 16 microrotation units are seen accordingly.

As has already been mentioned, the CORDIC-Al algorithm only angle z with | z | ≦ D processed. For N = 16, D ≈ 99 °. The angle or phase increment can however, for each bit period be so large that the value z (k) can reach values greater than 360 ° during a burst.

In the circuit arrangement shown in Fig. 3, the angle z is therefore reduced such that it always carries a maximum of 90 ° be. For this purpose, the value w (k) = w (k-1) -f ₀ T _{c is} accumulated according to FIG. 3 with the aid of the accumulator 16 and a delay element 17 , where:

Bit pattern 111. . . 111 of w (k) corresponds to the fixed point dar position of the maximum value w (k) ≈ 1 or z (k) ≈ 2π. Consequently is the modulo operation w (k) mod 1 or z (k) mod 2π reali so that the angle z (k) is always within the range of values 0 ≦ z (k) ≦ 2π is limited.

The individual values w (k) are stored in the register 15 shown in FIG. 3 and are used to control the ROM memory 14 , which will be explained in more detail below.

The CORDIC algorithm has good results if the phase angle z (k) is in the first or fourth quadrant. Therefore, in the circuit arrangement shown in FIG. 3, the sign of i (k) and q (k) is multiplied by -1 if z (k) lies in the second or third quadrant. The pair of values (-i (k), - q (k)) is then rotated by the angle z (k) -π, this angle being certainly in the fourth or first quadrant. This task is performed by the unit 12 shown in FIG. 3, which either negates the sign of i (k) and q (k) depending on a control signal s of the ROM 14 .

The ROM memory 14 is designed in such a way that for each value w (k) = (w ₀ , w ₁ ,..., W _{N + 1} ), corresponding values for s and σ ₀ . . . σ _N-1 can be read out, where w _{0 represents} the most significant bit (MSB) of w (k). The sign flag s can be determined directly by the logical operation w ₀ XOR w ₁ , since these two bits determine the quadrant of the phase angle z (k). The sign of the first microrotation σ ₀ is always identical to w ₁ , since σ ₀ = +1 always applies to the first direction of rotation in the first and third quadrants.

The remaining N-1 signs σ ₁ . . . σ _N-1 , however, are from the remaining N bits w ₁ , w ₂ ,. . . , w _{N + 1 of} the w (k) register 15 is derived. The ROM memory 14 can consequently be implemented in the form of an N bit × (N-1) bit table in combination with an XOR gate, in this ROM table for each combination of the bits w ₁ , w ₂ ,. . . , w _{N + 1} the corresponding values for the sign σ ₁ . . . σ _{N-1 are} filed.

The unit 9 for DC offset elimination is designed in such a way that a direct current / direct voltage or DC offset is eliminated by adding or subtracting a constant value. With the 8 bit resolution described above, this constant value can be in the value range -128. . . 128 lie. The unit 9 can thus be easily implemented, for example, by an adder, to which the output signal of the upstream unit and the constant value to be added are supplied. The output signal of the adder is then simultaneously output as the output signal of the DC offset elimination unit 9 .

The RRC unit 4 serves to achieve an optimal band restriction with an optimal frequency response. For filtering, the following impulse response g (t) can be used by the RRC unit 4 as the root-raised cosine function:

The parameter r (0 ≦ r <1) is called the rolloff factor. In Fig. 4A, the function g (t) is shown in the form of a time-shifted section for r = 0.22 (with sixteen times oversampling).

The autocorrelation function ϕ (t) of the RRC function g (t) has the desired RRC characteristic, which the Nyquist criterion fulfills to avoid inter-symbol interference:

The autocorrelation function ϕ (t) of the RRC function g (t) shown in FIG. 4A is shown in FIG. 4B.

The RRC unit 4 with the RRC function g (t) described above can have, for example, shift registers of length 20 and word length 8 bits for the I and Q branches, where two or four adjacent shift register cells of the I- and Q branch are connected to a multiplexer whose output signal is multiplied by the filter coefficients of the filter function g (t), so that the filter coefficients are multiplied alternately for the I branch and the Q branch by the values stored in the shift register cells become. The results of the shift operations are added and their sampling rate is reduced, the filtered values for the I and Q branches alternately being output by a demultiplexer with double oversampling.

The RSSI unit 5 can finally be realized by a programmable mean value images. The RSSI unit 5 calculates the following value:

The length M of the averaging is variable and programmable by the digital signal processor 18 via the programming bus. The length M should, if possible, be chosen so that an average over an entire time slot, half a time slot or a quarter time slot is averaged. The result of the averaging can be shared with the digital signal processor 18 by the RSSI unit 5 via the programming bus, for example with a maximum transmission rate of 6400 words / s.

Reference list

1

Analog low pass filter

2nd

A / D converter

3rd

Signal processing unit

4th

RRC (Root-Raised Cosine) unit

5

RSSI (Radio Signal Strength Indicator) unit

6

Rake receiver

7

Automatic frequency correction unit

8th

FTR filter

9

Unit for DC offset elimination

10th

Digital wave filter

11

Digital low pass filter

12th

Sign selection unit

13

Microrotation unit

14

ROM memory

15

register

16

accumulator

17th

Delay element

18th

Digital signal processor
I, i in-phase component
Q, q quadrature component
f ₀

Frequency offset
T _c

Bit period
m oversampling factor
t time

Claims (18)

1. A device for receiving radio signals, characterized in that a signal conditioning device ( 3 ) is provided in order to subject a received signal to automatic frequency correction, filtering and DC offset elimination and to output the received signal processed in this way for further signal processing . 2. Device according to claim 1, wherein the radio signals are phase-modulated radio signals with an in-phase component (I) and a quadrature component (Q), characterized in that the signal conditioning device ( 3 ) is designed such that it subjects the in-phase component signal (I) and the quadrature component signal (Q) to the automatic frequency correction, filtering and DC offset correction. 3. Apparatus according to claim 1 or 2, characterized in that the received signal of the signal processing device ( 3 ) via an analog / digital converter ( 2 ) is supplied, and that the signal processing device ( 3 ) for performing a digital frequency correction, digital filtering and a digital DC offset elimination is designed. 4. Device according to one of claims 1-3, characterized in that the functions of the signal conditioning device ( 3 ) for automatic frequency correction, filtering and DC offset offset Be programmable. 5. Device according to one of claims 1-4, characterized in that the signal conditioning device ( 3 ) comprises:

• - frequency correction means ( 7 ), to which the received signal is routed and which subjects the received signal to automatic frequency correction,
• - low-pass filter (8) which are connected to the output of Fre quenzkorrekturmittel (7) and the output signal of the frequency correction means (7) undergo a low-pass filtering, and
• - DC component offset eliminating means ( 9 ) which are connected to the output of the low-pass filter means ( 8 ) and eliminate a DC component offset contained in the output signal of the low-pass filter means ( 8 ).

6. Device according to one of claims 1-4, characterized in that the signal conditioning device ( 3 ) comprises:

• - Wave filter means ( 10 ), which the received signal is supplied to and which subject the received signal to wave filtering,
• Direct component offset removal means ( 9 ) which are connected to the output of the wave filter means ( 10 ) and eliminate a direct component offset contained in the output signal of the wave filter means ( 10 ),
• - Frequency correction means ( 7 ), which are connected to the output of the DC offset elimination means ( 9 ) and subject the output signal of the DC offset elimination means ( 9 ) to an automatic frequency correction, and
• - low-pass filter (11) which are connected to the output of Fre quenzkorrekturmittel (7) and the output signal of the frequency correction means (7) undergo a low pass filtering.

7. Apparatus according to claim 5 or 6, characterized in that with the output of the signal processing device ( 3 ) an output signal level detection device ( 5 ) is connected, which monitors the output signal level of the signal processing device ( 3 ), depending on the output signal level he picked up the filter coefficients of the low-pass filter means ( 8 ; 11 ) for restricting the output signal level of the signal processing device ( 3 ) who set the. 8. Device according to one of claims 5-7, characterized in that the frequency correction means ( 7 ) are designed such that they eliminate a frequency offset of the signal supplied to them using the CORDIC algorithm. 9. The device according to claim 8, characterized in that the frequency correction means ( 7 ) comprise N series-connected rotation units ( 13 ), each rotating the phase of the signal supplied to them by a certain phase angle,
wherein the nth rotation unit ( 13 ) rotates the phase by the angle a _n = arctan ( 2 ^-n ), and
Control means ( 14-17 ) are provided which, depending on a frequency offset (f ₀ ) of the signal supplied to the frequency correction means ( 7 ), determine an overall phase rotation angle z and the sign σ _n for the phase rotations of the individual rotation units ( 13 ) so that the condition z ≈ σ ₀ α ₀ + σ ₁ α ₁ +. . . + σ _N-1 α _N-1 with σ _n = ± 1 is satisfied. 10. Apparatus according to claim 9 and claim 2, characterized in that the rotation units ( 13 ) are designed such that they perform the rotation of the phase by the following calculation
I _{n + 1} = I _n - σ _n 2 ^-n Q _n ,
Q _{n + 1} = σ _n 2 ^-n I _n + Q _n
where I _n denotes the in-phase component and Q _n denotes the quadrature component of the signal supplied to the nth rotation unit ( 13 ). 11. The device according to claim 10, characterized in that before the first rotation unit ( 13 ₀ ) sign inverting means ( 12 ) are connected, the sign inverting means ( 12 ) being controlled by the control means ( 14-17 ) in such a way that they multiply the in-phase component and quadrature component of the signal supplied to the first rotation unit ( 13 ₀ ) by -1 if the total phase rotation angle z is in the second or third quadrant, the control means ( 14-17 ) in this case also determine the sign for the phase rotations of the individual rotation units ( 13 ) such that the in-phase component and the quadrature component of the first rotation unit ( 13 ₀ ) supplied signal is rotated by an angle z-π. 12. Device according to one of claims 9-11, characterized in that the control means ( 14-17 ) are designed such that they determine the total phase rotation angle to the value range 0 as a function of the frequency offset (f ₀ ). . . Limit 2π. . 13. The device according to any one of claims 5-12, characterized in that the DC offset removal means ( 9 ) are designed such that they add or subtract a constant value to the signal supplied to them. 14. Device according to one of the preceding claims, characterized in that the signal conditioning device ( 3 ) is connected on the output side to an RRC filter device ( 4 ). 15. The apparatus according to claim 14, characterized in that the impulse response g (t) of the RRC filter device ( 4 ) fulfills the following relationship:
where r is a variable parameter with a value range of 0. . . 1 and T _c denotes the bit period of the received signal. 16. The apparatus according to claim 14 or 15, characterized in that the RRC filter device ( 4 ) is connected to a rake receiver ( 6 ). 17. Use a device according to one of the preceding the claims in a mobile radio receiver for receiving spread spectrum mobile radio signals. 18. Use according to claim 17, characterized, that the mobile radio receiver is a UMTS mobile radio receiver.