DE112012006561B4 - Phase error detection apparatus and phase error detection method - Google Patents

Abstract

A phase error detection device (1) comprising: an error component detector (31) for detecting, on the basis of a received baseband signal (r) generated by orthogonally demodulating a received carrier band signal, error component signals (Pe) indicating a phase error of the received baseband signal the carrier band signal being an OFDM signal wirelessly received by a transmitting device; a signal classification unit (51) for receiving a sequence of error component signals (Pe) as input and for performing a classification process which converts each of the error component signals into one A plurality of phase ranges classified defining a detection range of the phase error; a retry controller (52) for executing a determination process to determine whether the phase error signal (Pe) is in at least one particular phase range among the plurality of phase ranges for a designated number of Ma len (TH1) defined by a natural number; an update processor (53) for executing an update process that reduces the detection range when it is determined that the phase error signal has entered the specified phase range for the designated number of times (TH1 a signal output unit (43) for outputting a phase error signal corresponding to a stable state value of the phase error, the stable state value representing a value in the specified phase range when it is determined that the specified phase range satisfies a prescribed inclusion condition; and a condition management unit (45) for setting an inclusion determination number (TH2) in response to a parameter indicating a transmission format of the received signal and / or a status detection signal representing a channel status, the repetition controller (52) determining whether the determined phase range satisfies the inclusion condition by using, as the inclusion condition, the condition that the number of times the update process has been executed has reached the inclusion determination number; andthe classification unit, the iteration controller and the update processor repeatedly execute the classification process, the determination process and the update process until the determined phase range satisfies the inclusion condition.

Description

TECHNICAL AREA

The present invention relates to a technique for detecting a phase error in a received baseband signal due to a carrier frequency error in a received carrier band signal, in particular a technique for detecting the phase error on the basis of the received baseband signal in the time domain.

STATE OF THE ART

Wireless receiving devices generally generate a received baseband signal by orthogonally demodulating a received signal in the carrier band (carrier frequency band). If there is an error (frequency error) in the carrier frequency, there will be a phase error due to the frequency error in the received baseband signal. Wireless receiving devices therefore have functions for detecting and compensating for this type of phase error.

If there is a frequency error in a received carrier band OFDM signal sent by the orthogonal frequency division multiplexing (OFDM) system and the frequency error is not compensated, the quality of the frequency domain signal that is obtained by performing a Fast Fourier Transform (FFT) suffers. is generated on the baseband OFDM signal. Techniques for detecting a frequency error in the received OFDM signal and compensating for the JP 4584756 B2 Frequency error are for example in the Japanese patent JP 3793534 B2 (Patent Reference 1), Japanese Patent (Patent Reference 2) and Japanese Patent Application Publication JP 2006-211441 A (Patent Reference 3).

Patent references 1 and 2 disclose techniques based on the frequency domain signal following an implementation of the FFT that uses a pilot signal or control signal included in the frequency domain signal to detect a frequency error and to correct the frequency error. The pilot signal detection apparatus disclosed in Patent Reference 1 can detect a frequency error in units of the subcarrier spacing by detecting a pattern to obtain the maximum value among the carrier symbol power sums of a plurality of pilot signal arrangement patterns. The OFDM receiving device disclosed in Patent Reference 2 calculates a signal power by calculating the square of the absolute value of an AC (auxiliary channel) signal or a TMCC (transmission and multiplexing configuration control) ) Signal in the frequency range immediately after the Fourier transformation and detects a frequency error (frequency offset) from the result of a correlation of this signal power with position information that indicates a subcarrier position. However, the frequency error detection accuracy of the techniques disclosed in Patent References 1 and 2 is limited because both detect frequency error in subcarrier units.

The OFDM modulator disclosed in Patent Reference 3 has a carrier recovery unit that detects a frequency error based on the baseband signal in the time domain before the FFT execution; it is a feature of this OFDM demodulator that it can generally detect a frequency error in a shorter time than the methods disclosed in Patent References 1 and 2 which use a frequency domain signal to detect a frequency error.

In particular, the carrier recovery unit in patent reference 3 comprises a delay unit for delaying the baseband signal for a time corresponding to the valid symbol period, a correlation calculator for calculating a correlation between the baseband signal and the output of the delay unit, a normalizer for normalizing the output of the correlation Calculator, a section integrator for integrating a section of the output of the normalizer to detect a carrier frequency offset (frequency error), a reliability determiner for determining the reliability of the detected carrier frequency offset based on a power value of the output of the section integrator, and a loop filter for controlling the oscillation frequency used for orthogonal demodulation in response to the determined result of the reliability determiner. In this OFDM demodulator, when the reliability of the carrier frequency offset is high, the loop gain is increased so that the synchronization consideration time (the transition time from the point at which reception starts to the point at which synchronization of the carrier frequency is established is) can be shortened. The synchronization inclusion time can thereby be shortened in response to the channel environment.

PRIOR ART REFERENCES

PATENT REFERENCES

• Patent Reference 1: Japanese Patent JP 4584756 B2 (Paragraphs 0039-0046, 5 and 6th , Etc.)
• Patent reference 2: Japanese patent JP 3793534 B2 (Paragraph 0035)
• Patent Reference 3: Japanese Patent Application Publication JP 2006-211441 A (Paragraphs 0042 and 0055-0056, 2 , Etc.)

US 8 107 328 B1 describes a method for efficiently calibrating an optical recording device. The method includes determining an in-phase component or a quadrature component of a phase error, comparing the phase error with a threshold value and counting the number of times the phase error exceeds the threshold value. Furthermore, a quality metric is determined based on the phase errors, with the aid of which the device can be optimally adjusted.

US 2006/0 062 341 A1 , U.S. 5,463,627 A , US 2008/0 172 193 A1 , US 6,751,270 B1 , U.S. 5,832,040 A and DE 693 33 899 T2 describe further methods for determining phase errors.

SUMMARY OF THE INVENTION

PROBLEMS TO BE SOLVED BY THE INVENTION

However, the effect of shortening the synchronization inclusion time disclosed in Patent Reference 3 depends on the accuracy of the power value of the section integration result referred to by the reliability determiner and also on the determination speed of the reliability determiner. Therefore, an adequate shortening effect cannot be obtained if the calculation accuracy or determination speed of the section integrator is low. For example, in a chronically poor reception environment, typically a weak field strength environment, there is the possibility that the reliability determiner will always determine that the reliability is low so that no synchronization inclusion time shortening effect is obtained.

In view of the above, it is an object of the present invention to provide a phase error detection apparatus, a phase error detection method and a receiving apparatus which can shorten the time required to establish carrier frequency synchronization and lower a phase error detection accuracy can mitigate.

MEANS TO SOLVE THE PROBLEM

This object is achieved by the subjects of the independent claims. The dependent claims relate to preferred embodiments.

A frequency error detection device includes an error component detector for detecting an error component signal representing a phase error of the received baseband signal on the basis of a received baseband signal generated by orthogonally demodulating a received carrier band signal, a signal classification unit for receiving a sequence of error component signals as an input and for executing a classification process which includes each of the error component signals in one of a plurality of phase ranges delimiting a detection range of the phase error, a repetitive control for executing a determination process to determine whether the phase error signal is in at least a certain phase range among the plurality of phase ranges certain number of times defined by a natural number has been classified, an update processor for executing an update process that the The detection range is reduced when it is determined that the phase error signal has been classified into the certain range for the predetermined number of times, a signal output unit for outputting a signal corresponding to a stable state value of the phase error, the stable state value representing a value in the certain phase range when determined becomes that the determined phase range satisfies a prescribed inclusion condition, and a condition management unit for setting an inclusion determination number in response to at least one parameter representing a transmission format of the received signal and a status detection signal indicating a channel status. The retry control determines whether or not the specified phase range satisfies the inclusion condition by using, as the inclusion condition, the condition that the number of times the update process has been executed has reached the inclusion determination number. The signal classification unit, the repetition controller and the update processor repeatedly execute the classification process, the determination process and the update process until the specified phase range satisfies the inclusion condition.

A receiving apparatus according to a second aspect of the invention includes an orthogonal demodulator for using a local oscillation frequency to orthogonally demodulate a received carrier band signal and generate a received baseband signal, the above phase error detection apparatus and an oscillator for correcting the local oscillation frequency based on the stable State value of the phase error.

A phase error detection method according to a third aspect of the invention includes the steps of detecting, based on a received baseband signal generated by orthogonal demodulation of a received carrier band signal, error component signals representing a phase error of the received baseband signal, receiving a sequence of error component signals as inputting and executing a classification process that classifies each of the error component signals into one of a plurality of phase ranges delimiting a detection range of the phase error, executing a determination process to determine whether the phase error signal is in at least one particular phase range among the plurality of phase ranges for a predetermined one Number of times defined by a natural number has been classified or not, performing an update process that reduces the detection area when it is determined that the Phase error signal has been classified the predetermined number of times in the specified phase range, setting an inclusion determination number in response to at least one parameter including a transmission format of the received signal and a status detection signal representing a channel status, determining whether the specified phase range has an inclusion condition satisfied or not, the inclusion condition being that the number of times the update process has been updated has reached the inclusion determination number, and outputting a signal corresponding to a stable state value of the phase error, the stable state value representing a value in the specified phase range when it is determined that the specified phase range meets the inclusion condition. The classification process, the determination process and the update process are repeatedly carried out until the specified phase range meets the inclusion condition.

EFFECTS OF THE INVENTION

In the present invention, a stable state value of the phase error can be generated by executing the above classification process, determination process and update process in a repeated manner while successively reducing the phase error detection range. The time required to break down a carrier frequency synchronization can thus be shortened even in poor reception environments.

Figure list

• 1 Fig. 13 is a functional block diagram schematically showing an example of the structure of a receiving device in a first embodiment of the invention.
• 2 Fig. 3 schematically shows the structure of a symbol (an OFDM symbol) in the baseband signal.
• 3 Fig. 13 is a functional block diagram showing the schematic structure of the phase error detector (phase error detecting device) in the first embodiment.
• 4th Fig. 13 is a functional block diagram schematically showing an example of the structure of the defect component detector in the first embodiment.
• 5 Fig. 13 is a diagram showing a phase plane representing a plurality of phase areas generated by dividing the detection area.
• 6th Fig. 13 is a flowchart schematically showing a processing procedure in the signal classification unit in the first embodiment.
• 7th Fig. 13 is a flowchart schematically showing a processing procedure in the repeat control.
• 8th Fig. 13 is a flowchart schematically showing a processing procedure in the update processor.
• 9 (A) to 9 (C) are diagrams showing an exemplary procedure for successively reducing the detection area.
• 10 (A) to 10 (C) are diagrams showing another exemplary procedure for successively reducing the detection area.
• 11 Figure 3 is a flow diagram schematically illustrating an exemplary procedure for dividing the phase range.
• 12th Fig. 13 is a functional block diagram schematically showing an example of the structure of a receiving device in a second embodiment according to the invention.
• 13 Fig. 13 is a functional block diagram schematically showing the structure of the error component detector in the phase error detector in the second embodiment.

EMBODIMENTS

Various embodiments of the invention are described below with reference to the drawings.

First embodiment

1 Fig. 13 is a functional block diagram schematically showing an example of the structure of a receiving device 1 shows in a first embodiment according to the invention. As in 1 As shown, the receiving device comprises a receiving antenna element Rx , a tuner unit 10 , an A / D converter (ADC) 11 , an orthogonal demodulator 12th and a local oscillator 13 on.

The tuner unit 10 receives a wireless signal through the receiving antenna element Rx . The tuner unit 10 performs a tuning process and other analog signal processing on the wireless signal to generate a received carrier band signal, and outputs that received signal to the A / D converter 11 out. The A / D converter 11 converts the received carrier tape analog signal into a received digital signal, which it sends to the orthogonal demodulator 12th issues. The received signal in this embodiment is a multi-carrier signal generated by using a plurality of sub-carriers, specifically, an orthogonal frequency division multiplexed (OFDM) signal in which the plurality of sub-carriers have a mutually orthogonal relationship.

The orthogonal demodulator 12th uses an oscillating frequency signal Os from the local oscillator 13 is supplied to the output of the A / D converter 11 orthogonally demodulate and generate a received baseband signal r (t) (where t indicates time). This received baseband signal r (t) is a complex-valued signal which contains an in-phase component (in-phase component) and a quadrature component (reactive component). The oscillation frequency f _s expressed by the oscillating frequency signal Os corresponds to the carrier frequency f _c used by the transmitting device (not shown) to transmit the wireless signal, but is not necessarily the same as the carrier frequency f _c ; it may contain a frequency error Δf.

2 shows schematically the structure of a symbol (an OFDM symbol) in the baseband signal. As in 2 As shown, this one symbol includes a valid symbol containing a frequency-division multiplexed plurality of data symbols and a guard interval GI which is a redundant signal identical to the tail portion of the valid signal. A symbol period contains the valid symbol period Tu and the guard period Tg, which is the length of the guard interval GI. Although the guard interval is positioned immediately before the valid symbol in this embodiment, this is not a limitation. For example, the guard interval can be positioned immediately after the valid signal.

As in 1 shown, the receiving device 1 a broadcast format detector 21st , a synchronization detector 22nd and a phase error detector 23 on. The broadcast format detector 21st has the function of detecting, from the received baseband signal r (t), various parameters which indicate the transmission format. In this embodiment, the received baseband signal r (t) contains a periodically inserted preamble section. The broadcast format detector 21st can detect a set of parameters indicating, for example, the transmission mode, guard interval length (guard period), valid symbol length (valid symbol period), code rate, carrier modulation system and error correction coding system from the preamble section of the received baseband signal r (t).

Although the receiving device in this embodiment detects the set of transmission format parameters from the preamble section in this embodiment, this is not a limitation. If the set of transmission format parameters is contained in the valid symbol section instead of in the preamble section, the Configuration of the receiving device 1 suitably changed to the broadcast format from the output of the DFT unit 14th which will be described later. Broadcast formats worth mentioning include formats associated, for example, with the terrestrial digital audio broadcast standard (DAB) or the integrated service digital broadcast terrestrial (ISDB-T) format, among others.

The synchronization detector 22nd has a symbol timing synchronization detection function by which it detects the boundaries between symbols in the received baseband signal r (t) and the DFT unit 14th supplied with a timing signal St indicating the result. There is no particular limitation on the method of detecting the boundaries between symbols; known methods can be used. The synchronization detector 22nd For example, the correlation value between the signal in the end part of the valid symbol in the received baseband signal r (t) and a signal in the guard interval GI of a delayed signal obtained by delaying the received Baseband signal r (t) obtained by a certain time, and detect the position (time) of the maximum peaks in a sequence of such correlation values as the starting point of the received symbol.

The phase error detector 23 has the function of detecting the stable state value of the phase error of a sequence of received baseband signals r (t) on the basis of the received baseband signal r (t) and of supplying the local oscillator 13 with a phase error signal Ep which represents this stable state value. The local oscillator 13 is a numerically controlled oscillator (NCO) that can correct a frequency error in its oscillation frequency in response to the phase error signal Ep.

As in 1 shown includes the receiving device 1 furthermore a discrete fast Fourier transform unit (DFT unit) 14th , a carrier demodulator 15th , an error correction unit 16 and a decoder 17th . The DFT unit 14th uses the timing signal St to sample the plurality of time domain signals within each symbol of the received baseband signal r (t) and performs a discrete fast Fourier transform (an orthogonal transform) on the sampled time domain signals to generate a plurality of frequency domain signals. Other types of orthogonal transforms can be used in place of the discrete fast Fourier transform.

The carrier demodulator 15th performs carrier band demodulation (digital demodulation) on each subcarrier in the output of the DFT unit 14th from according to the carrier modulation method over which it is transmitted by the transmission format detector 21st is informed to generate a received data signal sequence. QPSK (Quadrature Phase Shift Keying) and M-ary QAM (M-ary Quadrature Amplitude Modulation) can be mentioned as non-limiting examples of subcarrier modulation methods.

The error correction unit 16 performs error correction on the output sequence of the carrier demodulator 15th according to the error correction coding system via which it is received from the broadcast format detector 21st is informed (e.g. the Reed-Solomon coding system or a convolutional coding system). The error correction unit 16 also has the function of detecting a parameter (such as a bit error rate) representing the quality of the input signal during the error correction process. The error correction unit 16 supplies the phase error detector 23 with a quality signal Sq indicating this parameter. The quality signal Sq is at the same time a signal which represents the received signal quality and a status detection signal representing the channel status. The decoder 17th performs a decoding process on the output of the error correction unit 16 to get decoded data.

Next, the structure of the phase error detector 23 regarding 3 described.

3 is a functional block diagram showing the schematic structure of the phase error detector (phase error detection device) 23 in the first embodiment shows. As in 3 shown, the phase error detector 23 an error component detector 31 , a repetitive processor 41 , a buffer 42 , a signal output unit 43 , a coverage management unit 44 and a branch management unit (state management unit) 45 on.

The defect component detector 31 has the function of detecting an error component signal Pe which is the phase error component of the received baseband signal r (t). 4th Fig. 13 is a functional block diagram schematically showing an example of the structure of the defect component detector 31 in the first embodiment shows. As in 4th shown contains the defect component detector 31 a delay unit 32 , a correlation calculation unit 33 , an averaging unit 34 and an averaging control unit 37 .

The delay unit 32 delays the received baseband signal r (t) by the valid symbol period Tu in order to generate a delayed received baseband signal r (t-Tu). The correlation calculation unit 33 has the function of calculating the correlation between the received baseband signal r (t) and the delayed received baseband signal r (t-Tu) to generate a correlation signal Corr (t). In particular, it calculates the product of the received baseband signal r (t) and the complex conjugate signal r * (t-Tu) of the delayed received baseband signal r (t-Tu) as the correlation value Corr (t).

Now, if the oscillation frequency f _s , which is represented by an oscillation frequency signal Os, contains a frequency error Δf, the received baseband signal r (t) contains the phase error component shown in the following equation (1).
[Mathematical Expression 1] $$r\left(t\right)=s\left(t\right)\text{exp}\left(-\mathrm{<figure-callout\; id="2"\; label="j"\; filenames="DE112012006561B4\_0008.png,DE112012006561B4\_0016.png"\; state="\{\{state\}\}">j</figure-callout>}2\pi \cdot \Delta f\cdot t\right)$$

In this equation, s (t) is the received baseband signal component when there is no frequency error.

Because the redundant signal in the guard interval GI is identical to the end part of the valid symbol, as in FIG 2 shown, the following equation (2) is true.
[Mathematical Expression 2] $$s\left(t\right)=s\left(t-Tu\right)$$

Therefore, the correlation calculating unit 33 calculate the correlation signal Corr (t) given by the following equation (3).
[Mathematical Expression 3] $$\begin{array}{cc}\mathrm{C.}Orr\left(t\right)=r\left(t\right)\times r*\left(t-Tu\right)={\left|s\left(t\right)\right|}^2& exp\left(\mathrm{<figure-callout\; id="2"\; label="j"\; filenames="DE112012006561B4\_0008.png,DE112012006561B4\_0016.png"\; state="\{\{state\}\}">j</figure-callout>}2\pi \cdot \Delta f\cdot Tu\right)\end{array}$$

The phase error Δp of the correlation signal Corr (t) can therefore be obtained from the following equation (4).
[Mathematical Expression 4] $$\Delta p=2\pi \cdot \Delta f\cdot Tu={\text{tan}}^{-1}\left[\frac{\text{in the}\left(\mathrm{C.}Osrr\left(t\right)\right)}{\text{re}\left(\mathrm{C.}Orr\left(t\right)\right)}\right]$$

In this equation, tan ^-1 (x) denotes the arctangent function of the variable x, Re (Corr (t)) is the real part or the in-phase component of the correlation signal Corr (t) and Im (Corr (t)) is the imaginary part or the quadrature component of the correlation signal Corr (t). However, the method for detecting the phase error Δp is not limited to the above-described equations (1) to (4).

The averaging unit 34 has the function of averaging the correlation signal Corr (t) to generate the error component signal Pe representing the phase error component. As in 4th shown contains the averaging unit 34 a first averaging unit 35 that performs an averaging (filtering) process on the correlation signal Corr (t) in each received symbol, and a second averaging unit 36 having an averaging (filtering) process on the output of the first averaging unit 35 over a variety of received symbols. In particular, the first averaging unit filters 35 the correlation signal Corr (t) over a first averaging interval Δ1 in each symbol period; the second averaging unit 36 filters the output of the first averaging unit 35 over a second averaging interval Δ2 corresponding to a plurality of symbol periods. The first averaging unit 35 and the second averaging unit 36 can each be implemented as an FIR (Finite Impulse Response) filter, for example. The first averaging interval Δ1 and the second averaging interval Δ2 correspond to the tap length of the FIR filter.

The averaging control 37 receives a format signal Fd and the quality signal Sq as inputs according to which it can control the number of signal samples taken by the first averaging unit 35 and the second averaging unit 36 are averaged, and their sampling rates (sampling intervals). The first and second averaging intervals Δ1 and Δ2 can be controlled by controlling the number of samples taken in the first averaging unit 35 and the second averaging unit 36 be averaged. The reliability of the error component signal Pe can be improved, for example, by increasing the first averaging interval Δ1 (increasing the number of samples) in the first averaging unit 35 when the protection period Tg increases. The reliability of the error component signal Pe can also be improved by increasing the second averaging interval Δ2 (increasing the number of samples) in the second averaging unit 36 when the signal quality deteriorates. In this way the averaging unit 34 and the averaging control 37 carry out an averaging process that is optimized according to the transmission format and the reception environment.

As in 3 shown, the retry processor 41 a signal classification unit 51 , a repeat control 52 , an update processor 53 and a status observer 54 on. The signal classification unit 51 receives a sequence of error component signals Pe, performs a classification process that classifies each of the error component signals Pe into one of a plurality of phase areas PA1, ..., PAN (N is an integer equal to or greater than two) indicating a detection area of the phase error of the phase plane, and a detection signal Pa to the retry controller, status observer and the buffer 42 which indicates the specific phase range into which the error component signal Pe has been classified. The buffer 42 temporarily holds a sequence of detection signals Pa. Because the error component signal Pe is a complex-valued signal having an in-phase component I and a quadrature component Q, the error component signal Pe has a phase error expressed as tan ^-1 (Q / I) as expressed in the above equation (4) becomes. The phase range PAk (k is a number from 1 to N) containing the point representing the error component signal Pe on the phase plane can therefore be identified as the phase range into which the error component signal Pe has been classified.

The phase error detection range is variable: it can be set to ranges such as for example 0 ° to 360 °, 0 ° to 180 ° or 0 ° to 90 °. A plurality of phase areas PA1, ..., PAN can be obtained by dividing the detection area according to a given detection accuracy. 5 Fig. 13 is a diagram showing an exemplary phase plane including three phase ranges PA1, PA2, PA3 when the detection range is from 0 ° to 90 ° and the detection accuracy is 30 °. As in 5 shown, the detection range from 0 ° to 90 ° is divided into three phase areas PA1, PA2, PA3, whereby the phase area PA1 is from 0 ° to 30 ° (inclusive), the phase area PA2 is from 30 ° (exclusive) to 60 ° (inclusive ) and the phase range PA3 is from 60 ° (exclusive) to 90 ° (inclusive).

The coverage management unit 44 supplies the signal classification unit 51 with a control signal Rc specifying phase conversion information in addition to the above detection range and detection accuracy. The signal classification unit 51 can perform the classification process on each of the error component signals Pe by using the detection range, the detection accuracy, and the phase conversion information specified by the control signal Rc. The phase change information is described below.

The repeat control 52 executes a determination process that determines, based on the detection signal Pa, whether or not the error component signals Pe has been successfully classified into at least one certain phase range among the phase ranges PA1, ..., PAN for a designated number of times (= TH1) with others In words, a process that determines whether the particular phase range represented by the detection signal Pa is continued for the designated number of times. The designated number of times (hereinafter referred to as the update decision number TH1) is specified by the branch management unit 45 and can be any integer equal to or greater than one. When the error component signals Pe are determined to have been successively classified in the determined phase range for the update decision number TH1 of times, the repetitive control gives 52 issue an update command PB1. The specific phase range is not limited to just one of the phase ranges PA1, ..., PAN, but can contain a plurality of phase ranges following one another among the phase ranges PA1, ..., PAN. In 5 the specific phase range could be specified as an angle range from 0 ° to 60 ° and could thus consist of the two phase ranges PA1 and PA2. The angle range can be determined by the branch management unit 45 to be determined.

Upon receipt of the update command PB1 from the retry controller 52 , the update processor runs 53 run an update process that reduces the detection area. In particular, the update processor generates 53 a control signal Pu given to the detection area management unit 44 commands to reduce the detection area, and supplies the generated control signal Pu to the detection area management unit 44 . In response to the control signal Pu, the detection area management unit generates 44 a control signal Rc specifying a detection area smaller than the current detection area and a plurality of phase areas delimiting the specified detection area, and supplies the generated control signal Rc to the signal classification unit 51 .

By cooperating to repeatedly execute the above process, the signal classification unit 51 who have favourited repeat control 52 , the update processor 53 and the coverage management unit 44 successively reduce the detection area. The repeat control 52 has the function of determining whether or not the above specified phase range satisfies a predetermined inclusion condition and, when the specified phase range is reduced to an area meeting the predetermined inclusion condition, outputting a status observation command PB2 to the status observation unit 54 . For example, the condition may be that the number of times the update process is performed by the update processor 53 has reached a designated number of times (hereinafter referred to as the inclusion decision number TH2) can be specified as the inclusion condition. The inclusion decision number TH2 is made by the branch management unit 45 set.

When receiving the status watch command PB2 from the retry controller 52 determines the status monitoring unit 54 whether the particular phase area PA # that has been determined to meet the inclusion condition. a further predetermined stable state condition is now met. A specific condition that can be specified as the stable state condition is that the phase region PAc in which the error component signals Pe are specified is newly by the signal classification unit 51 are classified after the output of the status observation command PB2 coincides with the determined phase range PA #. Since the data indicating the specific phase areas PA # in the buffer 42 are stored, the status monitoring unit 54 check whether or not the phase range PA # is in the stable state range by obtaining the determined phase range PA # indicating data from the buffer 42 , and checking whether the last phase range PAc, which is different from that of the signal classification unit 51 provided detection signal Pa is represented, coincides with the specific phase range PA #.

When the phase range PA # has been determined to meet the stable state condition, the status observation unit decides 54 that the phase area PA # is a stable state area, outputs an output activation signal Eb to the signal output unit 43 and issues a repeat command Re the repeat control 52 and the coverage management unit 44 out. When it is determined that the phase area PA # does not satisfy the stable state condition, the status observer gives 54 however, the repeat command Re to the detection area management unit 44 and the repeat control 52 without outputting the output activation signal Eb. When the coverage management unit 44 receives the retry command Re, it resets the detection range and detection accuracy to the initial range and accuracy, and generates a corresponding control signal Rc. When the repeat control 52 receives the retry command Re, it resets its internal variables to their initial values and resumes retry control.

In response to the output of the activation signal Eb, the signal output unit reads 43 out of the buffer 42 the data indicating the phase range PA # determined to meet the stable state condition specifies a representative value of the phase range PA # (e.g., the median of the phase range PA #) as the stable state range of the phase error and outputs a phase error signal Ep corresponding to the stable state value. The value represented by the phase error signal Ep may be the stable state value itself or a frequency error value obtained by dividing the stable state value by 2π · Tu. The signal output unit 43 can generate a phase error signal Ep which is sent to the input interface of the next-level processing unit (e.g. the local oscillator 13 in 1 ) that fits with the phase error detector 23 connected is.

The branch management unit 45 has the function of setting the values of the update decision number TH1 and the inclusion decision number TH2 in response to the format signal Fd and the quality signal Sq. The update decision number TH1 and the inclusion decision number TH2 can be set to values in response to, for example, the transmission mode and / or the guard period Tg.

On the basis of the quality signal Sq, the branch management unit 45 also set the update decision number TH1 and the inclusion decision number TH2 to values in response to the signal quality. When the branch management unit 45 decides from the quality signal Sq that the channel status has deteriorated, in particular it can reduce the setting of the inclusion decision number TH2; when the branch management unit 45 decides that the channel status has improved, it may increase the setting of the inclusion decision number TH2. A constantly demodulated signal quality, essentially independent of the channel status, can therefore be ensured. Another effect is that a constant inclusion rate can be maintained, essentially independent of the channel status.

In addition, the branch management unit 45 reduce the setting of the inclusion decision number TH2 as the setting of the update decision number TH1 increases, and increase the setting of the inclusion decision number TH2 as the setting of the update decision number TH1 decreases. Complementary control of the inclusion stability and the time-varying channel status availability can therefore be improved.

Next is the operation of the phase error detector 23 described in detail.

6th Fig. 13 is a flowchart schematically showing the processing procedure in the signal classification unit 51 represents. As in 6th shown, takes the signal classification unit 51 Reference to that of the coverage management unit 44 supplied control signal Rc and obtains the detection range and the detection accuracy of the phase error together with the phase conversion information (step S11 ). The signal classification unit 51 then waits for an input of an error component signal Pe (No in step S12 ). When an error component signal Pe is received (Yes in step S12 ), determines the signal classification unit 51 whether or not the phase of the error component signal Pe is in the detection range (step S13 ), and if the phase of the error component signal Pe is in the detection range (Yes in step S13 ), the signal classification unit classifies 51 the error component signal Pe into one of the phase areas PA1 to PAN which delimit the detection area (step S14 ), and outputs a detection signal Pa indicating the phase range into which the error component signal Pe has been classified (step S16 ). The processing then moves with step S11 away.

If the phase of the error component signal Pe is not in the detection range (No in step S13 ), shifts (converts) the signal classification unit 51 the phase of the error component signal Pe by an amount δ indicating the phase conversion information, thereby moving the error component signal Pe into the detection area (step S15 ), and then classifies the phase-shifted error component signal Pe into one of the phase ranges PA1 to PAN (step S14 ) and outputs a detection signal Pa showing the phase shift 5 and indicates the phase range into which the error component signal Pe has been classified (step S16 ). The first time that the signal classification unit 51 executes the classification process, the phase of the error component signal Pe is always in the detection range, so step S15 not running. step S15 is described below.

The next 7th and 8th are flowcharts schematically showing processing procedures in the repetitive control 52 and the update processor 53 represent.

As in 7th shown initializes the retry control 52 at start-up, a variable Nc which indicates the number of times that the same phase range has been detected in succession, and a variable Ni which shows the number of times the update process has been carried out to their initial values (= 0) (step S21 ). The repeat control 52 then picks up that from the branch management unit 45 provided control signal Bc and obtains the update decision number TH1 and the inclusion decision number TH2 (step S22 ). Next, the retry control determines 52 whether or not the variable Nc is smaller than the update decision number TH1 (step S23 ). If the variable Nc is less than the update decision number TH1 (Yes in step S23 ), the repeat control waits 52 to a detection signal Pa (no in step S24 ).

When a detection signal Pa is received (Yes in step S24 ), compares the repeat control 52 the current phase range represented by the detection signal Pa with the previous phase range (step S25 ). If the current phase range corresponds to the previous phase range (yes in step S26 ), that is, when the detection signal Pa indicating the same phase range is received in sequence, the repetitive control increases 52 the variable Nc by one (step S27 ). If the current phase range does not match the previous phase range (no in step S27 ), that is, when a detection signal Pa indicating a phase range different from the previous phase is received, the retry control sets 52 however, the variable Nc is set to one (step S28 ). The processing then moves with step S22 away.

When it is determined that the variable Nc has reached the update decision number TH1 (No in step S23 ), that is, when it is determined that the error component signals Pe has been classified into the certain phase range among the phase ranges PA1, ..., PAN for the update decision number TH1 consecutive times, the repetitive control decides 52 whether the number of times Ni the update process has been carried out has reached the inclusion decision number TH2 (step S30 ).

When the number of times Ni the update process has been carried out has not reached the inclusion decision number TH2 (No in step S30 ), gives the repeat control 52 an update command PB1 to the update processor 53 off, causing the update processor 53 causes the update process to be carried out (step S31 ). 8th Figure 13 is a flowchart showing schematically the procedure followed by the update processor in carrying out the update process.

As in 8th as shown, the update processor determines 53 whether the specific phase range contains the minimum phase (= 0 °) (step S41 ). If the specific phase range contains the minimum phase (= 0 °) (yes in step S41 ), the update processor commands 53 the coverage management unit 44 to reduce the detection area to the specific phase area (step S42 ). In response to this command, the coverage manager updates 44 the detection area and the plurality of detection areas delimiting the updated detection area and the signal classification unit 51 performs the classification process on the error component signal Pe by using the updated detection range and phase ranges. After performing the above step S42 the update processor increases 53 the variable Ni indicating the number of times the update process has been carried out by one (step S44 ) and initializes the variable Nc, which indicates the number of times that the same phase range was detected in succession, to zero (step S45 ). The processing then moves with step S22 in 7th away.

When it is determined that the determined phase range does not include the minimum phase (= 0 °) in step S41 (No in step S41 ), the update processor converts 53 however, the specific phase range into a phase range that contains the minimum phase (step S43 ), and commands the coverage management unit 44 to reduce the detection area to the converted specific phase area (step S42 ). The update processor 53 then initializes the variable Nc with zero (step S45 ), and processing moves at step S22 in 7th away.

After that, the update processor runs 53 the update process (step S31 ) repeatedly, which gradually reduces the detection area. 9 (A) to 9 (C) show an exemplary procedure for successively reducing the detection area. 9 (A) shows a phase plane which represents the phase ranges PA1 (Ni = 0), PA2 (0), PA3 (0), which delimit the detection range from 0 ° to 90 ° in an initial stage with a detection accuracy of 30 °. For example, when detection signals Pa representing the phase range PA1 (0) have been successively received the update decision number TH1 of times (No in step S23 in 7th ), the update processor can 53 Reduce the detection area to phase area PA1 (0) and divide phase area PA1 (0) into a number of phase areas PA1 (Ni = 1), PA2 (1), PA3 (1) with a detection accuracy of 10 ° as in 9 (B) divide shown (step S42 in 8th ). Then, if detection signals representing the phase range PA1 (1) are successively received for the update decision number TH1 of times (No in step S23 ), the update processor can 53 Reduce the detection area to a phase area PA1 (0) and the phase area PA1 (0) in phase areas PA1 (Ni = 2), PA2 (2) with a detection accuracy of 5 °, as in 9 (C) shown (step S42 in 8th ).

For example, if detection signals Pa representing a phase range PA3 (0) are successively obtained for the update decision number TH1 of times in 9 (A) received (no in step S23 in 7th ), but it is determined that the phase range PA3 (0) does not contain the minimum phase (= 0 °) (No in step S41 in 8th ) so that the update processor 53 the phase range PA3 (0) is updated to a phase range containing the minimum phase (= 0 °) by rotating the phase range PA3 (0) by -60 ° (step S43 ), and the detection area is reduced to the converted phase area (step S42 ). In the example procedure in 9 (A) the converted phase range corresponds to the phase range PA1 (0). The update processor 53 notifies the coverage management unit 44 about the phase shift (rotation) δ so that the detection area management unit 44 the signal classification unit 51 can provide conversion information indicating the notified phase shift δ.

The detection accuracy of the stable state value of the phase error can be improved by always limiting the detection range to the phase range including the minimum phase (= 0 °) in this way. For example, if the phase error is represented with 8-bit resolution or precision, the phase error can be expressed in 256 discrete levels. When the phase error is expressed in this way, for example, a detection range of 0 ° to 90 ° is resolved to approximately 0.355 °, while the detection range of 0 ° to 30 ° is resolved to approximately 0.121 °. If there are design restrictions on the resolution, the accuracy with which the stable state value of the phase error is detected is improved when the detection range is reduced.

When it is determined that the number of times the update process has been carried out (Ni) has reached the inclusion decision number TH2 in step S30 (Yes in step S30 ), gives the repeat control 52 regarding 7th a status observation command PB2 to the status observation unit 54 off (step S32 ), which ends the process.

In response to the status monitoring command PB2 from the retry controller 52 as described above, determines the status observer 54 whether the specific phase range PA #, which is determined in step S30 became to have reached the inclusion decision number TH2, now coincides with the new phase range PAc represented by the detection signal Pa. If the phase range PA # coincides with the phase range PAc, the status monitoring unit delivers 54 an output activation signal Eb to the signal output unit 43 and issues a repeat command Re to the repeat controller 52 and the coverage management unit 44 out. If the phase range PA # does not coincide with the phase range PAc, the status monitoring unit issues 54 however, the repeat command Re to the detection area management unit 44 and the repeat control 52 without outputting the output activation signal Eb. In response to the retry command Re, the detection area management unit resets 44 the detection range, the detection accuracy and the value of the phase conversion information to the initial range, accuracy and value, and generates a corresponding control signal Rc. At the same time lead the Repeat control 52 and the update processor 53 the determination process and update process that are included in 7th and 8th are shown.

As described above, the update processor reads 53 out of the buffer 42 in response to the output enable signal Eb, the data indicating the phase range PA # determined to meet the stable state condition, and outputs a phase error signal Ep corresponding to this phase range PA #. If step S43 in 8th has been carried out and the phase of the error component signal Pe has been shifted (step S15 in 6th ), represents the update processor 53 restores the phase range PA # to the phase range before the shift, and generates and outputs a phase error signal Ep corresponding to the restored phase range.

10 (A) to 10 (C) show another exemplary procedure for successively reducing the detection area. 10 (A) shows a phase plane in which phase areas PA1 (Ni = 0) and PA2 (0), which delimit the detection area from 0 ° to 90 °, are shown in an initial state with a detection accuracy of 45 °. For example, when detection signals representing the phase range PA1 (0) are successively received for the update decision number TH1 of times (No in step S23 in 7th ), the update processor can 53 Reduce the detection range to the phase range PA1 (0) and the PA1 (0) in phase areas PA1 (Ni = 1), PA2 (1), PA3 (1), PA4 (1), PA5 (1), PA6 (1) as in 10 (B) divide shown (step S42 in 8th ). 10 (C) shows in table form the relationship between conditions to be met by the error component signal Pe and the phase ranges PA1 (1), PA2 (1), PA3 (1), PA4 (1), PA5 (1), PA6 (1) accordingly these conditions. If the in 10 (C) conditions shown are used, the signal classification unit 51 execute the classification process without directly calculating the phase values of the error component signals Pe.

With reference to the flowchart in 11 a procedure for dividing the reduced PA1 (0) into 10 (A) in phase ranges PA1 (1) to PA6 (1) in 10 (B) . First, the update processor provides 53 a reference signal point P0 in the reduced detection area PA1 (0) (step S51 ). The reference signal point P0 has an in-phase component I ₀ and a quadrature component Q ₀ . The reference signal point P0 is set so that the ratio of its in-phase component I ₀ to its quadrature component Q ₀ (= I ₀ / Q ₀ ) is a power of two (= 2 ⁿ ; where n is a positive integer). In the example procedure in 10 (B) is the ratio I ₀ / Q ₀ 2 ³ (= 8). Next, the update processor provides 53 Signal points P1 to P5, each of which has the in-phase component such as the in-phase component I _{0 of} the reference signal point P0 and a quadrature component that is a positive integer multiple of the quadrature component Q ₀ (step S52 ). The update processor 53 divides the detection area PA1 (0) into a plurality of phase areas PA1 (1) to PA6 (1), which are delimited by lines LN0 to LN5, which run through the reference signal point P0 and signal points P1 to P5 and an origin point on the phase plane ( Step ST53).

As described above, the signal classification unit perform 51 who have favourited repeat control 52 and the update processor 53 in the phase error detector 23 In the first embodiment, the classification process, the determination process, and the update process are repeatedly performed, thereby successively reducing the detection range of the phase error, and generate a stable state value of the phase error. Even in poor reception conditions, therefore, a stable state value of the phase error can be obtained with constant detection accuracy, so that the effect is obtained that the time required to establish carrier frequency synchronization in the local oscillator 13 in 1 can be shortened. This effect can be achieved without increasing the circuit scale or calculation load.

Since the detection range is always limited to the phase range containing the minimum phase (= 0 °) (step S41 , S43 in 8th ), even if there are design restrictions on the resolution, the accuracy with which the stable state value of the phase error is detected can still be improved.

Because the averaging control 37 the first and second averaging intervals Δ1 and Δ2 in the first averaging unit 35 and the second averaging unit 36 according to the format signal Fd and the quality signal Sq as in FIG 4th can control displayed, the averaging unit 34 and the averaging control 37 In addition, carry out an averaging process that is optimized according to the transmission format and reception environment. The averaging control 37 can also control the first and second averaging intervals Δ1 and Δ2 in accordance with the format signal Fd alone, regardless of the quality signal Sq. In this way, an averaging process can be carried out which is optimized in accordance with the transmission format.

Second embodiment

Next, a second embodiment in accordance with the present invention will be discussed described. 12th Fig. 13 is a functional block diagram schematically showing an example of the structure of a receiving device 2 in a second embodiment according to the invention. The structure of the receiving device in the second embodiment is identical to the structure of the receiving device in the first embodiment except that the phase error detector 23 by another phase error detector 23B is replaced. The phase error detector 23B in this embodiment receives the timing signal St obtained from the synchronization detector 22nd is delivered.

13 Fig. 13 is a functional block diagram schematically showing the structure of the defect component detector 31B in the phase error detector 23B in the second embodiment shows. The structure of the phase error detector 23B in the second embodiment is identical to the structure of the phase error detector 23 in the first embodiment except for the correlation calculating unit 33B in the defect component detector 31B .

As in 13 the correlation calculating unit receives 33B the timing signal St as an input and can perform the correlation calculation in response to the timing signal St. Using the timing signal St enables the correlation signal Corr (t) in equation (3) to be precisely calculated. The stable state value of the phase error can therefore be detected more precisely.

Variations of the first and second embodiments

Various embodiments of the present invention have been described above with reference to the drawings, although the foregoing first and second embodiments exemplify the invention, various other forms may be taken. The status detection signal representing the channel status is not limited to the above quality signal Sq, for example. Instead of the quality signal Sq, the above error component detector 31 and the branch management unit 45 ( 3 For example, use the received CN ratio (carrier-to-noise ratio), the averaged received signal level and / or a signal representing a Doppler frequency as the signal representing the channel status. A CN ratio detector that determines the received CN ratio from the carrier demodulator 15th generated demodulated data, a level detector which detects the averaged received signal level of the baseband signal r (t), and / or a Doppler frequency detector, can be used to the receiving devices 1 , 2 in the foregoing first and second embodiments.

The structures of the first and second embodiments are not similar to the structures in FIG 1 and 12th limited, but may include an equalizer for correcting channel distortion in the received signal, a de-interleaver for performing a de-interleaving process, and other process blocks.

The phase error signal Ep is used to control the local oscillator 13 in the first and second embodiments, but this is not a limitation; the phase error signal Ep can be used to detect an A / D conversion error in the A / D converter 11 to correct.

Some of the functions of the first and second embodiments can be performed either in hardware or by a microprocessor contained by a CPU. When some of these functions are implemented with a computer program, some of the functions can be implemented by the microprocessor loading the computer program from a computer readable recording medium and executing the computer program.

Part or all of the structure of the first and second embodiments may be implemented in an LSI (Large Scale Integrated Circuit). Part or all of the structure of the above first and second embodiments can also be implemented in an FPGA (Field-Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

The above first and second embodiments may be further configured as digital broadcast receiving devices (including television broadcast receivers and audio broadcast receivers), wireless LAN devices, or communication devices such as receiving terminals in mobile communication systems.

List of reference symbols

Rx

Receiving antenna element,

1, 2

Receiving device,

10

Tuner unit,

11

A / D converter (ADC),

12

Orthogonal demodulator,

13

Local oscillator,

14th

discrete fast Fourier transform unit (DFT unit),

15th

Carrier demodulator,

16

Error correction unit,

17th

Decoder,

21st

Broadcast format detector,

23

Phase error detector,

31

Fault component detector,

32

Delay unit,

33

Correlation calculation unit,

34

Averaging unit,

35

first averaging unit,

36

second averaging unit,

37

Averaging control,

41

Repeat control,

42

Buffer,

43

Signal output unit,

44

Coverage area management unit,

45

Branch management unit,

51

Signal classification unit,

52

Repeat control,

53

Update processor,

54

Status observation unit.

Claims (8)

A phase error detecting device (1) comprising: an error component detector (31) for detecting, on the basis of a received baseband signal (r) which is generated by orthogonally demodulating a received carrier band signal, error component signals (Pe) which represent a phase error of the received baseband signal, the carrier band signal being an OFDM signal that is wirelessly received by a transmitting device; a signal classification unit (51) for receiving as an input a sequence of error component signals (Pe) and performing a classification process classifying each of the error component signals into one of a plurality of phase ranges delimiting a detection range of the phase error; a retry controller (52) for executing a determination process to determine whether the phase error signal (Pe) has been classified into at least a certain phase range among the plurality of phase ranges for a designated number of times (TH1) defined by a natural number ; an update processor (53) for performing an update process that reduces the detection range when it is determined that the phase error signal has been classified into the specified phase range for the designated number of times (TH1); a signal output unit (43) for outputting a phase error signal corresponding to a stable state value of the phase error, the stable state value representing a value in the specified phase range when it is determined that the specified phase range satisfies a prescribed inclusion condition; and a condition management unit (45) for setting an inclusion determination number (TH2) in response to a parameter indicating a transmission format of the received signal and / or a status detection signal representing a channel status, wherein the retry controller (52) determines whether the determined phase range satisfies the inclusion condition by using, as the inclusion condition, the condition that the number of times the update process has been performed has reached the inclusion determination number; and the classification unit, the iteration controller, and the update processor repeatedly execute the classification process, the determination process, and the update process until the determined phase range satisfies the inclusion condition. Phase error detection device according to Claim 1 wherein the condition management unit (45) reduces the inclusion determination number setting when it is determined based on the status detection signal that the channel status has deteriorated. A phase error detection method, comprising the steps of: detecting, based on a received baseband signal generated by orthogonally demodulating a received carrier band signal, error component signals representing a phase error of the received baseband signal, the carrier band signal being an OFDM signal transmitted wirelessly from a Sending device is received; Receiving a sequence of error component signals as input and executing a classification process that classifies each of the error component signals into one of a plurality of phase areas delimiting a detection area of the phase error; Performing a determination process to determine whether or not the phase error signal has been classified into at least one specific phase range among the plurality of phase ranges for a designated number of times defined by a natural number; Performing an update process that reduces the detection area when it is determined that the phase error signal has been classified into the determined phase range for the designated number of times; Outputting a phase error signal corresponding to a stable state value of the phase error, the stable state value representing a value in the specified phase range, when it is determined that the specified phase range satisfies a prescribed inclusion condition; Setting an inclusion determination number in response to a parameter indicative of a transmission format of the received signal and / or a status detection signal indicative of a channel status; and determining whether or not the determined phase range satisfies an inclusion condition, the inclusion condition being that the number of times the update process has been performed has reached the inclusion determination number; wherein the classification process, the determination process and the update process are repeatedly carried out until the determined phase range satisfies the inclusion condition. Phase error detection method according to Claim 3 , further comprising a step of reducing the inclusion determination number setting when it is determined based on the status detection signal that the channel status has deteriorated. Phase error detection method according to one of the Claims 3 to 4th , further comprising a step of setting the inclusion determination number to a value which decreases as a value to which the designated number of times is set increases. Phase error detection method according to one of the Claims 3 to 5 , further comprising a step of determining whether or not the determined phase range satisfies another stable state condition after determining that the inclusion condition is satisfied, wherein: in the step of outputting the phase error signal, outputting the phase error signal when the determined phase range is determined to satisfy the stable state condition, and not outputting the phase error signal when it is determined that the determined phase range does not satisfy the stable state condition. Phase error detection method according to Claim 6 wherein: in the step of executing the classification process, after it is determined that the determined phase range satisfies the stable state condition, re-classifying the error component signal into one of the plurality of phase ranges; and in the step of determining whether or not the determined phase range satisfies the further stable state condition, using as the stable state condition the condition that the determined phase range determined to satisfy the inclusion condition coincides with the phase range in which the error component signals are again have been classified. Phase error detection method according to Claim 3 , where the parameter contains values indicating a protection period and a transmission mode.

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