DE102018132683A1 - PIXEL STRUCTURE FOR OPTICAL DISTANCE MEASUREMENT ON AN OBJECT AND RELATED DISTANCE DETECTION SYSTEM - Google Patents

Abstract

A pixel structure (10; 30) for optical distance measurement on an object (12), with at least one pixel (14; 32), which has several sub-pixels (16a, 16b, 16c), each sub-pixel (16a, 16b, 16c) one comprises a first photoactive region (18a, 18b, 18c), a first storage node (26a, FD1, 26b, FD2, 26c, FD3) and a first evaluation gate (24a, TX1, 24b, TX2, 24c, TX3), the first evaluation gate (24a, TX1, 24b, TX2, 24c, TX3) adjacent to the respective first storage node (26a, FD1, 26b, FD2, 26c, FD3) and the first photoactive region (18a, 18b, 18c), and is designed to control a transport of charge carriers from the first photoactive region (18a, 18b, 18c) to the first storage node (26a, FD1, 26b, FD2, 26c, FD3); one with the respective storage node (26a-c , FD1-3) interconnected amplifier circuit (M2-1, M2-1, M2-3) is formed, which are permanently or temporarily short-circuited on the output side by at least two storage nodes, so that the storage nodes can be read out via a single tap.

Description

The present invention relates to a pixel structure for optical distance measurement on an object and to a distance detection system which has such a pixel structure.

Optical methods are known in the prior art which recognize user actuations in response to an evaluation of image information and then e.g. Trigger switching operations. For example, automatic video evaluations of surveillance systems can be mentioned here, which read patterns or movements from individual images or a sequence of images. Numerous other optically supported systems are also known, the most basic of which are light barriers or brightness sensors. However, optical systems of higher complexity often use an array of optically sensitive detection units, usually referred to as pixels, which record optical information in parallel, for example in the form of a CCD array.

The DE 10 2008 025 669 A1 discloses an optical sensor that detects a gesture, whereupon a closing element of a vehicle is automatically moved.

The WO 2008/116699 A2 relates to an optical sensor chip and relates to an optical anti-trap device for monitoring a window pane, sliding door or a tailgate in a motor vehicle

Since gesture control is gaining increasing acceptance in various technical areas, attempts have also been made to use such purely optical systems for recognizing the operating request in motor vehicles. In the field of optical detection, systems are known which detect pixel-related location information, in particular a distance from the sensor or detection device.

The WO 2013/001084 A1 discloses a system for contactless detection of objects and operating gestures with an optically supported device.

Systems for optical distance detection are, depending on the evaluation method used, referred to as “time-of-flight” systems or also as “3D imager” or “range imager”. In the ToF method, a room area is illuminated with a light source and the transit time of the light reflected back from an object in the room area is recorded with a surface sensor. For this purpose, the light source and sensor should be arranged as close as possible to each other. The distance between sensor and target can be determined from the linear relationship between the time of light and the speed of light. To measure the delay, there must be synchronization between the light source and the sensor. The methods can be optimized by using pulsed light sources, because short light pulses (in the ns range) enable efficient background light suppression. In addition, the use of the pulsed light avoids possible ambiguities when determining the distance, as long as the distance is sufficiently large. On the one hand, the light source is operated in a pulsed manner in this concept, on the other hand, the detection unit, that is to say the pixel array, is switched to be pulsed-sensitive, that is to say the integration window of the individual pixels is synchronized with the light source in terms of time and the duration of integration is limited. By comparing results with different integration times, effects of background light in particular can be eliminated.

It is essential that this ToF acquisition method is not a purely image-based acquisition method. A distance information is determined for each pixel, which is done by the temporal light detection. Finally, when using a pixel array, there is a matrix of distance values which, when cyclically recorded, permits an interpretation and tracking of object movements.

The fields of application of such systems are in addition to the areas of industrial automation technology, security technology and especially in the automotive sector. In a car, 3D sensors are used in lane keeping systems, for pedestrian protection or as parking aids, but increasingly also as operating elements that enable gesture control for users. In this context, reference is made to the relevant elaborations, which describe the technical concepts and their implementation in detail, in particular the dissertation "Photodetectors and readout concepts for 3D time-of-flight image sensors in 0.35 µm standard CMOS technology", Andreas Spickermann, Faculty of Engineering, University of Duisburg-Essen, 2010. In addition, the publication "Optimized Distance Measurement with 3D-CMOS Image Sensor and Real-Time Processing of the 3D Data for Applications in Automotive and Safety Engineering", Bernhard König, Faculty of Engineering of the University of Duisburg-Essen, referenced in 2008. The aforementioned work describes the concept and implementation of optical sensor systems that can be used, so that in the context of this application reference is made to their disclosure and only relevant aspects are explained for understanding the application.

A well-known ToF procedure is the pulse-modulated, indirect runtime procedure (PM-ToF). At In this measuring method, the signal energy of the active irradiance is bundled in a short time interval, so that the signal-to-external light ratio is improved. Since high time resolutions are required for pulse transit time measurements, the drift field detectors are a preferred sensor principle. A possible implementation according to the prior art of a pixel architecture using the lateral drift field detector is shown in 6a and 6b shown. The associated timing diagram is in 7 shown.

According to 7 at least two short-term integrators of different lengths and / or timeslaps ( TX1 / TX2 ) synchronized with the emission of a modulated electromagnetic wave. A first part of the reflected electromagnetic wave packet is - in this example - in the first short-term integration window ( TX1 ) and a second part in a second short-term integration window ( TX2 ) accumulated.

A third short-term integrator ( TX3 ) is used, which is optimally triggered outside the time range in which the reflected “light pulse” is expected. With the three independent signals stored in the three associated storage nodes, distance, reflectance and background light can be determined.

Like it in 6a are shown, the three short-term integrators TX1-TX3 realized by transfer gates, which are a photoactive area with the associated storage nodes FD1-FD3 connect. To avoid parasitically generated charge carriers outside the short-term integration window TX1-TX3 crosstalk into the storage node, the photoactive area is separated by another transfer gate ( TX4 ) with a laxation area DD connected, which is permanently at a reference potential, so that charge carriers can be removed in a defined manner.

As in 6b the photodetector is designed in such a way that an n-well is formed in the area of the photoactive region, which is removed from impurities, such as may be formed predominantly on an Si-SiO2 layer (gate oxide), by a p + layer, so that a low dark current results. The n-well also has a dopant concentration gradient that generates an intrinsic drift field, so that photogenerated charge carriers are instantaneously propagated in the direction of the storage nodes.

In the area under the so-called “Collection Gate” (CX), which represents the connecting piece between the photoactive area and the transfer gates / storage node, is connected to the corresponding control electrodes TX1-TX4 permanently defines a preferred direction. This is realized in such a way that three of the control electrodes are always connected to a low potential, so that potential barriers arise, while the remaining electrode is connected to a higher potential, so that any potential barrier is reduced and a preferred direction is created.

Corresponding 7 these preferred directions are varied in this application in such a way that a pulse transit time measurement is possible. The collection node is optional - the transfer gates could also be linked directly to a photoactive area. However, a collection node enables the surface potential to be varied by connection to a variable reference potential, so that this degree of freedom can help to enable a monotonically increasing potential profile from the photoactive region in the direction of the storage node selected by connecting a transfer gate.

The asymmetry usually results from the desire to attach several storage nodes and associated control electrodes to implement the function of different short-term integrators and any draining areas and associated electrodes to implement the discharge of extraneous light-related generated charge carriers (see 6a) . This means that load carriers have to travel different ways to get to different storage nodes, which results in different time resolutions.

From the DE 10 2014 2015 972 A1 a pixel structure is known to overcome the above problems. The pixel structure described there is based on the knowledge that deviations (English mismatches) with respect to charge carrier transport within a pixel can be reduced by the pixel comprising sub-pixels and a sub-pixel having a photoactive area and at least one evaluation capacity which is designed to be in the photoactive Area of the charge carriers generated. Deviations from an ideal state can occur (within production tolerances) essentially the same for each sub-pixel and each evaluation capacity, so that deviations in the transfer properties between load carriers transported into the evaluation capacities can be reduced, which enables exact detection.

For the optical distance measurement on an object, the pixel structure has at least one pixel which comprises a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel comprises a first photoactive area, a first storage node and a first evaluation gate. The first evaluation gate is adjacent to that first evaluation capacity and the first photoactive area of the first sub-pixel are formed and configured to control a transport of charge carriers generated in the first photoactive area from the first photoactive area to the first evaluation capacity. The second sub-pixel comprises a second photoactive area and a second storage node and a second evaluation gate, the second evaluation gate being formed adjacent to the second evaluation capacitance and the second photoactive area of the second sub-pixel. The second evaluation gate is designed to control a transport of charge carriers generated in the second photoactive region from the second photoactive region to the second evaluation capacity. The third sub-pixel comprises a third photoactive area and a third storage node and a third evaluation gate. The third evaluation gate is formed adjacent to the third evaluation capacitance and the third photoactive region of the third sub-pixel and is designed to control a transport of charge carriers generated in the third photoactive region from the third photoactive region to the third evaluation capacitance.

The three sub-pixels are constructed similarly or identically, so that the charge carriers can be transported under the same conditions and with the same deviations for the sub-pixels and there is little deviation between the sub-pixels.

When realizing high-speed detectors for pulse-modulated, indirect transit time measurement methods, area dimensions of the photoactive area of a sensor are particularly relevant. The sensitivity to incoming electromagnetic signals increases with the area. On the other hand, a larger area is associated with longer paths for the charge carriers and thus other time factors. It has been shown that the aforementioned design of the DE 10 2014 2015 972 A1 cannot generate sufficient signal strengths under all practical conditions to enable reliable evaluations.

The object of the present invention is to create a pixel structure and a distance detection system which enable a signal-strong distance detection.

This object is achieved by the subject matter of the independent claims.

According to the invention, the taps (or signal lines connected therewith) for querying the sub-pixels are short-circuited or temporarily short-circuited in a design of a pixel structure with a plurality of sub-pixels in each case in order to operate the sub-pixels as photoactive areas connected in parallel as required. The partial pixels with their photoactive areas continue to be operated via their respective storage nodes and evaluation gates, as in the cited publication DE 10 2014 2015 972 A1 described, but the accumulated charges are measured together by the interconnection of the taps or signal lines to be queried in order to achieve an improved signal strength. The advantages of designing a pixel with sub-pixels are basically retained, in particular the divided photoactive areas are adapted to the assigned storage nodes and evaluation gates. The separate detection of the partial pixels and the associated reduced photoactive area can, however, be compensated for by connecting the signal lines as required.

In this context, taps are the taps provided for reading out the accumulated charges. In the arrangement with a plurality of sub-pixels of the cited document, these are taps which are arranged on the output side of the sub-pixels behind a switchable amplifier circuit. The signal lines can be permanently short-circuited or can be short-circuited as required with a controllable switching device in order to short-circuit several sub-pixels at least temporarily at the output and to evaluate them as a common pixel area. There are no significant changes for an evaluation circuit, since the short-circuited sub-pixel signal lines can be used as normal pixels.

However, the timing of the evaluation gates and the signal processing have to be adjusted depending on the interconnection of several sub-pixels. While in the described design according to the prior art the partial pixels were operated with different time windows in order to detect background light and (two) portions of the reflected light in a single measuring cycle, the interconnected partial pixels are only suitable for recording one measurement per measuring cycle. The measurement of the different light components is accordingly to be carried out in several measurement cycles with the same interconnected partial pixels, so that background light, the first component of the reflected light pulse and the second component of the reflected light pulse are recorded in succession in individual measurement cycles with different timing requirements.

In addition to the pixel structure with short-circuited taps or taps that can be short-circuited by control, the device comprises a control circuit for controlling the pixel structure.

The control circuit is designed to, in a first measurement cycle, the evaluation gates of the partial pixels with short-circuited taps during a first control interval synchronized with a radiation pulse of a light source (with a first delay compared to the radiation pulse) to be controlled, so that first charge carriers generated during the first control interval are transported from the photoactive regions of the partial pixels with short-circuited taps to the assigned storage nodes. The partial pixels are then queried via the short-circuited taps of the partial pixels in order to record the registered amount of light in the first measurement cycle.

In a subsequent measurement cycle, the control circuit controls the evaluation gates of the sub-pixels with short-circuited taps during a second control interval synchronized with the radiation pulse of the light source and with a time delay with respect to the first control interval (with a second delay in relation to the radiation pulse), so that generated during the second control interval second charge carriers are transported from the photoactive areas of the partial pixels with short-circuited taps to the respective assigned storage nodes. The partial pixels are then queried via the short-circuited taps of the partial pixels in order to record the registered amount of light in the second measurement cycle.

In a subsequent third measurement cycle, the control circuit controls the evaluation gates of the sub-pixels with short-circuited taps during a third control interval synchronized with the radiation pulse of the light source and with a time delay with respect to the first control interval (with a third delay compared to the radiation pulse), so that during the third measurement cycle generated third charge carriers are transported from the photoactive of the partial pixels with short-circuited taps to the respective assigned storage nodes. The activation intervals can be arranged completely (not overlapping in time) or partially (in part overlapping in time) with a time delay.

In this way, information regarding distance, reflectance and background light can be obtained in three successive measurement cycles. Since the sub-pixels are interconnected for signal acquisition or are short-circuited on the query side, the signal strength is improved compared to operation with acquisition of the sub-pixels in a single measurement cycle. However, the required measuring time increases in view of the required several measuring cycles. It is possible within the scope of the invention to operate the sub-pixels separately for individual measurement cycles, as proposed in the prior art, and for further measurement cycles, e.g. in the case of insufficient signal strength, to be evaluated as a common pixel area by short-circuiting the taps on the output side. Then it is necessary to short-circuit the taps by means of a controllable switching device.

According to one exemplary embodiment, the control circuit is designed to continuously control the discharge gates of the sub-pixels with short-circuited taps on the output side, during the control cycles, in time areas outside the control intervals, in order to connect the assigned photoactive areas to a respective reference potential connection.

It is advantageous in this exemplary embodiment that an (electrical) connection of the photoactive regions of the partial pixels to a reference potential connection discharges charge carriers that occur between the control intervals, ie. H. outside the respective control interval in the photoactive areas are made possible to the respective reference potential connection, so that only the charge carriers generated during a control interval are transported to the respective storage nodes. Based on a quantity of charge carriers that are generated in the first, second and / or third control interval in the respective photoactive area, distance information of the object can be obtained or determined.

According to a further exemplary embodiment, a distance detection system comprises a pixel structure and a light source, which is designed to emit a radiation pulse. The photoactive areas of the sub-pixels are designed to generate charge carriers based on the radiation pulse reflected by an object. A control circuit of the distance detection system is designed to provide distance information with respect to the object and with respect to the pixel structure based on a distance to the light source.

It is advantageous in this exemplary embodiment that a synchronization of the light source with respect to actuation of the photoactive regions or the evaluation and / or discharge gates is simplified compared to an implementation in which the light source is part of another device if the light source the pixel structure and the control circuit are part of a common system.

According to a further exemplary embodiment, the light source of a distance detection system is designed to emit the radiation pulse with a low duty cycle of less than or equal to 0.5, ie. i.e. to emit 50%.

It is advantageous in this exemplary embodiment that, based on a low duty cycle, a signal energy of the radiation pulse can be bundled in a short time interval, so that, according to eye safety regulations, a higher irradiance and therefore a large difference between Signal energy and energy of the background light can be achieved in compliance with regulations.

Further advantageous embodiments are the subject of the dependent claims.

• 1 ein schematisches Blockschaltbild einer Pixelstruktur zur optischen Abstandsmessung an einem Objekt, bei der ein Pixel drei Teilpixel aufweist gemäß einem Ausführungsbeispiel;
• 2 ein schematisches Blockschaltbild einer Pixelstruktur, bei der das Pixel die drei Teilpixel aufweist, die eine gleiche Funktion und gleiche Elemente aufweisen gemäß einem Ausführungsbeispiel;
• 3 ein schematisches Blockschaltbild einer Vorrichtung, die eine Pixelstruktur und eine mit der Pixelstruktur verschaltete Steuerschaltung, umfasst gemäß einem Ausführungsbeispiel;
• 4 ein schematisches Ablaufdiagramm eines Verfahrens zur Bestimmung der Abstandsinformation, der Reflektanzinformation und einer Hintergrundlichtinformation gemäß einem Ausführungsbeispiel;
• 5 ein schematisches Blockschaltbild eines Abstandserfassungssystems, das die Pixelstruktur gem. 1, die Steuerschaltung und die Lichtquelle aufweist gemäß einem Ausführungsbeispiel;
• 10 eine exemplarische Gegenüberstellung von Transmissions- und Sperrbereichen von Farbfiltern;
• 6a eine schematische Aufsicht auf eine Pixelstruktur gemäß dem Stand der Technik;
• 6b eine schematische Querschnittansicht der Pixelstruktur aus 6a; und
• 7 ein schematisches Timing eines Verfahrens zur Auswertung der Pixelstruktur aus 11 gemäß dem Stand der Technik.

Preferred embodiments of the present invention are explained below with reference to the accompanying drawings. Show it:

• 1 a schematic block diagram of a pixel structure for optical distance measurement on an object, in which a pixel has three sub-pixels according to an embodiment;
• 2nd a schematic block diagram of a pixel structure in which the pixel has the three sub-pixels that have the same function and the same elements according to an embodiment;
• 3rd a schematic block diagram of a device, which comprises a pixel structure and a control circuit connected to the pixel structure, according to an embodiment;
• 4th a schematic flow diagram of a method for determining the distance information, the reflectance information and a background light information according to an embodiment;
• 5 a schematic block diagram of a distance detection system that the pixel structure acc. 1 , The control circuit and the light source according to an embodiment;
• 10th an exemplary comparison of transmission and blocking areas of color filters;
• 6a a schematic plan view of a pixel structure according to the prior art;
• 6b a schematic cross-sectional view of the pixel structure 6a ; and
• 7 a schematic timing of a method for evaluating the pixel structure 11 according to the state of the art.

In the following, reference is made to the arrangement of transfer gates on photoactive regions of sub-pixels in which charge carriers are generated based on electromagnetic radiation. The charge carriers are transported by means of the transfer gates to storage nodes and, depending on the embodiment, to discharge areas. Elements referred to below as evaluation gates describe transfer gates which are designed to control the transport of load carriers towards a respective evaluation capacity. Elements referred to below as removal gates relate to transfer gates which are designed to control the transport of load carriers to a respective removal area. Laxation gates and evaluation gates can have the same design, so that the different designation only aims at the function for better differentiability.

Before exemplary embodiments of the present invention are explained in more detail below with reference to the drawings, it is pointed out that identical, functionally identical or equivalent elements, objects and / or structures in the different figures are provided with the same reference numerals, so that they are shown in different exemplary embodiments Description of these elements is interchangeable or can be applied to each other.

1 shows a schematic block diagram of a pixel structure 10th for optical distance measurement on an object 12 . The pixel structure 10th includes one pixel 14 which is a first sub-pixel 16a , a second sub-pixel 16b and a third sub-pixel 16c includes. The first sub-pixel 16a includes a photoactive area 18a that is configured to based on the photoactive region 18a received electromagnetic radiation 22r To generate charge carriers. The first sub-pixel 16a further includes an on the photoactive region 18a arranged evaluation gate 24a and one at the evaluation gate 24a arranged storage nodes 26a . The evaluation gate 24a is formed around the in the photoactive area 18a generated charge carriers in an active state from the photoactive area 18a to the storage node 26a to transport, or a transport of charge carriers from the photoactive area to the storage node 26a to control. The electromagnetic radiation 22r can be based on a towards the object 12 emitted radiation pulse are generated, wherein the radiation pulse can have a time-varying intensity (for example, on / off), so that the electromagnetic radiation 22r can have a temporally variant intensity and only temporarily from the pixel structure 10th Will be received.

The photoactive area 18a can be, for example, a silicon semiconductor material with a crystalline structure. From the object 12 outgoing, for example emitted or reflected electromagnetic radiation 22r can have photons in the pixel structure 10th enter and onto the photoactive area 18a to meet. The photons of electromagnetic radiation 22r can generate electron-hole pairs in the crystalline structure of the silicon semiconductor material. Due to the radiation of electromagnetic radiation 22r can thus be in the photoactive area 18a Accumulate charge carriers, ie be generated there.

The evaluation gate 24a can be formed, for example, as a transfer gate. The evaluation gate can be controlled between at least two states, for example via a field effect. During activation (switching on) or at the point in time when a “conductive channel” is realized by inversion of the semiconductor, the conductive channel can be designed in such a way that an increasing potential profile arises in such a way that charge carriers of the photoactive region 18a to an electrode of this transfer gate, which is the photoactive area 18a is turned away, are propagated and only cause a discharge of the potential there. This enables depletion of the photoactive area 18a towards the storage node. As an alternative or in addition, control of the transport of the charge carriers can be based, for example, on a potential profile which is achieved by means of the evaluation gate 26a is trained. The potential profile enables a flow direction of the charge carriers to be deflected. Put simply, it can be the evaluation gate 24a act as a switch element that has an open, possibly not or limited conductive state and a closed, conductive state. The closed state can also be referred to as the active state. Alternatively, it can be the evaluation gate 24a act as an element with a switch function that controls a direction of charge transport in a time-varying manner. For example, a load carrier can be transported to a discharge area if the evaluation gate is not activated (or activated) and the load carrier is transported to a storage node if the evaluation gate is activated (or not activated) becomes. A transition between the activated and non-activated state can take place discretely or continuously. The transport can take place through and / or laterally and / or in a height direction past the evaluation gate, so that, for example, a so-called draining-only structure is implemented. The transport can therefore take place based on the change, the removal or the creation of a potential barrier between the photoactive area and the storage node or other elements, such as a discharge area.

The storage node 26a can be designed as a floating diffusion region, as a capacitor or another capacitive element, for example by capacitive coupling and / or by an interconnection with metal-insulator-metal (MIM), metal-oxide-semiconductor (MOS), metal-metal Capacitors or the like. The storage node 26a enables storage of photogenerated charge and conversion thereof into an electrical voltage which is present at an output-side tap. In the case of a floating diffusion region, the conversion into an electrical voltage can take place, for example, by degenerating the semiconductor, so that the floating diffusion can be fed to a readout circuit via Schottky contact. An intrinsic barrier layer and the diffusion capacity of the floating diffusion form part of the effectively effective evaluation capacity, which can also be referred to as a sense node (sense node).

The storage node 26a is designed to carry charge over a period of time in the photoactive area 18a generated, record and save. Charge carriers in the photoactive area 18a can vary the potential profile between the photoactive area 18a and the storage node 26a and / or lead to the formation of an electromagnetic field between these elements, so that the charge carriers when the evaluation gate 24a has the active state, from the photoactive region 18a all or part of the storage node 26a be transported. In other words, in charge transfer-based detectors (such as pinned, that is, pinned photodiodes, lateral drift field detectors, photogate structures, etc.), the potential profile can be designed by suitable design of the detectors so that the potential maximum lies in the storage node even without a (control) signal. This enables an increasing electric field without variation of the potential caused by charge carriers. The individual charge-based detector types have this (with a suitable design) in common and differ in the parameters that can be reached for e.g. B. sensitivity, charge transfer speed, noise or amount of manageable amount of charge. The storage node 26a can thus be used in conjunction with the photoactive area 18a and the evaluation gate 24a be a short-term integrator. The storage node 26a can be called evaluation capacity.

The second sub-pixel 16b has the same structure as the first sub-pixel 16a . The second sub-pixel 16b includes a photoactive area 18b that has the same function as the photoactive area 18a having. The sub-pixel 16b also has an evaluation gate 24b that is adjacent to the photoactive area 18b is arranged and has the same function as the evaluation gate 24a . The sub-pixel 16b further includes a storage node 26b that are adjacent to the evaluation gate 24b is arranged and has the same function as the storage node 26a .

The third sub-pixel comprises a photoactive area 18c which has the same function as the photoactive areas 18a and 18b . The sub-pixel 16c also has an evaluation gate 24c that is adjacent to the photoactive area 18c is arranged and has the same function as the evaluation gate 24a or. 24b . The sub-pixel 16c further includes a storage node 26c that are adjacent to the evaluation gate 24c is arranged and has the same function as the storage node 26a and 26b .

That means the sub-pixels 16a , 16b and 16c are of the same function. The photoactive areas 18a , 18b and or 18c can be, for example, a photosensitive region of pinned photodiodes, photogate structures, lateral third-field detectors or the like.

The output taps of the storage nodes 26a , 26b and 26c According to the invention, they are permanently or switchable and temporarily short-circuited, so that the charges accumulated in the storage nodes and the potentials generated therefrom can be tapped as a uniform signal and the sub-pixels are evaluated as a common sensor surface. This is a common tap 27th trained which the storage node 26a , 26b and 26c couples for parallel reading and evaluation. As shown, the taps of all three sub-pixels can be short-circuited, and controllable switching elements can also be provided which temporarily short-circuit the taps of the sub-pixels. The three sub-pixels then accumulate in their respective storage nodes 26a , 26b and 26c during their activation, charges separate depending on the radiation that is emitted on the photoactive areas 18a , 18b , 18c hits. When reading out the storage nodes, however, they are not separated, but together via tap 27th evaluated, ie via an interconnection of the storage nodes, so that the sub-pixels 16 , 16b and 16c be evaluated as a uniform pixel. That means charge carriers from the photoactive areas 18a , 18b and 18c in a uniform time interval to the storage nodes 26a , 26b and 26c are transported and then available for joint reading. In principle, only two of the sub-pixels can be short-circuited on the output side.

Based on in the photoactive areas 18a , 18b and 18c generated charge carriers or based on to the storage nodes 26a , 26b and 26c transported carriers can be a distance 28 between the object 12 and the pixel structure 10th be determinable. This can be made possible, for example, by a difference in the transit time between the emission of electromagnetic radiation and the object 12 and an arrival of the (reflected) electromagnetic radiation 22r is recorded and / or evaluated. A source of electromagnetic radiation can be adjacent to the pixel field, ie the pixel structure 10th , or at another location with a known distance and orientation angle with respect to the radiation direction to the pixel structure 10th be arranged so that based on a path / time calculation (stopwatch function), the transit time of the electromagnetic radiation from the light source to the pixel structure 10th can be converted into a route.

The sub-pixels 16a , 16b and or 16c can be projected into a surface, arranged flat, that is, the sub-pixels 16a , 16b and or 16c have a distance from one another in at least one spatial direction. The distance information regarding the object 12 and the pixel 14 can thus be based on three spatially spaced photoactive areas 18a , 18b and or 18c or based on the storage node 26a , 26b and or 26c be preserved. The distance information can thus be the distance 28 with respect to an area of the photoactive areas 18a , 18b and or 18c and a surface in between. The area in between can be, for example, an area defined by the sub-pixels 16a , 16b and or 16c is spanned. The distance 28 can refer to a reference point of the intermediate surface. The reference point can be a boundary point. Alternatively, the reference point can be a geometric center of the surface in between.

The pixel 14 can also be called a super pixel or macropixel, which is the sub-pixel 16a , 16b and or 16c includes. Distance information, for example regarding the distance 28 , of the object 12 to the pixel 14 can with respect to the three sub-pixels 16a , 16b and 16c can be obtained so that the distance 28 with respect to the pixel to a reference point, such as a geometric center between the sub-pixels 16a , 16b and or 16c can be related. The pixel 14 can have exactly three sub-pixels 16a , 16b and 16c include. Alternatively, the pixel 14 also include further sub-pixels.

2nd shows a schematic block diagram of a pixel structure 30th that are a pixel 32 with the three sub-pixels 16a , 16b and 16c has the same function and the same elements. In this context, the same elements mean that a respective element has the same or comparable function. Regarding the evaluation gate 24a ( TX1 ) of the sub-pixel 16a , of the evaluation gate 24b ( TX2 ) of the sub-pixel 16c as well as the evaluation gate 24c ( TX3 ) of the sub-pixel 16c this means, for example, that the evaluation gates 24a-c are each executable as a transfer gate, the transfer gates having a different structure or type, but each having the same or similar behavior with respect to the switch function. Alternatively, the respective elements can also be formed identically.

The sub-pixels 16a-c each have a photoactive area (photoactive area 18a , 18b or. 18c ) on. The sub-pixels 16a-c also point the storage node 26a ( FD1 ), 26b ( FD2 ) or. 26c ( FD3 ) on. Adjacent to the photoactive areas 16a-c is an optional collection gate (Collection-Gate-CX) CX1 , CX2 or. CX3 arranged over which in the photoactive areas 18a-c generated charge carriers can be removed. The respective evaluation gate 24a-c is at the respective collection gate CX1-3 of the respective sub-pixel 16a-c arranged. At the collection gate CX1 is a purge gate TX4 arranged. The laxation gate TX4 is like the evaluation gates 24a-c a switching element or a transfer gate. The laxation gate TX4 can be controlled so that the charge carriers from the photoactive area 18a to a laxation area DD1 that at the laxation gate TX4 is arranged to be transported. To the collection gates CX1-3 a potential UCG can be created to control the collection gates. An arrangement of the optional collection gates ( CX1-3 ) allows the use of a degree of freedom to move in a certain region of each photoactive area 18a-c to influence a surface potential in order to achieve a desired potential profile. A control of the collection gate ( CX1-3 ) can be done in such a way that it is set to a suitable analog value so that a (possibly binary) change in a switching state can be omitted. In principle, the transfer gates ( TX1-6 ) also directly with the respective photoactive area 18a-c get connected.

In particular, the evaluation gate TX1 and the purge gate TX4 are controlled at mutually different and / or overlapping times and / or time intervals, so that, for example, the evaluation gate TX1 or the purge gate TX4 is closed, ie conductive, and the charge carriers from the photoactive area 18a to the storage node 26a or to the laxation area DD1 be transported.

Based on the functionally identical structure of the sub-pixels 16a , 16b and 16c has the second sub-pixel 16b adjacent to the photoactive area 16b a collection gate CX2 and a discharge gate arranged thereon TX5 with a discharge area located on it DD2 on. The third sub-pixel 16c points adjacent to the photoactive area 18c a collection gate CX3 and a purge gate disposed thereon TX6 with a discharge area located on it DD3 on.

The sub-pixels 16a , 16b and 16c form the pixel 32 . To the first laxation area DD1 is a first reference potential vddpix1 can be applied, which means that the charge carriers from the photoactive area 18a when the laxation gate TX4 is conductive, at least partially from the photoactive area 18a over the laxation area DD1 are laxable. The second lax area DD2 can with a second reference potential vddpix2 be connected so that in the photoactive area 18b generated load carriers over the discharge area DD2 are at least partially removable if the removal gate TX5 is leading. To the third laxation area DD3 is a third reference potential vddpix3 can be applied so that in the photoactive area 18c generated charge carriers at least partially over the discharge area DD3 are laxable if the laxative area TX6 is leading.

The three reference potentials vddpix1 , vddpix2 and vddpix3 can have different potentials from one another, for example more than 1 V, more than 3 V or more than 5 V. A different electrical voltage (potential) can allow adjustment with regard to a discharge velocity of the charge carriers. Alternatively, the reference potentials vddpix1 , vddpix2 and or vddpix3 have the same potential value and be interconnected so that a common reference potential vddpix is formed. The common reference potential vddpix enables the same flow rate of the charge carriers to the discharge areas DD1 , DD2 and or DD3 .

The laxation gates TX4 , TX5 and TX6 can be controlled so that each in the photoactive areas 18a-c generated charge carriers are removed. The laxation gates can be removed during a measurement interval TX4 , TX5 and TX6 have a non-conductive state and the evaluation gates TX1 , TX2 or. TX3 have a conductive state. This can be done by controlling the respective gates TX1-6 can be achieved. At the end of each measurement interval, the evaluation gate TX1 into a non-conductive state and the drain gate TX4 are transferred into a conductive state, so that in a first approximation only those charge carriers to the storage node FD1 during the measurement interval are transported in the photoactive area during the measurement interval 18a be generated.

A control of the evaluation gate TX1 can, for example, by applying an electrical signal (potential) UTX1 to the evaluation gate TX1 , respectively. For example, applying a high (high) potential to the voltage UTX1 the conductive state and the application of a low potential cause another, for example non-conductive state. Alternatively, the states (conductive / non-conductive) can be mutually reversed with regard to the applied potentials (high / low). The evaluation gate can also be controlled in this way TX2 by means of a signal UTX2 and a control of the evaluation gate TX3 by means of a signal UTX3 respectively. A control of the discharge gates TX4-6 can by means of signals UTX4-UTX6 respectively.

The storage node FD1 is via a reset transistor M1-1 with a reset potential FD1 (Reset = reset) connectable. The reset transistor is designed, for example, as an NMOS transistor (NMOS: n-type metal oxide semiconductor = n-type metal oxide semiconductor). For example, there is a connection of the storage node FD1 with a source connection (source connection) of the reset transistor M1-1 connected. At a gate terminal (control electrode terminal) of the reset transistor M1-1 can reset potential FD1 be applicable. At a drain port of the reset transistor M1-1 is, for example, a reference potential vddpix4 can be created. A bulk connection (substrate connection) of the reset transistor M1-1 can, for example, be connected to a local or global reference potential, for example ground, ie a voltage potential of 0 V. That means that when the reset potential is reset VD1 at the gate of the reset transistor M1-1 is created, load carriers from an evaluation area of the storage node FD1 can drain and the storage node FD1 emptied, ie is reset. The emptying or resetting enables a new quantity of charge to be taken up in a future measuring cycle. Alternatively, the reset transistor M1-1 can also be designed as another switching element, for example as a correspondingly changed-contacted PMOS transistor (PMOS: p-type metal oxide semiconductor = p-type metal oxide semiconductor).

A reset of the storage node FD1 enables external light-based charge carriers to be removed so that an external light-based error in the measurement signal can be reduced. Saturation of the photoactive area based on extraneous light can be reduced or prevented, which further increases measurement accuracy.

In the same way is an evaluation area of the storage node FD2 of the second sub-pixel 16b via a reset transistor M1-2 with a reset potential FD2 connectable. On the reset transistor M1-2 is a reference potential vddpix5 can be created.

The third sub-pixel points in the same way 16c a reset transistor M1-3 with a gate connection at which a third reset potential is reset FD3 can be created. A drain of the reset transistor M1-3 is with a reference potential vddpix6 connectable. The reference potentials vddpix4 , vddpix5 and vddpix6 can be interconnected and have the same value, ie the same potential. Furthermore, the reference potentials vddpix1 , vddpix2 , vddpix3 , vddpix4 , vddpix5 and or vddpix6 be interconnected and form the reference potential vddpix. This means that between an evaluation area of a storage node FD1-3 and a reference potential vddpix4-6 a reset via reset potentials FD1 FD3 controllable switches M1-1 , M1-2 or. M1-3 are connected to reset the respective storage node FD1-3 enable.

Between the storage nodes FD1 and the reset transistor M1-1 of the first sub-pixel 16a is a gate terminal of an amplifier transistor M2-1 switched. A drain of the amplifier transistor M2-1 can be connected to a supply potential vdda-HV. A bulk connection of the amplifier transistor M2-1 is connected to the reference potential (ground). A source terminal of the amplifier transistor M2-1 is with a drain connection of a selection switch M3-1 connected in the form of a MOS transistor. The sub-pixels point in the same way 16b and 16c an amplifier transistor M2-2 or. M2-3 and a selection transistor M3-2 or. M3-3 on. A gate connector of the selector switch M3-1 can be connected to a selection potential row selection, the same applies to the selection switches M3-2 and M3-3 .

On the output side at a source connection of the selection switch M3-1 with the selector switch M3-2 and M3-3 of the two other sub-pixels is short-circuited, an evaluation potential (measurement voltage Uout) can be tapped. Since the source connections are short-circuited, the evaluation of the sub-pixels takes place despite separate controllability and separate accumulation of the charge in the storage node FD1 , FD2 and FD3 as with a uniform, larger pixel area via a common tap. Applying the selection potential line selection to the drain terminals of the selection switches M3-1 , M3-2 and M3-3 enables tapping of the amplified potential (signal) Uout.

Operation of the sub-pixels 16a , 16b and 16c can consist of two or more time intervals that are repeated cyclically. In a first time interval, the reset transistors can be actuated M1-1 , M1-2 and M1-3 an outflow of charge carriers from the storage nodes FD1 , FD2 and FD3 be made possible synchronously. In a second time interval, the reset transistors can M1-1 , M1-2 , M1-3 are not set to be conductive, so that the potential or signal Uout is obtained. If storage nodes are not or only partially reset between cycles, charge carriers stored in previous cycles can be retained. This enables the charge carriers to be averaged over two or more cycles, which can lead to a reduction in measurement noise. Alternatively, an evaluation and a reset can take place in each cycle.

As an alternative to the amplifier transistors M2-1 , M2-2 and M2-3 another amplifier circuit, for example a differential amplifier or operational amplifier, can also be arranged. The connection of the reset transistors shown M1-1 , M1-2 , M1-3 , the amplifier transistors M2-1 , M2-2 , M2-3 and the selection transistors M3-1 , M3-2 and M3-3 is only shown as an example. Alternatively, another connection can also be arranged, which enables resetting and / or evaluation of generated charge carriers.

Although the transistors and gates are described as MOS-based transistors with source, drain and gate connections, alternatively, bipolar transistors with an insulated control connection (insulated gate bipolar transistor-IGBT) can also be arranged, which complementarily a gate connection, a collector - And have an emitter connection. As an alternative or in addition, bipolar transistors and / or junction field-effect transistors (junction FET-JFET) can also be arranged.

Although the pixel structure 30th has been described so that the optional collection gates ( CX1-3 ) are arranged, the pixel structure can be realized 30th also be done entirely or partially without them. An arrangement of this type has the advantage that a captured object or a region of the captured object of three sub-pixels 16a , 16b and 16c can be recorded independently of one another, but the recorded charge carriers can be evaluated together. This increases the sensitivity and deviations from the symmetry of each sub-pixel 16a-c can be reduced or decreased.

3rd shows a schematic block diagram of a device 60 which is a control circuit 54 includes that with the pixel 32 is connected. The control circuit 54 is designed to receive signals, potentials and / or currents from the pixel 32 to get and to the pixel 32 to control, for example by the control circuit 54 is designed to reset the signals FD1-3 Series selection UTX1-UTX3 and or UTX4-UTX6 as in the 3rd are described to the device 60 to create. With reference to 3rd can the control circuit 54 be designed to receive the signals Uout from the pixel 32 to recieve. The control circuit 54 is designed to be based on an amount of charge carriers present in the photoactive areas 18a-c distance information relating to the object are generated 12 to determine. A source of light 56 For example, can be designed to the electromagnetic radiation 22 , approximately in pulse form, so that the electromagnetic radiation 22r at least partially from the object 12 reflected and from the pixel 32 Will be received.

The control circuit can be used to determine the distance information 54 For example, be configured to receive information regarding a position and / or a time and / or interval for transmission. This information can be used to determine the distance information, for example on the basis of runtime calculations (distance = speed × time) and / or trigonometric functions.

4th shows a schematic flow diagram of a method 700 for determining the distance information, the reflectance information and a background light information as it is from the control circuit 54 can be executed.

To illustrate the sequence of a method, such as that of the control circuit 54 executable are nine graphs 710 , 720 , 730 , 740 , 750 , 760 , 770 , 780 and 790 juxtaposed. The graphs 710 to 790 have a common abscissa in the form of a time axis t. The graphs 710 and 720 schematically show a normalized energy level E of the electromagnetic radiation emitted by a light source (graph 710 ) or received electromagnetic radiation from the pixel (graph 720 ). An energy level 58a denotes an energy of a background light, for example at the location of the light source. An energy level 58b also denotes an energy level of the background light, for example at the location of the pixel structure. The energy levels 58a and 58b can be the same or different.

The graphs 730 to 790 each have a normalized ordinate V, which with reference to 3rd the to the - gates TX1-6 applicable signals UTX1 to UTX6 or for the graph 790 a summarized signal "Reset FDs" (ie reset of the storage node) shows that, as an example, a common control of the reset signals FD1 , Reset FD2 and reset FD3 in 3rd means. Alternatively, the activation of one or more reset signals Reset FD1-Reset FD3 also done individually.

The graphs show several measurement cycles carried out one after the other. Since the short-circuited partial pixels are evaluated together as a uniform pixel, the measurements for recording the various signal components (background light, first component of reflected light, second component of reflected light) must be recorded in separate measurements, with all partial pixels being reset between measurement cycles. The light pulse is measured for each measuring cycle according to the graph 710 sent out again. The required three measuring cycles take place in such a short period of time instead of that, in a first approximation, the timing of the reflected light pulse according to the graph 720 remains unchanged for each of the measurement cycles, since the measured object does not move in the first approximation during this period.

The graphs 730 and 740 show the signals in a first measurement cycle. The graphs 750 and 760 show the signals in a second measurement cycle. The graphs 770 and 780 show the signals in a third measuring cycle.

In every measuring cycle, in a time interval before a point in time t0 is the control circuit 54 designed to reset the storage nodes by means of applying the signal FDs an outflow of charge carriers from the storage nodes FD1-3 to enable. Furthermore, the control circuit 54 trained to the signals UTX4 , UTX5 and UTX6 provide so that in the photoactive areas 18a-c generated load carriers can be transported to the discharge areas DD1-3.

The control circuit 54 is in time with the light source 56 synchronized. At a time t3 is the light source 56 trained to the electromagnetic radiation 22 in the form of a pulse of light with a period of time T _p to emit, for example based on a cyclical clock or based on a control by the control circuit 54 or another device. The end of the light pulse is with the point in time t5 labeled on the timeline.

The control circuit 54 is designed to be shown in the graph in a first measurement cycle 730 and 740 , during the time interval ( t3-t5 ) the evaluation gates TX1 , TX2 , TX3 in a conductive state and the laxation gates TX4 , TX5 , TX6 in a non-conductive state, so that in the photoactive areas 18a , 18b , 18c generated charge carriers in the storage nodes FD1 , FD2 , FD3 can be transported and the corresponding signal U _out1 can be obtained at the common tap. After the first measurement cycle, the sub-pixels are reset and the timer is restarted.

The control circuit 54 is designed in a second measurement cycle during a time interval ( t5-t7 ), which refers directly to the time interval in relation to the emitted light pulse ( t3-t5 ) follows, the evaluation gates TX1 , TX2 and TX3 conductive and the laxative gates TX4 , TX5 , TX6 not to turn on, so in the photoactive areas 18a , 18b , 18c generated charge carriers in the storage nodes FD1 , FD2 , FD3 are transportable and the signal U _out2 can be obtained for the second measurement cycle.

The electromagnetic radiation 22r , ie the light pulse, is related to the point in time t3 delayed and reflected from the object 12 at the pixel 32 a. The time of flight (ToF) τ _ToF can be the delay between the emission of the light pulse 22 at the light source 56 until the reflected light pulse arrives 22 at the pixel 32 to be discribed. The reflected light pulse 22r causes charge carriers in the photoactive areas 18a , 18b and 18c be generated. the period τ _ToF causes the reflected light pulse 22r starting at a time t4 (t4 = t3 + τ _ToF ) and ending at one time t6 at the pixel 32 arrives. Point of time t5 follows the time t4 , the time t5 before the time t6 is arranged on the time axis. One time t7 follows the time t6 .

The time interval ( t4-t6 ) in which the reflected light pulse at the pixel 32 arrives, partially overlaps the interval ( t3-t5 ) and partly with the interval ( t5-t7 ). That means the reflected light pulse 22r partly in the first measuring cycle partly in the second measuring cycle as the respective detected signal U _out2 is detectable. A hatched area 62a denotes a measure of charge carriers in the first measurement cycle in the photoactive areas 18a , 18b , 18c generated and to the storage node FD1 , FD2 , FD3 are transported or a strength of the signal U _out1 the first measurement cycle. A hatched area 62b describes a level of charge carriers in the photoactive areas 18a , 18b and 18c generated and to the storage node FD1 , FD2 , FD3 are transported or an amplitude of the signal U _out2 of the second measurement cycle.

When performing the third measurement cycle, shown in the graph 770 and 780 , In a control interval between two times t1 and t2, the control circuit is designed to receive the signals UTX1 , UTX2 , UTX3 provide and at the same time the signals UTX4 , UTX5 and UTX6 to disable and the laxation gates TX4 , TX5 , TX6 to switch into a blocking state. That means that in the photoactive areas 18a , 18b , 18c generated charge carriers in the storage nodes FD1 , FD2 and FD3 can be transported. The control circuit 54 is configured to based on an amount of charge carriers that are in the storage node FD1 , FD2 and FD3 are transported, or based on a strength of the signal U _out3 determine a strength of the background light of the third measurement cycle. That means the control circuit 54 is designed to be based on the drive interval ( t1-t2 ) to determine a background light information.

During the time intervals ( t3-t5 ) and ( t5-t7 ) can also charge carriers based on background radiation in the photoactive areas 18a , 18b and 18c generated to the storage node FD1 , FD2 and FD3 be transported and the signals U _out1 in the first and U _out2 influence (falsify) in the second measuring cycle. This is through the areas 63a and 63b shown. This means that the respective accumulated signal comprises a background light accumulated over the respective interval. The background light information can relate to the detected object area, for example scattered light, which is independent of the light source 56 meets the photoactive areas. The control device 54 is designed to correct this distortion based on the signal U _out3 correct the third measurement cycle. This can be done, for example, by subtracting the signal levels.

The execution of the three measurement cycles corresponds to a complete measurement, whereby a multiple of the three measurement cycles can also be carried out in order to carry out an averaging of the signals. There are then signals U _out1 , U _out2 , U _out3 for each of the measurement cycles, each of the signals referring to a different time window of the signal accumulation with respect to the emitted light pulse.

A sum of the hatched areas (possibly cleaned of the backlight) 62a and 62b can from the control device 54 can be calculated, for example, in order to determine a total energy of the reflected light pulse. Are the control device 54 Information regarding an energy strength of the emitted light pulse of the light source 56 provided, for example by subtraction or division, a measure of the reflectance of the object 12 be preserved. In other words, the sum of the hatched areas (possibly cleaned from the backlight) 62a and 62b or the signals Uout of the first measurement cycle and Uout of the second measurement cycle describe the total energy of the reflected light pulse. A proportion of the total energy of the reflected light pulse in relation to the total energy of the emitted light pulse can show what proportion of the emitted light pulse from the object 12 is reflected, i.e. contain the reflectance information. The control intervals ( t1-t2 ), ( t3-t5 ) and ( t5-t7 ) can span the same or different time periods.

The control circuit 54 is trained to the signals U _out1 the first measurement cycle and U _out2 of the second measurement cycle in relation to one another, for example by forming a quotient. A quotient of the signals U _out1 the first measurement cycle and U _out2 of the second measurement cycle or a quotient of the tightened areas 62a and 62b (adjusted for the background radiation / background light or not adjusted) can provide information about which portions of the reflected light pulse in the time interval ( t3-t5 ) and in the time interval ( t5-t7 ) of the pixel 32 Will be received. The synchronization of the time intervals ( t3-t5 ) and ( t5-t7 ) enables the runtime to be determined τ _ToF . the period τ _ToF can with a knowledge of a distance between the light source 56 and the pixel 32 , for example in one of the electromagnetic radiation 22 distance traveled are transferred.

Is the light source 56 for example adjacent to the pixel 32 arranged, a distance between one of the pixels 32 facing surface of the object 12 and the pixel 32 than half of the distance covered by the light pulse.

If distance information is to be calculated from the detected signals, the distance d can be calculated from all three measurement cycles in the presence of signals: $$d=\frac{c}{\mathrm{2nd}}{T}_P\frac{U_{Out\mathrm{2nd}}-U_{Out\mathrm{3rd}}}{U_{\mathrm{<figure-callout\; id="1"\; label="O\; u\; t"\; filenames="DE102018132683A1\_0003.png,DE102018132683A1\_0006.png"\; state="\{\{state\}\}">O\; </figure-callout>}ut1}+U_{Out\mathrm{2nd}}-\mathrm{2nd}\cdot U_{Out\mathrm{3rd}}}$$

Although the arrangement of the control intervals ( t3-t5 ), ( t5-t7 ) and ( t1-t2 ) have been described in such a way that they are arranged sequentially in time, the control intervals ( t3-t5 ), ( t5-t7 ) and ( t1-t2 ) can also be arranged to overlap completely or partially in time. A detection of two independent signals (graphs 730 and 740 ) or three independent signals (graph 730 , 740 and 750 ) enables determination of the distance and reflectance information or, in addition, the background light information. The control intervals ( t3-t5 ), ( t5-t7 ) and ( t1-t2 ) have the same or different length in time.

5 shows a schematic block diagram of a distance detection system 90 which is the pixel structure 30th , the control circuit 54 that with the pixel structure 30th is coupled, and the light source 56 having. The control circuit 54 and the light source 56 are interconnected so that a simple synchronization of control circuit 54 and light source 56 is possible. This can be done for example by a common trigger or a common timer. The light source 56 is adjacent to the pixel structure 30th arranged so that a transit time of the radiation pulse from the light source 56 to the object 12 is essentially the same as a transit time of the reflected radiation pulse from the object 12 to the pixel structure 30th .

Alternatively or additionally, the light source 56 also spaced from the pixel structure 30th be arranged.

The distance detection system 90 can be designed to by means of the light source 56 the radiation pulse 22 with a duty cycle of less than or equal to 1%, less or equal to 0.5% or less or equal to 0.1%. A total of radiation pulses can have a duty cycle of less than or equal to 50% based on a detection cycle of a frame. A duty cycle of one percent means, for example, that a cycle or an interval with a length of, for example, 30 μs has a pulse with a width of 30 ns and a further pulse is transmitted after 2970 ns. A pulse duration of 30 ns can be derived, for example, from a pulse duty factor of 1/3000, which can be influenced by eye safety criteria, and a detection range of 4.5 m. In other words, electromagnetic radiation 22 Have radiation pulses with a small duty cycle and therefore pulsed transit times.

6a shows a schematic plan view of a pixel structure 110 according to the state of the art. At a photoactive area (photoactive area) 92 are three storage nodes FD1 , FD2 and FD3 as well as a laxation area DD arranged. 6b shows a schematic cross-sectional view of the pixel structure 110 .

They show 6a and 6b a schematic of a ToF pixel based on a lateral drift field photo diode (LDPD) with three short-term integrators and a take-off node to eliminate extraneous light outside the short-term integration window, wherein 6a a top perspective and 6b shows a cross section along the transfer direction of the pixel.

7 shows a schematic timing of a method for evaluating the pixel structure 110 according to the state of the art, which can be iterated several times if necessary in order to improve the repeatability. This timing diagram is similar to that above with reference to 4th Described scheme, in which, however, the sub-pixels are evaluated together for acquisition, while here a single photoactive area is operated with several storage nodes.

QUOTES INCLUDE IN THE DESCRIPTION

This list of documents listed by the applicant has been generated automatically and is only included for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent literature cited

• DE 102008025669 A1 [0003]
• WO 2008/116699 A2 [0004]
• WO 2013/001084 A1 [0006]
• DE 1020142015972 A1 [0018, 0021, 0024]

Claims (12)

Pixel structure (10; 30) for optical distance measurement on an object (12), with at least one pixel (14; 32), comprising a first sub-pixel (16a), a second sub-pixel (16b) and a third sub-pixel (16c) for detecting the Object area; wherein the first sub-pixel (16a) comprises a first photoactive region (18a), a first storage node (26a, FD1) and a first evaluation gate (24a, TX1), the first evaluation gate (24a, TX1) adjacent to the the first storage node (26a, FD1) and the first photoactive region (18a) of the first sub-pixel (16a), and is designed to transport charge carriers generated in the first photoactive region (18a) from the first photoactive region (18a) to control to the first storage node (26a, FD1); and wherein the second sub-pixel (16b) comprises a second photoactive region (18b), a second storage node (26b, FD2) and a second evaluation gate (24b, TX2), the second evaluation gate (24b, TX2) adjacent to the second storage node (26b, FD2) and the second photoactive region (18b) of the second sub-pixel (16b), and is designed to transport charge carriers generated in the second photoactive region (18b) from the second photoactive region (18b ) to the second storage node (26b, FD2). wherein the third sub-pixel (16c) comprises a third photoactive region (18c) and a third storage node (26c, FD3) and a third evaluation gate (24c, TX3), the third evaluation gate (24c, TX3) adjacent to the third storage node (26c, FD3) and the third photoactive region (18c) of the third sub-pixel (16c), and is designed to transport charge carriers generated in the third photoactive region (18c) from the third photoactive region (18c) to the third storage node (26c, FD3), wherein an amplifier circuit (M2-1, M2-1, M2-3) connected to the respective storage node (26a-c, FD1-3) is designed to be based on a quantity generate a resulting electrical potential from charge carriers stored in the respective storage node (26a-c, FD1-3), which represents readable information relating to the amount of charge carriers stored in the respective storage node (26a-c, FD1-3), dad characterized in that the amplifier circuits of at least two storage nodes are short-circuited on the output side - permanently or - switchably at times, so that the resulting electrical potentials can be read out in parallel by the at least two storage nodes via a single tap and thus the partial pixels assigned to the at least two storage nodes can be read out together are. Pixel structure according to Claim 1 , in which a first main side surface of the first sub-pixel (16a), a second main side surface of the second sub-pixel (16b) and a third main side surface of the third sub-pixel (16c) are congruent. Pixel structure according to one of the preceding claims, in which at least one of the sub-pixels (16a-c; 16'ab) comprises a collecting gate (CX1-3) which is located between the respective photoactive region (18a-c) and the respective evaluation gate (26a -c) is arranged and designed to transport generated charge carriers from the respective photoactive area (18a-c) to the respective evaluation gate (24a-c, TX1-3) through the collecting gate (CX1-3) Taxes. Pixel structure according to one of the preceding claims, in which each of the sub-pixels (16a-c; 16'ab) comprises a discharge gate (TX4-6) and a discharge region (DD1-3), the respective discharge gate (TX4-6 ) is formed adjacent to the respective photoactive area (18a-c) and adjacent to the respective discharge area (DD1-3), and is designed to transport charge carriers generated in the respective photoactive area (18a-c) to the respective discharge area (DD1-3) to control. Pixel structure according to Claim 4 , in which the respective discharge area (DD1-3) can be connected to a respective reference potential (vddpix, vddpix1-3). Pixel structure according to Claim 5 , in which the respective reference potentials (vddpix, vddpix1-3) are interconnected to form a potential (vddpix). Pixel structure according to one of the preceding claims, further comprising reset transistors (M1-1, M1-2, M1-3) which are connected to the respective storage node (26a-c, FD1-3) and are designed to have a reset potential (reset FD1, reset FD2, reset FD3) to the respective storage node (26a-c, FD1-3) so that charge carriers stored in the respective storage node are removed. Pixel structure according to one of the preceding claims, the amplifier circuits (M2-1, M2-2, M2-3) each have a selection switch in order to apply the respective measurement voltage to the short-circuited outputs based on a selection signal (line selection). Pixel structure according to one of the preceding claims, in which the photoactive region of a partial pixel is designed as a pinned photodiode or photogate structure or lateral drift field detector. Distance detection system with a pixel structure according to one of the Claims 1 to 9 , and a radiation source (56), which is designed to emit a radiation pulse (22) in the direction of an object (12); and a control circuit (54) which is coupled to the pixel structure (10; 30) and the radiation source (56) and which is designed to determine distance information relating to the object (12) by means of runtime evaluation. Distance detection system according to Claim 10 , in which the control circuit (54) is designed to determine reflectance information relating to the object (12). Distance detection system according to Claim 10 or 11 , in which the radiation source (56) is arranged adjacent to the pixel structure (10; 30), so that a transit time of the radiation pulse (22) from the radiation source (56) to the object (12) is essentially the same as a transit time of the reflected radiation pulse (22r) from the object (12) to the pixel structure (10; 30).

Images