DE102012024523A1 - Liquid Crystal Display Device - Google Patents

Abstract

There is disclosed an LCD display device including: a substrate; an array cell formed on the substrate and defined in a display area and a non-display area; a thin film transistor formed on the display area of the device cell; a light blocking layer configured to block light irradiated in a semiconductor layer of the thin film transistor; and an identification mark layer used for writing information about the arrangement cell formed in the same layer as the light blocking layer.

Description

The present application claims priority under 35 USC, Section 119 (a), Korean Patent Application No. 10-2012-0021889, filed Mar. 2, 2012, which is hereby incorporated by reference in its entirety.

BACKGROUND

Area of the revelation

The present application relates to a liquid crystal display device.

Description of the Related Art

With the advent of an information society, the requirements for display devices used to display images have increased in a variety of ways. Thus, flat panel display devices, which are thinner and lighter as compared to cathode ray tubes (CRTs) of the related art, are actively researched and manufactured. The flat panel display devices include liquid crystal display devices (LCD devices), plasma display devices (PDPs), organic light emitter display devices (OLED devices), etc. Among the flat panel display devices, the LCD devices are now embraced by features such as small size, light weight, thin, and low power drive used.

In general, the LCD display device includes a thin film transistor array substrate in which thin film transistors are disposed, a color filter array substrate in which color filters are disposed, and a liquid crystal layer interposed between the two substrates. The LCD display device can be manufactured by successively executing a transistor manufacturing process, a color filter manufacturing process, a liquid crystal cell manufacturing process, and a module manufacturing process.

The liquid crystal cell manufacturing process may include an alignment layer formation process for aligning liquid crystal molecules, a cell gap formation process, a liquid crystal injection process, a cell separation process, and an investigation process.

To ensure process efficiency for process automation, a labeling process for forming an identification mark on an array substrate for the LCD display device may be performed when the LCD display device is manufactured. Thus, the liquid crystal cell formation process may include the labeling process for forming an identification mark on the substrate in unit cells.

1 Fig. 10 is a plan view showing an arrangement substrate of an LCD display device in accordance with the related art.

Based on 1 contains the array substrate 101 the related-art LCD display device has a plurality of arrangement cells 110 on a substrate 101 are formed.

The multiple arrangement cells 110 are each to a display area 111 which is used for displaying images and a non-display area 113 , in which no picture is displayed, defined.

On the non-display area 113 can be an identification mark position 115 be educated. The identification mark position 115 can be formed when on each placement cell 110 not shown gate or data lines are formed. On the identification mark position 115 An identification tag can be written. The tag may be process information about each device cell. The identification mark may be formed on the identification mark layer by a pulsed laser beam in a gravure form.

The identification mark position 115 is formed in the same metal layer as the gate or data line having a thickness of several thousand angstroms. Thus, a high energy pulsed laser beam must be used to write the identification mark. As in 2 2, the high-energy impulse laser beam may cause cracks in the insulating layers laminated on the upper and lower surfaces of the tag layer. In accordance therewith, the substrate may be damaged by external influences exerted on the crack portions.

SHORT SUMMARY

Accordingly, embodiments of the present application are directed to an LCD device that substantially alleviates one or more problems due to the limitations and disadvantages of the related art.

The embodiments are intended to provide an LCD device designed to prevent the generation of cracks in a substrate when writing an identification mark.

Additional features and advantages of the embodiments are set forth in the description which follows, and in part will be apparent from the description, or may be learned by the practice of the embodiments. The advantages of the embodiments will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

In accordance with a first general aspect of the present embodiment, an LCD display device includes: a substrate; an array cell formed on the substrate and defined in a display area and a non-display area; a thin film transistor formed on the display area of the device cell; a light blocking layer configured to block light irradiated in a semiconductor layer of the thin film transistor; and an identification mark layer used for writing information about the arrangement cell formed in the same layer as the light blocking layer.

Other systems, methods, features, and advantages will be or become apparent to those skilled in the art upon examination of the following figures and detailed description. All such additional systems, methods, features, and advantages are intended to be embraced within this description, to be within the scope of the present disclosure, and to be protected by the following claims. Nothing in this section is intended to limit this claim. Further aspects and advantages are discussed below in connection with the embodiments. Of course, both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory, and are intended to provide further explanation of the disclosure as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this application, illustrate one or more embodiments of the present disclosure and, together with the description, serve to explain the disclosure. In the drawings:

1 Fig. 10 is a plan view of an array substrate of an LCD display device in accordance with the related art;

2 a plan view illustrating the generation of cracks when an identification mark is written;

3 10 is a plan view showing a part of an arrangement cell of an LCD display device in accordance with an embodiment of the present disclosure;

4 a cross-sectional view showing the arrangement cell of the LCD display device along the lines AA 'and BB' in 3 shows;

5 a table illustrating laser pulse beams respectively used for writing an identification mark in accordance with the present embodiment and the related art; and

6 5 is a plan view showing the state of an identification mark layer of the LCD display device in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION OF THE EMBODIMENTS

In the present disclosure, of course, an element such as a substrate, a layer, a region, a layer, or an electrode, when referred to in the embodiments, may be formed "on" or "under" another element is, can be directly on or under the other element or can have intermediate elements (indirect). The term "on" or "below" an element is determined from the drawings.

Reference will now be made in detail to the present embodiments, examples of which are illustrated in the accompanying drawings. In the drawings, the sizes and thicknesses of elements may be exaggerated, omitted or simplified for the sake of clarity and convenience of description, but not the practical sizes of elements.

3 FIG. 10 is a plan view showing a part of an arrangement cell of an LCD display device in accordance with an embodiment of the present disclosure. FIG.

Based on 3 can be an arrangement cell 10 the LCD device in accordance with an embodiment of the present disclosure in a display area 11 which is used to display images and a non-display area 13 , in which no picture is displayed, to be defined. The non-display area 13 can in the Way that he defined edges of the ad area 11 surrounds.

The display area 11 can be defined in several pixel areas.

Each of the pixel areas may be through a gate line 31 and through a data line 41 Being intersected, being defined. The gate line 31 may be formed by running along a first direction. The data line 41 may be formed by moving along a second direction, which is the gate line 31 cuts, runs. With the gate line 31 and with the data line 41 For example, a thin film transistor may be electrically connected.

The thin film transistor may be a gate electrode 33 , a semiconductor layer 21 , a source electrode 43 and a drain electrode 45 contain.

The gate line 31 can with the gate electrode 33 of the thin film transistor to be electrically connected. The data line 41 can with the source electrode 43 of the thin film transistor to be electrically connected.

The gate electrode 33 may be formed by being from the gate line 31 protrudes. In other words, the gate electrode 33 may be formed in the form of a projection extending from the gate line 31 protrudes. The source electrode 43 may be formed by being from the data line 41 protrudes. In other words, the source electrode 43 may be formed in the form of a projection extending from the data line 41 protrudes.

In each pixel area, a pixel electrode 51 be educated. The pixel electrode 51 can with the drain electrode 45 of the thin film transistor to be electrically connected. Such a pixel electrode 51 may be formed of a transparent conductive material.

On the non-display area 13 can be an identification mark position 15 be educated.

On the identification mark position 15 An identification tag may be written. The identification tag can provide process information about each device cell 10 be. The identification mark may be formed on the identification mark sheet using a pulse laser beam in a gravure form.

4 FIG. 12 is a cross-sectional view showing an arrangement cell of the LCD display device along lines AA 'and BB' in FIG 3 shows.

Based on 4 can on a substrate 1 a light blocking position 17 and an identification mark position 15 be educated.

The light blocking position 17 may be formed in an area that is a channel area 21a a semiconductor layer 21 , which is later trained, is opposite. Exactly the light barrier position 17 be formed in a field that is a gate electrode 33 , which is later trained, is opposite.

The light blocking position 17 has a function of shielding light from a backlight unit in the channel area 21a the semiconductor layer 21 is irradiated on. Thus, the light blocking position 17 prevent current leakage due to charge carriers formed by light. The light blocking position 17 may be formed to have a wider area than the channel area 21a the semiconductor layer 21 having. Although not shown in the drawings, the light blocking layer 17 be formed in such a way that they have a wider area than the semiconductor layer 21 having. The light blocking position 17 that compared to the semiconductor layer 21 is formed with a wider area, the semiconductor layer 21 protect against light from the backlight unit.

The identification mark position 15 may be in an edge of the non-display area 13 be educated. On the identification mark position 15 An identification tag may be written. The identification tag can provide process information about each device cell 10 be. The identification mark may be on the identification mark position 15 be formed using a pulse laser beam in a gravure printing.

The identification mark position 15 can through the same process as the light blocking position 17 be formed. In addition, the identification mark position 15 made of the same material as the light barrier layer 17 be formed. For example, the tag position 15 and the light blocking position 17 of at least one selected one from a group of materials including titanium Ti, chromium Cr, nickel Ni, aluminum Al, platinum Pt, gold Au, tungsten W, copper Cu and molybdenum Mo.

The identification mark position 15 and the light blocking position 17 may be formed in a thickness of several angstroms. Preferably, the identification mark position 15 and the light blocking position 17 formed in a thickness range of about 300 ~ 500 Å. The light blocking position 17 is used to block only light coming from the backlight unit into the channel area 21a the semiconductor layer 21 is irradiated. Thus, the light blocking position 17 thinner than the gate line or the data line used to transmit a signal may be formed.

To reuse reflected light, the identification mark position 15 of molybdenum Mo, which is suitable for reflecting light, may be formed. Thus, the identification mark position 15 reduce power consumption and increase brightness. In addition, the identification mark position 15 with the thickness of several hundred angstroms allow the identification mark by a low-energy pulsed laser beam 70 is written. Preferably, the tag position is 15 formed in a thickness range of about 300 ~ 500 Å. Thus, the generation of cracks in the substrate 1 or prevented in the insulating layer by the laser beam. Accordingly, damage to the LCD device due to external influences can be prevented, and moreover, the reliability of the LCD device can be increased.

On the substrate 1 that with the identification mark position 15 and with the light blocking position 17 can be provided, a buffer layer 19 be educated. The buffer layer 19 can prevent the ingress of contaminants passing through the substrate 1 go, prevent. In addition, the buffer layer 19 a step coverage, by the tag position 15 and through the light blocking position 17 caused, reduce. Such a buffer layer 19 may be formed of a silicon oxide such as SiO 2 or others.

On the buffer layer 19 can the semiconductor layer 21 be educated. The semiconductor layer 21 can in the channel area 21a , in the source area 21b and in the drain area 21c be defined. The source area 21b and the drain area 21c can pass through both sides of the channel area 21a be educated. The canal area 21a can in a field of buffer location 19 , that of the light blocking position 17 opposite, be formed. The semiconductor layer 21 may be formed of polycrystalline silicon. In addition, the semiconductor layer 21 formed by a low temperature polysilicon process (LTPS process).

On the semiconductor layer 21 and on the buffer layer 19 may be a gate insulating layer 20 be educated. The gate insulating layer 20 is used to the semiconductor layer 21 from a gate electrode 33 which is later formed to electrically disconnect. Thus, the gate insulating layer must 20 have the property of high quality insulation. Such a gate insulating layer 20 may be formed of an inorganic insulating material or of an organic insulating material. The inorganic insulating material may include silicon nitride SiNx and silicon oxide SiOx. The organic insulating material may contain benzocyclobutene BCB, etc.

On the gate insulation layer 20 can be the gate electrode 33 and a gate line 31 be educated. The gate electrode 33 can with the gate line 31 be electrically verbenen. In addition, the gate electrode 33 be formed by that of the gate line 31 protrudes. In addition, the gate electrode 33 be formed at a location that the channel area 21a the semiconductor layer 21 and the light blocking position 17 opposite. Such a gate electrode 33 and gate line 31 may be formed of a gate metal material. The gate metal material may include at least one selected from a material group consisting of titanium Ti, chromium Cr, nickel Ni, aluminum Al, platinum Pt, gold Au, tungsten W, copper Cu, and molybdenum Mo.

On the gate insulation layer 20 connected to the gate line 31 and with the gate electrode 33 can be provided, a layer insulating layer 22 be educated. The layer insulating layer 22 is used to the gate electrode 33 from the source and drain electrodes 43 and 45 which are later trained to electrically disconnect. Thus, the layer insulating layer must 22 have the property of high quality insulation. Such a layer insulating layer 22 may be formed of an inorganic insulating material or of an organic insulating material. The inorganic insulating material may include silicon nitride SiNx and silicon oxide SiOx. The organic insulating material may contain benzocyclobutene BCB, etc.

In the layer insulating layer 22 and in the gate insulating layer 20 can be a source contact hole 42 and a drain contact hole 46 be educated. The source contact hole 42 can through the layer insulating layer 22 and through the gate insulating layer 20 go and the source area 21b the semiconductor layer 21 uncover. The drain contact hole 46 can through the layer insulating layer 22 and through the gate insulating layer 20 go and the drain area 21c the semiconductor layer 21 uncover. In other words, the source contact hole 42 and the drain contact hole 46 may be formed in such a way that they pass through the layer insulating layer 22 and through the gate insulating layer 20 go to the source area 21b and the drain area 21c the semiconductor layer 21 expose.

On the layer insulation layer 22 connected to the source and drain contact holes 42 and 46 can be provided, the source and the drain electrode 43 and 45 and a data line 41 be educated. The source electrode 43 can with the data line 41 be electrically connected. In addition, the source electrode 43 be formed by that they are from the data line 41 protrudes. In addition, the source electrode 43 with the source area 21b the semiconductor layer 21 via the source contact hole 42 be electrically connected. The drain electrode 45 can with the drain area 21c the semiconductor layer 21 be electrically connected. The data line 41 , the source electrode 43 and the drain electrode 45 may be formed of a data metal material. The data metal material may include at least one selected from a material group consisting of titanium Ti, chromium Cr, nickel Ni, aluminum Al, platinum Pt, gold Au, tungsten W, copper Cu, and molybdenum Mo.

On the layer insulation layer 22 that with the data line 41 , with the source electrode 43 and with the drain electrode 45 can be provided, a passivation layer 24 be educated. The passivation situation 24 may have a function of protecting the main components of the thin film transistor from external substances. Such a passivation situation 24 may be formed of an inorganic insulating material or of an organic insulating material. The inorganic insulating material may include silicon nitride SiNx and silicon oxide SiOx. The organic insulating material may contain benzocyclobutene BCB, etc.

A pixel contact hole 53 that the drain electrode 45 can be formed in such a way that it passes through the Passivierungslage 24 goes. The pixel electrode 51 can on the passivation situation 24 be formed in a pixel area. The pixel electrode 51 can over the pixel contact hole 53 with the drain electrode 45 be electrically connected. Such a pixel electrode 51 may be formed of a transparent conductive material. The pixel electrode 51 can z. B. from indium tin oxide ITO or from indium zinc oxide IZO or indium tin zinc oxide ITZO be formed.

5 FIG. 13 is a table comparing laser pulse beams respectively used for writing an identification mark in accordance with the present embodiment and the related art.

The table 5 compares the intensity of a pulsed laser beam irradiated in the tag area of the related area formed of the same material and in the same layer as the gate line or the data line, and the intensity of another pulse laser beam incident in the tag position in accordance with FIG is irradiated in the present embodiment.

The identification mark layer of the related art is formed of the same material and in the same layer as the gate or data line and in a thickness range of about 2000~5000 Å. The pulsed laser beam irradiated into the identification mark layer of the related art has a power of 1.56 W, a frequency of about 70 kHz and a peak power of 223 mW.

Meanwhile, the identification mark ply of the present embodiment is formed of the same material and in the same layer as the light blocking ply and in a thickness range of several hundreds angstroms, preferably 300 ~ 500 angstroms. The pulse laser beam irradiated in the tag layer of the present embodiment may have a power of 0.624 W, a frequency of about 40 kHz and a peak power of 156 mW.

The power means a total energy per unit of time. In addition, the peak power means an amount of power for a single pulse of the pulsed laser beam.

The intensity of the pulsed laser beam of the related art and the intensity of the pulsed laser beam in accordance with the present embodiment correspond to an intensity of the pulse laser beam high enough to detect the identification mark via an optical reader OCR.

As seen from the table 5 As can be seen, the present embodiment, which uses a low power laser beam of 0.624mW, can provide the effect of 60% power reduction as compared to the related art using a high power 1.56W laser beam.

6 FIG. 10 is a plan view showing the state of an identification mark layer of the LCD display device in accordance with an embodiment of the present disclosure. FIG.

As in 6 4, no crack is generated in the upper and lower layers of the identification mark ply in accordance with the present embodiment.

More specifically, cracks are generated in a substrate or in an insulating layer positioned on the lower or on the upper surface of the related-area tag layer. On the other hand, the identification mark layer of the present embodiment is formed in the same position as the light blocking layer. Thus, the generation of a crack in the substrate or in the buffer layer positioned on the lower or on the upper surface of the identification mark layer can be prevented.

The generation of a crack in the substrate depends on the peak power and the frequency of the pulse laser beam. If the identification mark is written in the present embodiment using a pulse laser beam having a frequency of about 40 kHz and a peak power of about 156 mW, no crack is generated. Since generation of a crack in the substrate or in the insulating layer is prevented, damage to the LCD device can be prevented. In addition, the reliability of the LCD device can be increased.

As described above, the present embodiment enables the identification mark layer to be formed in the same layer as the thin light blocking layer. Thus, the generation of a crack in the substrate can be prevented. Accordingly, the durability of the LCD device can be increased against external influences and, moreover, the reliability of the LCD device can be increased.

Any reference in this specification to "one embodiment," "embodiment," "exemplary embodiment," etc. means that a particular feature, structure, or characteristic described in connection with the embodiment is disclosed in at least one embodiment Invention is included. The occurrence of such formulations at various points in the description does not necessarily refer to the same embodiment throughout. It is further claimed that, when described in connection with any embodiment, a particular feature, structure, or trait is within the purview of those skilled in the art, this feature, structure, or property is in conjunction with other of the embodiments bring about.

While embodiments have been described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other changes and embodiments can be devised by those skilled in the art which are within the spirit and scope of the principles of this disclosure. In particular, various changes and modifications are possible with respect to the components and / or arrangements of the respective combination arrangement within the scope of the disclosure, the drawings and the appended claims. Other than variations and modifications to the components and / or arrangements, alternative uses will be apparent to those skilled in the art.

Claims (14)

A liquid crystal display device comprising: a substrate; an array cell formed on the substrate and defined in a display area and a non-display area; a thin film transistor formed on the display area of the device cell; a light blocking layer configured to block light irradiated in a semiconductor layer of the thin film transistor; and an identification mark layer used to write information about the arrangement cell formed in the same layer as the light blocking layer. A liquid crystal display device according to claim 1, wherein the identification mark layer is formed on the non-display portion of the device cell. A liquid crystal display device according to claim 1, wherein the light blocking layer is formed between the substrate and the thin film transistor. A liquid crystal display device according to claim 1, wherein the thickness of the identification mark layer is smaller than that of a gate electrode of the thin film transistor. A liquid crystal display device according to claim 1, wherein the identification mark layer and the light blocking layer are formed in a thickness range of about 300 ~ 500 Å. A liquid crystal display device according to claim 5, wherein a gate electrode of the thin film transistor is formed in a thickness range of about 2000 ~ 5000 Å. A liquid crystal display device according to claim 1, wherein said identification mark layer is formed of at least one selected from a material group consisting of titanium Ti, chromium Cr, nickel Ni, aluminum Al, platinum Pt, gold Au, tungsten W, copper Cu and molybdenum Mo consists. A liquid crystal display device according to claim 1, wherein the information about the device cell has been written on the tag layer by using a pulse laser beam. A liquid crystal display device according to claim 1, wherein the light blocking layer is formed in a region opposite to a channel region of the semiconductor layer. A liquid crystal display device according to claim 1, wherein said light blocking layer is formed to have a wider area than said semiconductor layer. A liquid crystal display device according to claim 1, wherein the semiconductor layer is formed of polycrystalline silicon. A liquid crystal display device according to claim 1, wherein said thin film transistor includes: a buffer layer formed to cover the light blocking layer and configured to prevent external substances that have flowed in from the substrate; the semiconductor layer formed on the buffer layer and defined in a channel region and in a source and a drain region positioned through both side ends of the channel region; a gate insulating layer formed so as to cover the semiconductor layer; a gate electrode formed on the gate insulating layer; a sheet insulating layer formed to cover the gate electrode; a source electrode formed on the sheet insulating layer and electrically connected to the source region; and a drain electrode formed on the sheet insulating layer and electrically connected to the drain region. A liquid crystal display device according to claim 12, further comprising: a passivation layer formed on the sheet insulating layer provided with the source and drain electrodes; and a pixel electrode formed on the passivation layer and electrically connected to the drain electrode. A liquid crystal display device according to claim 1, wherein the identification mark layer is formed between the substrate and a buffer layer and configured to prevent foreign substances which may have entered through the substrate.

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