DE102010035602A1 - Method for patterning layer on silicon substrate used during manufacturing of microelectronic semiconductor component e.g. dynamic RAM, involves applying hard mask formed with metal oxide, metal nitride, metal carbide and metal silicate - Google Patents

Abstract

The method involves applying a hard mask (5) over a silicon substrate, to be structured. The substrate is patterned with drying etching process using the hard mask as an etching mask, where patterning is performed by applying a photoresist layer (3) on the hard mask and exposing the photoresist layer for formation of the mask pattern. The hard mask has thickness ranging between 1 and 50 nm. The hard mask is formed with a main component selected from metal oxide, metal nitride, metal carbide and metal silicate. The hard mask is formed with the main component of zirconium, hafnium or yttrium-aluminum-oxide, nitride, carbide or silicate. The hard mask layer comprises layers of silicon oxide, carbon, silicon oxynitride and silicon nitride.

Description

Technical application

The present invention relates to a method for structuring a layer, in which a hard mask is applied over the layer to be structured and the layer to be structured is subsequently patterned with a dry etching process in which the hard mask serves as an etching mask.

The structuring of layers is required in many technical fields, in particular in microelectronics or microsystems technology, in order to be able to produce the components with the desired properties. A technique commonly used in the field of semiconductor technology for patterning layers is the photoresist technique. In this case, a photoresist, also referred to as a photoresist or resist, is applied to the layer to be patterned, exposed with a pattern and developed, so that the photoresist layer forms a mask or mask on the layer to be structured, which specifies the desired structure to be produced. An etching process then etches this structure into the underlying layer, with the applied mask serving as an etching mask.

As miniaturization progresses, modern semiconductor manufacturing requires the use of ever thinner photoresist layers to achieve the desired resolution. This is partly due to the reduced optical depth of field in the exposure of the photoresist with shorter wavelengths, for example when using DUV or EUV radiation, and partly due to the decreasing stability of the structures in the photoresist with increasing aspect ratios, caused by the smaller dimensions structures, which also applies to other structuring methods (eg e-beam electron beam lithography). Due to the necessary reduction of the photoresist thicknesses and, at the same time, limited etch resistance of these photoresists, the achievable etch selectivity in the dry etch processes customarily used for structuring, for example, semiconductor materials is not sufficient.

State of the art

To improve the selectivity during etching, it is known to additionally use one or more hard mask layers between the photoresist and the layer to be structured. The structure produced in the photoresist is transferred into the hard mask layer, which then serves as an etching mask for structuring the underlying layer. The structures are in each case transferred to the hard mask and from there to the underlying layer by dry etching processes. A hardmask layer is generally a more etch resistant material than photoresist and, when used in a dry etch process, allows an increase in selectivity and thus the use of a thinner etch mask. This technique can be further optimized by using several intermediate layers to form a so-called hard mask layer stack.

For example, shows the DE 10 2006 024 735 A1 a method of patterning a layer using a hard mask layer stack, wherein the hard mask layer stack consists of a lower carbon layer, an overlying layer of SiO ₂ or SiON, and an upper silicon layer. With this hard mask layer stack, structures with dimensions of less than 100 nm can be produced. However, the lower hard mask layer of the layer stack still has a thickness of 100-150 nm. This thickness is required to produce the desired etching depths in the layer to be structured.

With further miniaturization of the structures, in particular with regard to future technology nodes ≦ 36 nm, however, the required layer thicknesses of the photoresist layer for patterning hard mask layers having a thickness of ≥ 100 nm are too large or very complicated hard mask layer stacks are required.

The object of the present invention is to specify a method for structuring a layer with a hardmask technology, which enables the use of photoresist layers having a thickness of ≦ 100 nm.

Presentation of the invention

The object is achieved by the method according to claim 1. Advantageous embodiments of the method are the subject of the dependent claims or can be found in the following description and the embodiment.

In the proposed method, a hard mask is first applied above or above the layer to be structured. This can be done in a known manner by applying a hard mask layer or a layer stack having at least one hard mask layer to the surface of the layer to be structured and then patterning it to produce the hard mask, ie a highly etch-resistant masking. The hard mask can be applied directly to the layer to be structured or to one or more intermediate layers, which are previously applied to the layer to be structured. The term "over the layer to be structured" is therefore in The present patent application does not necessarily mean a direct contact with this layer but only a relative position. The layer to be structured may, for example, be formed by a layer on a semiconductor substrate or by the semiconductor substrate itself. The structure is then transferred by a dry etching process into the layer to be structured, in which the hard mask serves as an etching mask. The proposed method is characterized in that the hard mask consists of a metal oxide, a metal nitride, a metal carbide, a metal silicate or a combination of these material groups as a particularly etching-resistant main component. The main component here is the substance or mixture of substances which has a proportion of ≥ 30% by weight of the material of the hard mask layer. Depending on the application, an auxiliary layer consisting of a different material (eg carbon, SiO ₂ , SiO _x N _y , Si ₃ N ₄ ) may be formed above or below the hard mask layer. The material of the hard mask layer is chosen so that the hard mask provides sufficient selectivity to produce the desired structures in the layer to be structured, but even applied structured or structured via an etching mask consisting of photoresist or an intermediate layer.

The proposed choice of material of the hard mask layer, a high selectivity in dry etching processes in the underlying layer, in particular a semiconductor layer is achieved. In addition to semiconductor layers, the method proposed can also be used to structure other layers which can be patterned by dry etching, for example metals, nonmetals, nitrides, oxides or combinations of these materials. The selectivity for silicon ranges between 1:60 and 1: 100. In comparison, the selectivity between conventional photoresists and silicon is only between 1: 1 and 1: 5. The high selectivity allows the use of very thin hard mask layers of ≦ 100 nm, for example with a thickness between 1 and 50 nm. Thus, when using a photoresist layer for pattern transfer to the hard mask layer and the thickness of the photoresist layer can be significantly reduced, in particular to a thickness in the range between 10 and 100 nm, each u. a. depending on the thickness of the hard mask layer used. The very thin lacquer layers then also enable structuring with very small structure widths by means of dry etching processes, for example with structure widths of .ltoreq.50 nm, in particular of .ltoreq.36 nm. Larger structure widths are of course also possible.

The introduction of the structure into the hard mask layer can be effected by known methods, preferably by the known photoresist technique. In this case, a photoresist layer is applied to the hard mask layer or the hard mask layer stack, patterned exposed and developed to produce a mask structure. The structured exposure of the photoresist layer can take place using known exposure techniques, preferably by means of DUV or EUV radiation (DUV: Deep Ultra Violet; EUV: Extreme Ultra Violet; EUV lithography) or by means of electron beams (electron beam lithography). As a result of the development of the photoresist, the exposed or unexposed regions are removed depending on the type of photoresist, so that the desired mask structure remains on the hard mask layer or the hard mask layer stack. This then serves as an etching mask for the subsequent etching process, with which the mask structure is transferred to the hard mask layer or the hard mask layer stack, for example via a suitable dry etching process. The remnants of the photoresist layer can then be removed in a known manner, for example by wet-chemical stripping or by plasma ashing.

The structuring of the hard mask layer can also be effected by alternative methods, for example by a direct writing method using an electron, ion or laser beam. Another method is structuring without the use of a dry or wet etching process. The hard mask is generated directly in a structured form on the surface of the layer to be structured. For example, a photoresist can first be applied and patterned for this purpose. Subsequently, the hard mask layer is applied conformally to the photoresist structure. Subsequently, the hard mask layer and photoresist are partially thinned back in a LiftOff polishing process to produce the hard mask.

As a hard mask material, for example, compounds of the metals Hf, Al, Y, Zr or mixtures of these metal compounds can be used. A preferred material is ZrO ₂ , optionally in combination with one or more other metal compounds and / or substances. The metal compounds may be in amorphous or crystalline state in the hard mask. The hard mask layer may be formed by suitable deposition methods, for example by means of chemical vapor deposition (CVD) and derived CVD methods, atomic layer deposition (ALD), sputtering, physical vapor deposition (PVD) or using a sol Gel process with a spin coating process, can be applied.

Of course, a hard mask layer stack can also be used in the proposed method. Through the other layers If appropriate coordination with the neighboring layers can be achieved an increase in the selectivity during the patterning sequence and thus an overall increase in the selectivity of the process.

The proposed method can be used, for example, for DRAM, flash and logic products, in the production of which very thin photoresists are required. This is to be expected in particular for DRAM and logic products with feature sizes of ≤ 36 nm. Of course, the application of the proposed method is not limited to such products.

Brief description of the drawings

The proposed method will be explained in more detail using exemplary embodiments in conjunction with the drawings. Hereby show:

1 a schematic representation of the method steps according to a first example of the proposed method;

2 a second example of a possible layer structure in the proposed method; and

3 a SEM image showing trenches and holes created in the layer.

Ways to carry out the invention

1 shows very schematically an example of the structuring of a layer of a silicon substrate 1 according to the proposed method. This is done on the silicon substrate 1 first by atomic layer deposition a hard mask layer 2 made of ZrO ₂ . Subsequently, the deposition of a photoresist layer takes place 3 on the hard mask layer 2 ( 1a - 1c ).

The photoresist layer 3 is then structured in an exposure and development process ( 1d ) to define the mask structure. After the development of the photoresist layer 3 then remains the photoresist mask 4 on the hard mask layer 2 like this in 1e is indicated schematically. By a dry etching process, the structure of the photoresist mask 4 then on the hard mask layer 2 transfer ( 1f ). The resulting hard mask 5 serves as an etch mask for the subsequent dry etch process to create the structures in the silicon substrate 1 ( 1g ). After removing the hard mask 5 then stands the silicon substrate with the desired structure 6 , here in the form of ditches or holes ( 1h ).

In the following, a concrete example for the generation of deep silicon trenches and holes by means of a very thin photoresist layer for electron beam lithography will be described. Here, a hard mask layer stack consisting of a 35 nm thick ZrO ₂ layer 21 and a 20 nm thick SiO ₂ layer 22 used. The layer structure is in 2 shown schematically, the silicon substrate 1 with the hard mask layer stack 21 . 22 and the photoresist applied thereto 3 shows. Two different etch chambers with capacitively coupled plasma sources (CCP) are used for the etching process.

The hard mask layer stack was fabricated by ALD in a 300 mm single wafer reactor on the silicon substrate 1 deposited. The ZrO ₂ layer 21 was grown by direct liquid injection of TEMAZr (Tetrakis [EthylMethylAmino] zirconium) as the starting material. Subsequently, the SiO ₂ layer was 22 in a bubbler process with the starting material 3DMASi (Tris [DimethylAmino] silane) applied. In both cases, ozone was used as the oxidant. To the hard mask layer stack was then applied a commercially available chemically amplified electron beam photoresist (p-CAR, positive resist) having a thickness of 100 nm. With an electron beam direct write (50 kV), a mask pattern having a pattern of holes and trenches was written in the photoresist layer, and then the photoresist layer was developed in a resist developing apparatus. The chemical composition of the photoresist used is comparable to that of standard DUV or EUV photoresists and therefore exhibits a similar etch resistance.

The photoresist structure was deposited in an oxide etching chamber in the upper SiO ₂ layer 22 of the hardmask layer stack. For this purpose, a standard etching technique with Ar, C ₄ F ₆ and O _{2 was used} as etching gases. The resulting in the SiO ₂ layer 22 The generated structure was then transferred to the underlying ZrO ₂ layer in a magnetic field assisted reactive ion etching (MERIE) chamber with dual frequency excitation (60 MHz / 2 MHz). The transfer was carried out in an etching gas atmosphere of Ar, BCl ₃ and Cl ₂ . The proportion of BCl ₃ was chosen so that an etching selectivity between SiO ₂ and ZrO ₂ of about 1: 1 is achieved. In the present case this applies to a proportion of BCl ₃ of ≥ 50% of the etching gas atmosphere. The remaining photoresist layer was then removed by an O ₂ -based plasma ashing process.

In the same etching chamber, the structure then became the hard mask in the silicon substrate 1 transfer. A standard etching technique (based on HBr, NF ₃ , O ₂ ) was used. With the hard mask layer stack, trenches and Laugh in the silicon substrate 1 be produced with smooth side walls and high aspect ratio. 3 shows the SEM image of the generated structure with trenches and holes with a width of 70 nm and a depth of 600 to 700 nm.

With the hard mask layers used here, very high selectivities to silicon of greater than 60: 1 can be produced. This allows the use of very thin hard mask layers and thus also very thin photoresist layers of ≤ 100 nm thickness. Thus, photolithographic techniques for the generation of very small structures, even with feature sizes of <50 nm, in particular ≤ 36 nm, can be used.

LIST OF REFERENCE NUMBERS

1

silicon substrate

2

Hard mask layer

3

Photoresist layer

4

Photoresist mask

5

hard mask

6

structured silicon substrate

21

ZrO ₂ layer

22

SiO ₂ layer

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• DE 102006024735 A1 [0005]

Claims (8)

Process for structuring a layer, which comprises at least the following steps: application of a hard mask ( 5 ) over the layer to be structured ( 1 ), and - structuring the layer to be structured ( 1 ) with a dry etching process in which the hard mask ( 5 ) serves as an etching mask, characterized in that the hard mask ( 5 ) is formed as a main component of a metal oxide, a metal nitride, a metal carbide, a metal silicate or a combination of one or more of these substances. A method according to claim 1, characterized in that the application of the hard mask ( 5 ) comprises at least the following steps: application of a hardmask layer ( 2 ) or a layer stack ( 21 . 22 ) with at least one hardmask layer ( 21 ) on a surface of the layer to be structured ( 1 ), and - structuring the hardmask layer ( 2 . 21 ) for the production of the hard mask ( 5 ) over the layer to be structured ( 1 ). Method according to claim 1 or 2, characterized in that the hard mask ( 5 ) or hardmask layer ( 2 . 21 ) is applied with a thickness of ≤ 100 nm, in particular with a thickness between 1 and 50 nm. Method according to claim 2 or 3, characterized in that the structuring of the hardmask layer ( 2 . 21 ) comprises at least the following steps: application of a photoresist layer ( 3 ) on the hardmask layer ( 2 ) or the layer stack ( 21 . 22 ), - structured exposure and development of the photoresist layer ( 3 ) for forming a mask structure, - transferring the mask structure to the hard mask layer ( 2 ) or the layer stack ( 21 . 22 ) with an etching process. Method according to claim 4, characterized in that the photoresist layer ( 3 ) is applied with a thickness between 10 nm and 100 nm. Method according to one of claims 1 to 5, characterized in that the hard mask ( 5 ) is formed as the main component of Zr, Hf, Al or Y oxides, nitrides, carbides, or silicates. Method according to one of claims 1 to 6, characterized in that a layer stack ( 21 . 22 ), which in addition to the hard mask layer ( 21 ) a layer ( 22 ) of SiO ₂ , carbon, SiO _x N _y or Si ₃ N ₄ . Method according to one of claims 1 to 7, characterized in that the hard mask layer ( 2 ) or the layer stack ( 21 . 22 ) is applied using a sol-gel process by spin coating.

Images