DE102005048363A1 - Method for protection of delicate nano-structures from scratching, e.g. for silicon wafers, involves application of spin-on-glass in several discrete steps - Google Patents

Method for protection of delicate nano-structures from scratching, e.g. for silicon wafers, involves application of spin-on-glass in several discrete steps Download PDF

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DE102005048363A1
DE102005048363A1 DE102005048363A DE102005048363A DE102005048363A1 DE 102005048363 A1 DE102005048363 A1 DE 102005048363A1 DE 102005048363 A DE102005048363 A DE 102005048363A DE 102005048363 A DE102005048363 A DE 102005048363A DE 102005048363 A1 DE102005048363 A1 DE 102005048363A1
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layer
glass
spin
smooth surface
protection
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Konrad Dr. Bach
Daniel Gäbler
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X Fab Semiconductor Foundries GmbH
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X Fab Semiconductor Foundries GmbH
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Priority to DE102005048363A priority Critical patent/DE102005048363A1/en
Priority to PCT/EP2006/067249 priority patent/WO2007042521A2/en
Priority to US12/089,727 priority patent/US8350209B2/en
Priority to EP06794005A priority patent/EP1935035A2/en
Publication of DE102005048363A1 publication Critical patent/DE102005048363A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02134—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising hydrogen silsesquioxane, e.g. HSQ
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/11—Structural features, others than packages, for protecting a device against environmental influences
    • B81B2207/115—Protective layers applied directly to the device before packaging
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

A method for protection of a layer, which consists of needle-shaped silicon peaks with a large aspect-ratio of 4:1 and larger with nanometer dimensions. A spin-on-glass is applied in several steps and in its properties meets the requirements matched to passivating layer and following each application is tempered until a smooth surface is formed.

Description

Schutzschichten für leicht zerkratzbare Oberflächen gibt es schon seit geraumer Zeit. Seien es Hartschichten für Kunststoffgläser oder CDs. Auch für Nanostrukturen gibt es Bemühungen, diese zu schützen ( EP 1215513 ). Im Grunde soll eine Schutzschicht die Zerstörung eines Funktionselementes verhindern, ohne dabei dessen Funktion allzu stark zu beeinträchtigen. Dabei gilt es meist eine Reihe von Randbedingungen mit in Betracht zu ziehen, wodurch sich die Realisierung einer solchen Schicht verkompliziert.Protective coatings for easily scratchable surfaces have been around for some time. Be it hard coatings for plastic glasses or CDs. There are also efforts to protect nanostructures ( EP 1215513 ). Basically, a protective layer to prevent the destruction of a functional element, without affecting its function too strong. It is usually a number of boundary conditions to be taken into consideration, whereby the realization of such a layer complicates.

Das gilt insbesondere für den Schutz einer Schicht, die aus nadelförmigen Siliziumspitzen in Nanometerdimensionen mit großem Aspektverhältnis um 4:1 und größer – kurz als Nanostruktur bezeichnet – besteht, wie sie z.B. mit dem RIE-Verfahren kristallfehlerfrei selbstorganisierend hergestellt werden kann, so wie es bereits vorgeschlagen wurde.The especially applies to the protection of a layer consisting of acicular silicon tips in nanometer dimensions with big Aspect ratio 4: 1 and larger - short as Called nanostructure - consists, as they are e.g. Crystal clear with the RIE process self-organizing can be made, as it has already been proposed has been.

Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren zum Schutz solcher Nanostrukturen anzugeben, welches einen mechanischen Schutz im Rahmen weiterer Verarbeitungsprozesse von Siliziumscheiben mit solchen Schichten schafft, ohne die besonderen Eigenschaften dieser Schichten, wie Reflexion, Adhäsion von chemischen Stoffen etc. wesentlich zu verändern.Of the Invention is based on the object, a method for protecting such Nanostructures specify that a mechanical protection in the context further processing of silicon wafers with such Creates layers, without the special properties of these layers, like reflection, adhesion of chemicals etc. to change significantly.

Gelöst wird diese Aufgabe mit den im kennzeichnenden Teil des Anspruchs 1, 3 und 4 angegebenen Merkmalen.Is solved This object with the in the characterizing part of claim 1, 3 and 4 specified characteristics.

Die Gegenstände der Ansprüche 1, 3 und 4 weisen die Vorteile auf, dass die Schutzschicht die Hohlräume zwischen den zu schützenden nadelförmigen Siliziumspitzen auffüllt und so die Strukturen stabilisiert werden. Zur weiteren Verarbeitung wird eine geschlossene Schicht ausgebildet.The objects the claims 1, 3 and 4 have the advantages that the protective layer between the cavities the one to be protected acicular Fills silicon tips and so the structures are stabilized. For further processing a closed layer is formed.

Aufgrund der so erzeugten glatten Oberfläche können mechanische Beanspruchungen ohne Zerstörung der Nanostruktur abgefangen werden. Auf diese glatte Oberfläche kann sehr viel einfacher eine weitere Schicht aufgebracht und auch wieder entfernt werden.by virtue of the smooth surface thus produced can mechanical stresses intercepted without destroying the nanostructure become. On this smooth surface It can be much easier to apply another layer and also be removed again.

Je nach verwendetem Material greift diese Schutzschicht unterschiedlich in die Funktionsweise der Nanostruktur ein. Die oberflächenvergrößernde Funktion einer Nanostruktur wird durch eine dichte Schicht vollständig unterbunden. Eine poröse Schicht hingegen kann dafür genutzt werden, nur bestimmte Stoffe an die Oberfläche der Nanostruktur durchzulassen, was z.B. bei chemischen Sensoren eine Rolle spielt.ever according to the material used, this protective layer intervenes differently into the functioning of the nanostructure. The surface enlarging function a nanostructure is completely prevented by a dense layer. A porous layer however, it can do that be used only certain substances to the surface of the Pass nanostructure, which is e.g. in chemical sensors one Role play.

Für alle optischen Anwendungen ist es entscheidend, dass die Eigenschaften der Reflexion und Transmission oder auch der Streuung sich nur geringfügig verschlechtern oder sogar verbessern. Dazu muss die Schicht eine geringe Absorption aufweisen. Reflexionsverluste bleiben minimal, wenn der Brechungsindex möglichst gering ist.For all optical Applications, it is crucial that the properties of the reflection and transmission or the dispersion only slightly deteriorate or even improve. For this, the layer has a low absorption exhibit. Reflection losses remain minimal when the refractive index preferably is low.

Die Erfindung soll nun anhand eines Ausführungsbeispiels unter Zuhilfenahme der Zeichnung näher erläutert werden.The Invention will now be based on an embodiment with the aid of closer to the drawing explained become.

Es zeigenIt demonstrate

1 einen vertikalen Schnitt durch eine Fotodiode ohne Schutzschicht auf der Nanostruktur in schematischer Darstellung, 1 a vertical section through a photodiode without protective layer on the nanostructure in a schematic representation,

2 einen vertikalen Schnitt durch eine Fotodiode mit Schutzschicht auf der Nanostruktur in schematischer Darstellung, 2 a vertical section through a photodiode with protective layer on the nanostructure in a schematic representation,

3 ein Diagramm mit den Werten der Reflexion vor und nach dem Aufbringen der SOG-Schutzschicht auf eine Silizium-Nanostruktur. 3 a diagram with the values of the reflection before and after the application of the SOG protective layer on a silicon nanostructure.

Die Figuren sind selbsterklärend und bedürfen keiner weiteren Erläuterung.The Figures are self-explanatory and require no further explanation.

Beispielsweise wird für die Entspiegelung einer Photodiode, hergestellt durch einen CMOS-Prozess, in die Oberfläche des Siliziums mit dem RIE-Verfahren in der bereits vorgeschlagenen Weise eine Nanostruktur geätzt. Auf diesen Prozessschritt folgen üblicherweise noch weitere. Unter anderem müssen die Bondpads für die Kontaktierung der Bauelemente noch von der die Schaltung passivierenden Schicht befreit werden. Diese besteht in der Regel aus SiO2 oder Si3N4 und wird meist durch das CVD-Verfahren aufgebracht. Dieses Verfahren ist mehr oder weniger konform. Spitze Strukturen bleiben dabei erhalten. Es bildet sich keine glatte Oberfläche aus. Zur Beseitigung der Passivierungsschicht sind eine Lackmaske und ein Ätzschritt notwendig. Der aufgebrachte Lack lässt sich jedoch nicht problemlos aus der Nanostruktur entfernen; Lackreste schränken deren Funktionalität ein.For example, for the antireflective coating of a photodiode made by a CMOS process, a nanostructure is etched into the surface of the silicon by the RIE method in the manner already proposed. This process step is usually followed by others. Among other things, the bonding pads for the contacting of the components still have to be freed from the circuit passivating layer. This usually consists of SiO 2 or Si 3 N 4 and is usually applied by the CVD method. This procedure is more or less compliant. Top structures are preserved. It does not form a smooth surface. To remove the passivation layer, a resist mask and an etching step are necessary. However, the applied lacquer can not be easily removed from the nanostructure; Lackreste limit their functionality.

Zum Schutz der Nanostrukturen wird daher vorher eine Schicht aus Spin On-Glas (SOG) durch Aufschleudern aufgebracht, z.B. Hydrogen-Silses-Quioxane (HSQ). Da diese Substanz beim Aufbringen flüssig ist, werden die Zwischenräume der Nanostrukturen lunkerfrei ausgefüllt. Ein Temperschritt härtet dieses Glas aus, führt aber auch zu einem gewissen Schwund, so dass vorteilhafterweise diese Prozedur zu wiederholen ist. Nach wenigen solchen Schritten ist die Nanostruktur komplett eingehüllt und die Oberfläche eben und resistent gegen mechanische Beschädigungen.To protect the nanostructures, therefore, a layer of spin on glass (SOG) is previously applied by spin-coating, for example hydrogen silsesquioxane (HSQ). Since this substance is liquid when applied, the interstices of the nanostructures are filled free of voids. An annealing step hardens this glass, but also leads to egg a certain loss, so that advantageously this procedure is to be repeated. After a few such steps, the nanostructure is completely encased and the surface is even and resistant to mechanical damage.

Die so geschützte Nanostruktur lässt sich nun ohne Probleme mit den Standardprozessen der CMOS-Technologie weiterbearbeiten. Das Aufbringen einer Lackschicht und deren Entfernung stellt kein Problem dar. Durch den geringen Brechungsindex von 1.38 und der Absorptionsfreiheit im Wellenlängenbereich von 150–1100 nm ist die Optische Funktion der Nanostruktur nur geringfügig verschlechtert (siehe 3). Es bleibt bei einer Breitbandentspiegelung, die mit 3,5 % Reflexion deutlich besser ist als die glatte blanke Siliziumgrenzfläche mit > 30 %.The protected nanostructure can now be further processed without any problems using the standard processes of CMOS technology. The application of a lacquer layer and its removal is not a problem. The low refractive index of 1.38 and the absence of absorption in the wavelength range of 150-1100 nm, the optical function of the nanostructure is only slightly deteriorated (see 3 ). It remains at a broadband anti-reflection, which is significantly better with 3.5% reflection than the smooth bare silicon interface with> 30%.

Claims (4)

Verfahren zum Schutz einer Schicht, die aus nadelförmigen Siliziumspitzen mit großem Aspektverhältnis um 4:1 und größer mit Nanometerdimensionen besteht, dadurch gekennzeichnet, dass in mehreren Schritten ein in seinen Eigenschaften den Anforderungen an die zu passivierende Schicht angepasstes Spin-On-Glas aufgebracht und nach jedem Aufbringen getempert wird, bis eine glatte Oberfläche ausgebildet ist.Method for protecting a layer consisting of acicular silicon tips with a high aspect ratio of 4: 1 and larger with nanometer dimensions, characterized in that applied in several steps in its properties to the requirements of the layer to be passivated adapted spin-on glass and after each application is tempered until a smooth surface is formed. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass für Schichten aus nadelförmigen Siliziumspitzen, die in Fenstern von fotoelektrischen Bauelementen vorhanden sind, SOG-Schichten aus Hydrogen-Silses-Quioxane (HSQ) aufgebracht werden.Method according to claim 1, characterized in that that for Layers of acicular Silicon tips in windows of photoelectric devices existing, SOG layers of hydrogen silsesquioxane (HSQ) be applied. Verfahren zum Schutz einer Schicht, die aus nadelförmigen Siliziumspitzen mit großem Aspektverhältnis besteht und Bestandteil eines chemischen Sensors ist, dadurch gekennzeichnet, dass in mehreren Schritten ein in seinen Eigenschaften den Anforderungen an die zu passivierende Schicht angepasstes gasdurchlässiges poröses Spin On-Glas aufgebracht und nach jedem Aufbringen getempert wird, bis eine glatte Oberfläche ausgebildet ist, und in einem letzten Schritt eine Überdeckung mit einer nichtporösen Schicht erfolgt, welche beim letzten Maskenprozess wieder entfernt wird.Method of protecting a layer consisting of acicular silicon tips with big aspect ratio exists and is part of a chemical sensor, characterized in that that in several steps one in its properties meets the requirements gas-permeable porous spin adapted to the layer to be passivated Applied on-glass and tempered after each application until a smooth surface is formed, and in a final step, an overlap with a nonporous Layer takes place, which in the last mask process removed again becomes. Verfahren zum Schutz einer Schicht, die aus nadelförmigen Siliziumspitzen mit großem Aspektverhältnis besteht und Bestandteil eines chemischen Sensors ist, dadurch gekennzeichnet, dass in mehreren Schritten ein in seinen Eigenschaften den Anforderungen an die zu passivierende Schicht angepasstes flüssigkeitsdurchlässiges poröses Spin On-Glas aufgebracht und nach jedem Aufbringen getempert wird, bis eine glatte Oberfläche ausgebildet ist, und in einem letzten Schritt eine Überdeckung mit einer nichtporösen Schicht erfolgt, welche beim letzten Maskenprozess wieder entfernt wird.Method for protecting a layer consisting of acicular silicon tips with big aspect ratio exists and is part of a chemical sensor, characterized in that that in several steps one in its properties meets the requirements liquid-permeable porous spin adapted to the layer to be passivated Applied on-glass and annealed after each application until a smooth surface is formed is, and in a final step, a cover with a non-porous layer which is removed during the last mask process.
DE102005048363A 2005-10-10 2005-10-10 Method for protection of delicate nano-structures from scratching, e.g. for silicon wafers, involves application of spin-on-glass in several discrete steps Withdrawn DE102005048363A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE102005048363A DE102005048363A1 (en) 2005-10-10 2005-10-10 Method for protection of delicate nano-structures from scratching, e.g. for silicon wafers, involves application of spin-on-glass in several discrete steps
PCT/EP2006/067249 WO2007042521A2 (en) 2005-10-10 2006-10-10 Production of self-organized pin-type nanostructures, and the rather extensive applications thereof
US12/089,727 US8350209B2 (en) 2005-10-10 2006-10-10 Production of self-organized pin-type nanostructures, and the rather extensive applications thereof
EP06794005A EP1935035A2 (en) 2005-10-10 2006-10-10 Production of self-organized pin-type nanostructures, and the rather extensive applications thereof

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DE102005048363A DE102005048363A1 (en) 2005-10-10 2005-10-10 Method for protection of delicate nano-structures from scratching, e.g. for silicon wafers, involves application of spin-on-glass in several discrete steps

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69026469T2 (en) * 1989-10-18 1996-10-02 Dow Corning Hermetic substrate layers in an inert gas atmosphere
US6091021A (en) * 1996-11-01 2000-07-18 Sandia Corporation Silicon cells made by self-aligned selective-emitter plasma-etchback process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69026469T2 (en) * 1989-10-18 1996-10-02 Dow Corning Hermetic substrate layers in an inert gas atmosphere
US6091021A (en) * 1996-11-01 2000-07-18 Sandia Corporation Silicon cells made by self-aligned selective-emitter plasma-etchback process

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