CN2901422Y

CN2901422Y - Peripheral module connector with boundery scan test function

Info

Publication number: CN2901422Y
Application number: CN 200620002480
Authority: CN
Inventors: 倪祥智
Original assignee: Askey Computer Corp
Current assignee: Askey Computer Corp
Priority date: 2006-02-07
Filing date: 2006-02-07
Publication date: 2007-05-16
Anticipated expiration: 2016-02-07

Abstract

A perimeter component connecting device with a boundary scanning test function, comprises a perimeter signal terminal group electrically connected with a perimeter component interface of a micro computer device, a test signal terminal group electrically connected with the a boundary sweep test interface of the micro computer device, a groove, and a converter unit, wherein the groove can be electrically connected with the perimeter component meeting the electric specification of the perimeter component interfaces, to make the micro computer device and the perimeter component to relatively process data communication, or can be electrically connected with a test module meeting the electric specification of the boundary scanning test interface. The converter unit comprises a logic circuit and a transmission circuit, wherein the logic circuit can receive the relative electric potential signals of the components arranged in the groove, and process the electric potential signal into a digital controlling signal to control the operation of the transmission circuit, while the transmission circuit can process boundary scanning test on the micro computer device via the test module.

Description

The tool border scans the perimeter component coupling arrangement of test function

Technical field

The utility model is relevant with computer interface equipment, is meant that especially a kind of tool border scans the perimeter component coupling arrangement of test function.

Background technology

The measuring technology of in-out box is meant that the border scans the Test Design of framework on general integrated circuit or the printed circuit board (PCB), be so-called JTAG (Joint Test Action Group, joint test action group) test specification, scan in proper order with whole extraneous input and output pin position integrated circuit package, and the test data of acquisition input/output terminal, or the border that tellite is installed is scanned framework test, therefore include the input/output signal monitoring between external circuitry and the assembly, mutual connection test between the assembly, perhaps internal logic circuit functional test etc. is the high-reliability measuring technology of Circuits System.

This jtag test method mainly has the test access interface (TestAccess Port) that can support its test structure, the test logic circuit can be instructed, input and output such as test data or test result, so serial line interface for extraneous main frame control test, though make things convenient for the test of initial stage circuit design engineering on its structure, so that the system monitoring in later stage or the application of serial communication etc., it is right because it is the hardware connectivity port that exposes to Circuits System, after finally making product, as general computer installation equipment etc., for general user is unnecessary extra means, therefore manufacturer or it is removed to avoid it directly to expose the risk that makes the entire circuit system be subjected to environmental pollution, perhaps it is hidden processing taking-up again again when wanting after treating day by day, can keep be provided with as product maintainability test engineering used, but increased the processing operation of taking out on the one hand on foot, also need leave unnecessary space on the other hand on the circuit board hides ccontaining for this access interface, therefore making has wasted the efficient circuit of circuit board space, when making the making product and can't effectively keep the jtag test function of this Circuits System and take into account the consideration of quality and practical efficient.

The utility model content

The purpose of this utility model is to provide a kind of tool border to scan the perimeter component coupling arrangement of test function.

For achieving the above object, the tool border that the utility model provides scans perimeter component (peripheral device) coupling arrangement of (Boundary-Scan) test function, there is a peripheral signal end group to be electrically connected to the perimeter component interface of microcomputer apparatus, and one the test signal end group border that is electrically connected to this microcomputer apparatus scan test interface, and include:

One slot, have an input end group, a switch terminal group and a transmission ends group, the perimeter component that this input end group conforms to the electrical specification of above-mentioned perimeter component interface, scan border that the electrical specification of test interface conforms to above-mentioned border and scan test module electrically connecting mutually wherein, this transmission ends group is the transmission interface of numerical data signal, and is electrically connected to this periphery signal end group; And

One converting unit has a logical circuit and a transmission circuit, and this transmission ends group and this test signal end group electrically conduct mutually by this transmission circuit, and this logical circuit electrically connects this switch terminal group and this transmission circuit.

Described tool border scans the perimeter component coupling arrangement of test function, should periphery signal end group be SD (the Secure Digital Input/Output) interface that is electrically connected to microcomputer apparatus wherein, this test signal end group be JTAG (the Joint Test Action Group) test interface that is electrically connected to microcomputer apparatus.

Described tool border scans the perimeter component coupling arrangement of test function, wherein the input end group of this slot is a plurality of metal connecting terminal, those metal connecting terminal are respectively to there being a signal pin, the transmission ends group of this slot is this pin of six wherein, and two in all the other those pins is the switch terminal group of this slot.

Described tool border scans the perimeter component coupling arrangement of test function, and wherein this logical circuit has one and electrically connects a pin of this switch terminal group with door (AND GATE).

Described tool border scans the perimeter component coupling arrangement of test function, wherein this logical circuit also have two not gates (NOT GATE) electrically connect should and door, wherein this not gate electrically connects this transmission circuit.

Described tool border scans the perimeter component coupling arrangement of test function, and wherein this transmission circuit has by the made impact damper of CMOS logical circuit technology, and this impact damper has two signal pins and is electrically short circuit mutually.

By enforcement of the present utility model, not only can plug for general perimeter component, and can making things convenient for Circuits System to carry out the border, to scan test required, effectively integrate the peripheral hardware interface of computer installation.

Description of drawings

Below, conjunction with figs. is enumerated a preferred embodiment, and in order to composition member of the present utility model and effect are described further, wherein brief description of drawings is as follows:

Fig. 1 is the circuit box synoptic diagram of preferred embodiment that the utility model provides;

Fig. 2 is the circuit diagram of another preferred embodiment that the utility model provides.

Embodiment

See also and Figure 1 shows that the utility model provides a kind of tool border to scan the circuit box synoptic diagram of the perimeter component coupling arrangement 1 of test function, include a peripheral signal end group 11, a test signal end group 12, a slot 20 and a converting unit 30, wherein:

This periphery signal end group 11 and this test signal end group 12 scan test interface in order to perimeter component interface and the border that is electrically connected to microcomputer apparatus respectively.

This slot 20 has an input end group 21, a switch terminal group 22 and a transmission ends group 23, be to be provided with being provided with the perimeter component that conforms to the electrical specification of perimeter component interface or to scan the test module that the electrical specification of test interface conforms to the border, no matter be that this perimeter component or this test module all need to electrically connect with this input end group 21, again by these transmission ends group 23 transmission of digital data signals; This switch terminal group 22 is in order to respond to the assembly kind that this input end group 21 connected and to export corresponding current potential signal, and this transmission ends group 23 is the transmission interface of numerical data signal, and is electrically connected to this periphery signal end group 11.

This converting unit 30 has a logical circuit 31 and a transmission circuit 32, this logical circuit 31 electrically connects this switch terminal group 22 and this transmission circuit 32, and the current potential signal that this switch terminal group 22 is exported is processed into a digital control signal to control the conducting running of this transmission circuit 32, this transmission ends group 23 is to be electrically conducted mutually by the conducting running of this transmission circuit 32 with this test signal end group 12, makes above-mentioned this test module carry out the border to microcomputer apparatus and scans test.

Therefore the user holds above-mentioned this perimeter component is plugged to this coupling arrangement 1 when general operation, this input end group 21 of 22 inductions of this switch terminal group is connected with this perimeter component, makes this transmission circuit 32 of this logical circuit 31 controls by running so send the current potential signal, make this perimeter component and microcomputer apparatus by this transmission ends group 23 with this periphery signal end group 11 and mutual transmission of digital data signal; When microcomputer apparatus need carry out do tests such as the in-out boxs on high-speed assembly, microprocessor or the tellite, being about to above-mentioned this test module plugs to this coupling arrangement 1, this input end group 21 of 22 inductions of this switch terminal group is connected with this test module, make this this transmission circuit 32 conductings running of logical circuit 31 controls so send the current potential signal, make this test module import by this transmission ends group 23 and this test signal end group 12 that logical circuit that the border scans test instructs and test data to microcomputer apparatus, and output test result from microcomputer apparatus; Therefore make microcomputer apparatus only need this coupling arrangement 1 replacement is inserted with this test module, and on circuit board, retrieve the test access interface as the known technology for another example, just can finish the border easily and scan testing engineering, the Circuits System of microcomputer apparatus is made effective test monitoring.

Other sees also another preferred embodiment provided by the utility model as shown in Figure 2, circuit diagram for the perimeter component coupling arrangement 2 that is inserted in computer installation, be to utilize the external storage assembly conduct of SD card (the Secure Digital Input/Output Card) type that institute at present generally uses to be applied to the constructional device of jtag test, have a slot 40, a SD interface 51, a jtag interface 52, a logical circuit 60 and a transmission circuit 70, wherein:

This slot 40 has an accommodation space 401; a plurality of metal connecting terminal 41 and plurality of signals pin 42 (PIN); this accommodation space 401 can plug for SD card or the replacement of jtag test module; 41 of those metal connecting terminal are the input end group when doing electric connection with SD card or jtag test module; those signal pins 42 correspond respectively to respectively this metal connecting terminal 41 and its specific electrical functionality are respectively arranged; can distinguish in order to a transmission ends group 421 of transmission of digital data signal and a switch terminal group 422 that makes logical circuit 60 runnings in order to the output potential signal; this transmission ends group 421 is for electrically connecting this SD interface 51 and this transmission circuit 70; be to do the numerical data transmission with six pins 42; the sequential control signal that comprises the transmitted in both directions of storage data and steering order and be received from SD interface 51; this switch terminal group 422 is for electrically connecting this logical circuit 60; when this slot 40 is provided with the SD card; the pin position of PIN10 can be set at state that can't activation (Enable) and export the current potential signal of low level; when this slot 40 is provided with the jtag test module; PIN10 then activation drives and the current potential signal of output high levle; and if desire to make this transmission ends group 421 can carry out the function of signal transmitted in both directions; the assembly write-protect defencive function of PIN12 needs in state that can't activation; otherwise if it is under the driving condition of activation, this transmission ends group 421 only can be in the function start of unidirectional output.

This logical circuit 60 for by one with door (AND GATE) 61 and two not gates (NOT GATE) 62,63 logical operation control circuits that constituted, this not gate 63 and electrically connect these transmission circuits 70 and with these logical circuit 60 last digital control signals inputs that produce wherein with a logic output terminal group 64, therefore only when the current potential signal of PIN10 output high levle and PIN12 export the current potential signal of low level, this logic output terminal group 64 just export low level is arranged digital control signal to this transmission circuit 70.

These transmission circuit 70 main impact dampers 71 of being developed by the CMOS logical circuit technology of company of Toshiba (Toshiba) that utilize, for having at a high speed, high-transmission performance and lower powered low-voltage data transmission transmission circuit (Low Voltage Octal Bus Transceiver), wherein the pin position of PIN1 is the direction of decision signal transmission, the pin position of PIN19 then determines the driving of this impact damper 71,71 in this impact damper any functional operation of tool not when the PIN19 activation, this transmission circuit 70 makes the PIN1 of this impact damper 71 and has identical logic input in the design with the mutual short circuit of PIN19, and cooperation is connected to six pins 42 of this transmission ends group 421 PIN2 of this impact damper 71, PIN4, PIN6, PIN8, PIN9, the pin position of PIN13, then with its corresponding in regular turn PIN18, PIN16, PIN14, PIN12, PIN11, PIN7 connects the TRST of this jtag interface 52 respectively, TDI, TMS, TCK, TDO, the instruction control interface of RESET, this transmission circuit 70 can be transmission jtag test signal usefulness when this impact damper 71 was driven.

Therefore when this coupling arrangement 2 is storage device linkage function in general user, when also soon this slot 40 will be inserted with the SD card, the PIN10 of this switch terminal group 422 then exports the current potential signal of low level, make this logical circuit 60 logic output terminal group 64 output high levle signals and can't this impact damper 71 of activation, so this transmission ends group 421 is for directly operating mutually to transmit data signals with this SD interface 51; When the Circuits System of computer installation need be keeped in repair or during testing engineering, when also soon this slot 40 will be inserted with the jtag test module, PIN10 then is activated and exports the current potential signal of high levle, and the conducting of PIN12 current potential is to the low level of ground connection, make the logic output terminal group 64 of this logical circuit 60 export the low level signals and this impact damper 71 of activation, so this transmission ends group 421 is for directly operating mutually with transmission jtag test signal with this jtag interface 52, so make computer installation only need these coupling arrangement 2 replacements are inserted with this test module, and on circuit board, retrieve the test access interface as the known technology for another example, just can finish the jtag test engineering easily, the Circuits System of computer installation is made effective test monitoring.

The above only is a preferable possible embodiments of the present utility model, changes so use the equivalent structure that the utility model instructions and claim do such as, ought to be included in the claim of the present utility model.

Claims

1, a kind of tool border scans the perimeter component coupling arrangement of test function, it is characterized in that, have a peripheral signal end group to be electrically connected to the perimeter component interface of microcomputer apparatus, and the border that a test signal end group is electrically connected to this microcomputer apparatus scans test interface, and includes:

2, scan the perimeter component coupling arrangement of test function according to the described tool of claim 1 border, it is characterized in that, should periphery signal end group be the SD interface that is electrically connected to microcomputer apparatus wherein, this test signal end group be the jtag test interface that is electrically connected to microcomputer apparatus.

3, scan the perimeter component coupling arrangement of test function according to the described tool of claim 2 border, it is characterized in that, wherein the input end group of this slot is a plurality of metal connecting terminal, those metal connecting terminal are respectively to there being a signal pin, the transmission ends group of this slot is this pin of six wherein, and two in all the other those pins is the switch terminal group of this slot.

4, scan the perimeter component coupling arrangement of test function according to the described tool of claim 3 border, it is characterized in that, wherein this logical circuit has one and electrically connects a pin of this switch terminal group with door.

5, scan the perimeter component coupling arrangement of test function according to the described tool of claim 4 border, it is characterized in that, wherein this logical circuit also have two not gates electrically connect should and door, wherein this not gate electrically connects this transmission circuit.

6, scan the perimeter component coupling arrangement of test function according to the described tool of claim 1 border, it is characterized in that, wherein this transmission circuit has by the made impact damper of CMOS logical circuit technology, and this impact damper has two signal pins and is electrically short circuit mutually.