CN220526325U - Interface detection circuit and terminal equipment - Google Patents
Interface detection circuit and terminal equipment Download PDFInfo
- Publication number
- CN220526325U CN220526325U CN202322224678.5U CN202322224678U CN220526325U CN 220526325 U CN220526325 U CN 220526325U CN 202322224678 U CN202322224678 U CN 202322224678U CN 220526325 U CN220526325 U CN 220526325U
- Authority
- CN
- China
- Prior art keywords
- switch
- interface
- pin
- terminal
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 19
- 230000005540 biological transmission Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 8
- 238000004891 communication Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Landscapes
- Information Transfer Systems (AREA)
Abstract
The utility model provides an interface detection circuit and a terminal device, wherein the circuit comprises: the control chip, the first switch, the second switch, the first interface and the second interface; the control chip comprises a first pin, a second pin, a first control module and a second control module; when the second interface is not inserted into the device, the second end of the second switch is conducted with the fourth end of the second switch by controlling the second pin; when the second interface is inserted into the device, the second control module detects a signal from the second interface, and the second end of the first switch is conducted with the third end of the first switch by controlling the first pin; and the third end of the second switch is conducted with the fourth end of the second switch by controlling the second pin. Therefore, the interface detection circuit can automatically switch acquired signals in two interfaces.
Description
Technical Field
The present utility model relates to the field of electronic circuits, and in particular, to an interface detection circuit and a terminal device.
Background
In the existing circuit design, some terminals or mobile devices have two universal serial bus (Universal Serial Bus, USB) interfaces, one universal charging interface Type-C, and one universal serial bus Type ase:Sub>A interface USB-ase:Sub>A, i.e. ase:Sub>A dual USB interface, but only one signal can be supported, and usually the signals of Type-C interface are supported by default. For example, ase:Sub>A terminal with two interfaces, type-C and USB-ase:Sub>A, where Type-C is usually used to charge the terminal, and USB-ase:Sub>A is usually used for datase:Sub>A transmission, when USB-ase:Sub>A is plugged into the device, the user desires to use the USB-ase:Sub>A interface to perform datase:Sub>A transmission, however, the terminal obtains the signal of Type-C by default, the user needs to manually switch through ase:Sub>A menu to switch the obtained signal from Type-C to USB-ase:Sub>A, and then uses the USB-ase:Sub>A interface to perform datase:Sub>A transmission, so that the user experiences poor.
Disclosure of Invention
The utility model provides an interface detection circuit and terminal equipment, which are used for automatically switching acquired signals in two interfaces without manually switching by a user, so that the use experience of the user is improved.
The application provides an interface detection circuit, the circuit includes: the control chip, the first switch, the second switch, the first interface and the second interface;
the control chip comprises a first pin, a second pin, a first control module and a second control module;
the first end of the first switch is connected with the first pin, the second end of the first switch is connected with the first control module, and the fourth end of the first switch is connected with the first interface;
the first end of the second switch is connected with the second pin, the second end of the second switch is connected with the second control module, the third end of the second switch is connected with the third end of the first switch, and the fourth end of the second switch is connected with the second interface;
when the second interface is not inserted into the device, the second end of the second switch is conducted with the fourth end of the second switch by controlling the second pin;
when the second interface is inserted into the device, the second control module detects a signal from the second interface, and the second end of the first switch is conducted with the third end of the first switch by controlling the first pin; and by controlling the second pin, the third end of the second switch is conducted with the fourth end of the second switch;
the first interface is used for supplying power to the equipment, and the second interface is used for data transmission.
Compared with the prior art, the signal acquired by the user needs to be manually switched, due to the design, when the second interface is not inserted into the device, the second end of the second switch is kept to be conducted with the fourth end of the second switch, so that when the second interface is inserted into the device, the second control module can detect the signal from the second interface, the second end of the first switch is conducted with the third end of the first switch, the third end of the second switch is conducted with the fourth end of the second switch, and further, the third end of the first switch is connected with the third end of the second switch, so that the control chip can conduct data transmission with the device inserted into the second interface. Therefore, by adopting the design, the second interface inserting device can be automatically detected, the switching of signals is completed, and the use experience of a user is improved.
In one possible design, the second control module may cause the second terminal of the first switch to be in communication with the fourth terminal of the first switch by controlling the first pin when the second interface is not plugged into a device.
In one possible design, the first pin outputs a first level and the second pin outputs a second level when the second interface is not plugged into a device;
when the second interface is plugged into the device, the first pin outputs a third level, and the second pin outputs a fourth level;
wherein the third level is higher than the first level and the fourth level is higher than the second level.
In one possible design, the second control module causes the second terminal of the first switch to be in conduction with the fourth terminal of the first switch by controlling the first pin when the device into which the second interface is plugged is unplugged; and controlling the second pin to enable the second end of the second switch to be conducted with the fourth end of the second switch.
In one possible design, the first pin outputs the first level and the second pin outputs the second level when the device into which the second interface is plugged is unplugged.
In one possible design, the first interface is a universal charging interface of a universal serial bus and the second interface is a type a interface of the universal serial bus.
In one possible design, a terminal device includes any of the interface detection circuits described above.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the drawings that are required to be used in the description of the embodiments will be briefly described below.
FIG. 1 is a circuit diagram of an interface circuit according to the prior art;
fig. 2 is a circuit schematic diagram of an interface detection circuit according to an embodiment of the present utility model;
fig. 3 is a schematic structural diagram of a first switch involved in an interface detection circuit according to an embodiment of the present utility model;
fig. 4 is a schematic structural diagram of a second switch related to an interface detection circuit according to an embodiment of the present utility model;
fig. 5 is a circuit schematic diagram of a second interface detection circuit according to an embodiment of the present utility model.
Detailed Description
In order to make the objects, technical solutions and advantages of the present utility model more apparent, the present utility model will be described in further detail below with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
The application scenario described in the embodiment of the present utility model is for more clearly describing the technical solution of the embodiment of the present utility model, and does not constitute a limitation on the technical solution provided by the embodiment of the present utility model, and as a person of ordinary skill in the art can know that the technical solution provided by the embodiment of the present utility model is applicable to similar technical problems as the new application scenario appears. In the description of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more.
Fig. 1 is a circuit schematic diagram of a conventional interface circuit.
The circuit shown in fig. 1 includes: the control chip 100 comprises a pin 101 and a control module 102, wherein a first end 201 of the switch 200 is connected with the pin 101, a second end 202 of the switch 200 is connected with the control module 102, a third end 203 of the switch 200 is connected with the second interface 400, and a fourth end 204 of the switch 200 is connected with the first interface 300.
Illustratively, when the control chip 100 outputs a low level through the pin 101, the second terminal 202 of the switch 200 is made conductive to the fourth terminal 204 of the switch 200, and the fourth terminal 204 of the switch 200 is connected to the first interface 300, so that a signal of the first interface 300 can be transmitted to the control module 102 through the fourth terminal 204 of the switch 200. Since the second terminal 202 of the switch 200 can only be conducted with one of the third terminal 203 of the switch 200 and the fourth terminal 204 of the switch 200, when the second terminal 202 of the switch 200 is conducted with the fourth terminal 204 of the switch 200, the second terminal 202 of the switch 200 and the third terminal 203 of the switch 200 are in a non-conducting state, and at this time, even if the second interface 400 is inserted into a device, a signal of the second interface 400 device cannot be transmitted to the control chip 100 through the third terminal 203 of the switch 200.
Therefore, if the device inserted into the second interface is desired to communicate, the user needs to manually switch the acquired signal from the first interface to the second interface through the menu, which results in poor user experience.
The embodiment of the utility model provides an interface detection circuit which is used for automatically switching acquired signals in two interfaces without manually switching by a user, so that the use experience of the user is improved.
Based on this, fig. 2 is a schematic circuit diagram of an interface detection circuit according to the present utility model.
The circuit shown in fig. 2 includes: the control chip 100, the first switch 200, the second switch 300, the first interface 400 and the second interface 500 comprises a first pin 101, a second pin 102, a first control module 103 and a second control module 104; a first end 201 of the first switch 200 is connected to the first pin 101, a second end 202 of the first switch 200 is connected to the first control module 103, and a fourth end 204 of the first switch 200 is connected to the first interface 400; the first end 301 of the second switch 300 is connected to the second pin 102, the second end 302 of the second switch 300 is connected to the second control module 104, the third end 303 of the second switch 300 is connected to the third end 203 of the first switch 200, and the fourth end 304 of the second switch 300 is connected to the second interface 500.
Illustratively, the first pin 101 may be named as General-purpose input/output (GPIO) EN1, the signal transmitted from the first pin 101 to the first terminal 201 of the first switch 200 may be named as EN0, the second pin 102 may be named as GPIO EN2, the signal transmitted from the second pin 102 to the first terminal 301 of the second switch 300 may be named as EN1, the first control module 103 may be named as USB 2.0 or as USB 3.0, the second control module 104 may be named as GPIO interrupt, and the naming of the signals, the naming of the pins, and the naming of the control modules are not limited.
Illustratively, as shown in fig. 3, the first terminal 201 of the first switch 200 is the port 10 in fig. 3, the second terminal 202 of the first switch 200 includes the Positive (DP) DP0 and the negative (DM) DM0 of fig. 3, the third terminal 203 of the first switch 200 includes the DP2 and DM2 of fig. 3, and the fourth terminal 204 of the first switch 200 includes the DP1 and DM1 of fig. 3.
Illustratively, the schematic structure of the second switch 300 is shown in fig. 4, the first terminal 301 of the second switch 300 is the port 10 in fig. 4, the second terminal 302 of the second switch 300 includes DP3 and DM3 in fig. 4, the third terminal 303 of the second switch 300 includes DP2 and DM2 in fig. 4, and the fourth terminal 304 of the second switch 300 includes DP4 and DM4 in fig. 4.
Illustratively, based on the schematic structure of the first switch 200 shown in fig. 3 and the schematic structure of the second switch 300 shown in fig. 4, the signal transmitted between the first control module 103 and the second terminal 202 of the first switch 200 may be named as DP0 DM0, the signal transmitted between the third terminal 203 of the first switch 200 and the third terminal 303 of the second switch 300 may be named as DP2 DM2, the signal transmitted between the fourth terminal 204 of the first switch 200 and the first interface 400 may be named as DP1 DM1, the signal transmitted between the second control module 104 and the second terminal 302 of the second switch 300 may be named as DP3 DM3, and the signal transmitted between the fourth terminal 304 of the second switch 300 and the second interface 500 may be named as DP4 DM4, as shown in the second schematic circuit diagram of the interface detection circuit of fig. 5.
The first interface 400 and the second interface 500 are both one interface Type of universal serial bus, the first interface 400 is commonly used to power devices, for example, the Type of the first interface 400 is Type-C; the second interface 500 is typically used for datase:Sub>A transfer, for example, the type of the second interface is ase:Sub>A USB-A type. As technology in the electronic circuit field advances, the second interface 500 may also be a USB-B type or other USB interface type, which is not limited in this application.
When the second interface 500 is not inserted into the device, the second control module 104 controls the first pin 101 to enable the second end 202 of the first switch 200 to be conducted with the fourth end 204 of the first switch 200; and by controlling the second pin 102 such that the second terminal 302 of the second switch 300 is in conduction with the fourth terminal 304 of the second switch 300.
Illustratively, when the second interface 500 is not plugged into a device, the first pin 101 outputs a first level and the second pin 102 outputs a second level.
Illustratively, the first interface 400 may have a device plug-in or no device plug-in. The first level and the second level are on average low. The second control module 104 controls the first pin 101 to output a low level, so that the second end 202 of the first switch 200 and the fourth end 204 of the first switch 200 are conducted, and since the second end 202 of the first switch 200 can only be conducted with one of the third end 203 of the first switch 200 and the fourth end 204 of the first switch 200, the second end 202 of the first switch 200 and the third end 203 of the first switch 200 are in a non-conducting state after the second end 202 of the first switch 200 and the fourth end 204 of the first switch 200 are conducted; and controlling the second pin 102 to output a low level, so that the second end 302 of the second switch 300 and the fourth end 304 of the second switch 300 are conducted, and since the fourth end 304 of the second switch 300 is controlled to be conducted only with one of the second end 302 of the second switch 300 and the third end 303 of the second switch 300, the fourth end 304 of the second switch 300 and the third end 303 of the second switch 300 are in a non-conducting state after the second end 302 of the second switch 300 and the fourth end 304 of the second switch 300 are conducted.
For example, as shown in fig. 5, assuming that the first interface 400 has a device inserted, the signal DP1 DM1 output by the first interface 400 may be transmitted to the second end 202 of the first switch 200 through the fourth end 204 of the first switch 200, the signal output by the second end 202 of the first switch 200 is DP0 DM0, and the first control module 103 in the control chip 100 may obtain the signal DP0 DM0 output by the second end 202 of the first switch 200, that is, the control chip 100 may perform signal transmission with the device inserted by the first interface 400, so as to complete communication.
Thus, the control chip 100 may acquire a signal from the first interface when the second interface 500 is not inserted into the device.
When the second interface 500 is plugged into the device, the second control module 104 detects a signal from the second interface 500, and controls the first pin 101 to enable the second end 202 of the first switch 200 to be conducted with the third end 203 of the first switch 200; and by controlling the second pin 102 such that the third terminal 303 of the second switch 300 is in conduction with the fourth terminal 304 of the second switch 300.
Illustratively, when the second interface 500 is plugged into a device, the first pin 101 outputs a third level and the second pin 102 outputs a fourth level.
Illustratively, the third level is higher than the first level and the fourth level is higher than the second level.
Illustratively, the first interface 400 may have or may not have a device inserted, and the third and fourth levels are on average high. Since the second pin outputs a low level such that the second terminal 302 of the second switch 300 is turned on with the fourth terminal 304 of the second switch 300 when the second interface 500 is not inserted into the device, the second control module 104 detects a signal from the second interface 500 when the second interface 500 is inserted into the device.
The second control module 104 controls the first pin 101 to output a high level, so that the second end 202 of the first switch 200 is conducted with the third end 203 of the first switch 200, and since the second end 202 of the first switch 200 can only be conducted with one of the third end 203 of the first switch 200 and the fourth end 204 of the first switch 200, the second end 202 of the first switch 200 and the fourth end 204 of the first switch 200 are in a non-conductive state after the second end 202 of the first switch 200 is conducted with the third end 203 of the first switch 200; and by controlling the second pin 102 to output a high level, the third terminal 303 of the second switch 300 is conducted with the fourth terminal 304 of the second switch 300, and since the fourth terminal 304 of the second switch 300 can only be conducted with one of the second terminal 302 of the second switch 300 and the third terminal 303 of the second switch 300, after the third terminal 303 of the second switch 300 is conducted with the fourth terminal 304 of the second switch 300, the second terminal 302 of the second switch 300 and the fourth terminal 304 of the second switch 300 are in a non-conducting state, and thus a signal of a device inserted by the second interface 500 can be transmitted to the control chip 100 through the fourth terminal 304 of the second switch 300 via the third terminal 203 of the first switch 200 and the second terminal 202 of the first switch 200.
For example, as shown in fig. 5, assuming that the signal of the second interface 500 inserted into the device is DP4 DM4, it is transmitted to the third terminal 303 of the second switch 300 through the fourth terminal 304 of the second switch 300, the signal output by the third terminal 303 of the second switch 300 is DP2 DM2, the signal output by the DP2 DM2 is transmitted to the second terminal 202 of the first switch 200 through the third terminal 203 of the first switch 200, the signal output by the second terminal 202 of the first switch 200 is DP0 DM0, the signal DP0 DM0 output by the second terminal 202 of the first switch 200 can be obtained by the first control module 103 of the control chip 100, that is, the control chip 100 can perform signal transmission with the device inserted into the second interface 500, so as to complete communication.
Thus, when the second interface 500 is plugged into a device, the control chip 100 may detect a signal from the second interface and automatically switch to communicate with the device plugged into the second interface.
When the device in which the second interface 500 is inserted is pulled out, the second control module 104 controls the first pin 101 to make the second end 202 of the first switch 200 conductive to the fourth end 204 of the first switch 200; and by controlling the second pin 102 such that the second terminal 302 of the second switch 300 is in conduction with the fourth terminal 304 of the second switch 300; when the device in which the second interface 500 is inserted is pulled out, the first pin 101 outputs a first level, and the second pin 102 outputs a second level.
Illustratively, the first interface 400 may have a device inserted or no device inserted, and the first and second levels are on average low. When the device plugged in by the second interface 500 is pulled out, the first control module 102 cannot detect the signal from the second interface 500, and the second control module 104 controls the first pin 101 to output a low level, so that the second end 202 of the first switch 200 and the fourth end 204 of the first switch 200 are conducted, and since the second end 202 of the first switch 200 can only be conducted with one of the third end 203 of the first switch 200 and the fourth end 204 of the first switch 200, after the second end 202 of the first switch 200 is conducted with the fourth end 204 of the first switch 200, the second end 202 of the first switch 200 and the third end 203 of the first switch 200 are in a non-conducting state; and controlling the second pin 102 to output a low level, so that the second end 302 of the second switch 300 is conducted with the fourth end 304 of the second switch 300, and since the fourth end 304 of the second switch 300 can only be conducted with one of the second end 302 of the second switch 300 and the third end 303 of the second switch 300, the third end 303 of the second switch 300 and the fourth end 304 of the second switch 300 are in a non-conductive state after the second end 302 of the second switch 300 is conducted with the fourth end 304 of the second switch 300.
Therefore, when the device plugged in the second interface 500 is pulled out, the control chip 100 can automatically switch to communicate with the device plugged in the first interface without detecting the signal of the second interface.
With the interface detection circuit of the present application, when the second interface 500 is inserted into the device, the first pin 101 outputs a high level by controlling the first pin 101 and the second pin 102, so that the second end 202 of the first switch 200 and the third end 203 of the first switch 200 are turned on, and the second pin 102 outputs a high level so that the third end 303 of the second switch 300 and the fourth end 304 of the third switch 300 are turned on, so that signal transmission is performed between the control chip 100 and the second interface 500 through the second end 202 of the first switch 200, the third end 203 of the first switch 200, the third end 303 of the second switch 300 and the fourth end 304 of the third switch 300. Therefore, by adopting the design, the problem that after the terminal with two USB interfaces and only supporting one signal is inserted into the USB-A equipment, ase:Sub>A user is required to manually switch the signal can be solved, the automatic detection of the insertion of the USB-A equipment can be realized, the signal switching can be carried out, and the user experience is improved.
The foregoing is merely illustrative embodiments of the present utility model, but the scope of the present utility model is not limited thereto, and any person skilled in the art can easily think about variations or substitutions within the technical scope of the present utility model, and the utility model should be covered. Therefore, the protection scope of the utility model is subject to the protection scope of the claims.
Claims (7)
1. An interface detection circuit, the circuit comprising: the control chip, the first switch, the second switch, the first interface and the second interface;
the control chip comprises a first pin, a second pin, a first control module and a second control module;
the first end of the first switch is connected with the first pin, the second end of the first switch is connected with the first control module, and the fourth end of the first switch is connected with the first interface;
the first end of the second switch is connected with the second pin, the second end of the second switch is connected with the second control module, the third end of the second switch is connected with the third end of the first switch, and the fourth end of the second switch is connected with the second interface;
when the second interface is not inserted into the device, the second end of the second switch is conducted with the fourth end of the second switch by controlling the second pin;
when the second interface is inserted into the device, the second control module detects a signal from the second interface, and the second end of the first switch is conducted with the third end of the first switch by controlling the first pin; and by controlling the second pin, the third end of the second switch is conducted with the fourth end of the second switch;
the first interface is used for supplying power to the equipment, and the second interface is used for data transmission.
2. The circuit of claim 1, wherein the second control module turns on the second terminal of the first switch with the fourth terminal of the first switch by controlling the first pin when the second interface is not plugged into a device.
3. The circuit of claim 2, wherein the first pin outputs a first level and the second pin outputs a second level when the second interface is not plugged into a device;
when the second interface is plugged into the device, the first pin outputs a third level, and the second pin outputs a fourth level;
wherein the third level is higher than the first level and the fourth level is higher than the second level.
4. The circuit of claim 3, wherein the second control module causes the second terminal of the first switch to conduct with the fourth terminal of the first switch by controlling the first pin when the device into which the second interface is plugged is unplugged; and controlling the second pin to enable the second end of the second switch to be conducted with the fourth end of the second switch.
5. The circuit of claim 4, wherein the first pin outputs the first level and the second pin outputs the second level when the device into which the second interface is plugged is unplugged.
6. The circuit of any of claims 1-5, wherein the first interface is a universal charging interface of a universal serial bus and the second interface is a type a interface of the universal serial bus.
7. A terminal device, characterized in that the terminal device comprises an interface detection circuit according to any of claims 1-6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322224678.5U CN220526325U (en) | 2023-08-17 | 2023-08-17 | Interface detection circuit and terminal equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322224678.5U CN220526325U (en) | 2023-08-17 | 2023-08-17 | Interface detection circuit and terminal equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220526325U true CN220526325U (en) | 2024-02-23 |
Family
ID=89927208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322224678.5U Active CN220526325U (en) | 2023-08-17 | 2023-08-17 | Interface detection circuit and terminal equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220526325U (en) |
-
2023
- 2023-08-17 CN CN202322224678.5U patent/CN220526325U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101102119B (en) | A charging detection circuit of appliance device and charging detection method | |
| US9312576B2 (en) | Portable electronic devices capable of obtaining charging current value of charger and charging method thereof | |
| US11611221B2 (en) | Electronic device and accessory with quick charging and audio transmission functions | |
| US20060045112A1 (en) | Device operable as a host | |
| CN201075704Y (en) | Detection circuit of electrical equipment and mobile phone having the circuit | |
| CN207652075U (en) | A kind of OTG power supply and wireless charging compatible circuit and terminal device | |
| CN113535622A (en) | Power supply switching system, USB socket and electronic equipment | |
| CN220526325U (en) | Interface detection circuit and terminal equipment | |
| CN109560581A (en) | Charging method, charging process circuit, electronic equipment and storage medium | |
| CN211017659U (en) | USB connects converting circuit and connects converter | |
| CN111615029A (en) | Wireless earphone reset circuit, wireless earphone and reset method | |
| CN109218880A (en) | Earphone charging two-in-one circuit and control method, terminal | |
| CN107706977B (en) | Charging current detection method and charging device | |
| CN216929611U (en) | Charging circuit, wearable equipment and charging system | |
| CN216561773U (en) | Automatic wire jumper device and communication equipment | |
| CN212013016U (en) | Wireless earphone reset circuit and wireless earphone | |
| CN112825401B (en) | Charging line, charger, charging control method and charging device | |
| CN109117192B (en) | Switching device capable of waking up standby machine and waking device | |
| CN111949594A (en) | Mobile terminal with multiple USB interfaces and implementation method | |
| CN217689360U (en) | Fill detection circuitry and device soon | |
| CN213693208U (en) | Charging system and distribution terminal | |
| CN212624036U (en) | TYPE-C interface circuit | |
| CN219304500U (en) | Mobile phone charging circuit and mobile phone equipment | |
| CN215647302U (en) | Audio processing device and audio system | |
| CN214280968U (en) | Power supply control device and audio system with power supply |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |