CN218734460U

CN218734460U - Matrix splicing processor

Info

Publication number: CN218734460U
Application number: CN202223030876.XU
Authority: CN
Inventors: 万健
Original assignee: Beijing Hengtu Jiashi Technology Development Co ltd
Current assignee: Beijing Hengtu Jiashi Technology Development Co ltd
Priority date: 2022-11-15
Filing date: 2022-11-15
Publication date: 2023-03-24
Anticipated expiration: 2032-11-15

Abstract

The utility model provides a matrix concatenation treater, including the signal input module that is used for video or audio signal input, a cross treatment module for carrying out cross switch with the signal and pass through TMDS signal connection with input module, cross treatment module passes through TMDS signal and video processing chip one, video processing chip two is connected, video processing chip one and video processing chip two all are used for the concatenation of video and image, and be connected with CPU through the TMDS signal respectively, video processing chip one is connected with signal output module one through the TMDS signal, video processing chip two is connected with signal output module two through the TMDS signal. The utility model provides a matrix concatenation treater need not to lay wire respectively to the signal of difference, greatly reduced user's use complexity, also greatly reduced the cost of a lot of video processing's engineering.

Description

Matrix splicing processor

Technical Field

The utility model belongs to multimedia signal control field, concretely relates to matrix concatenation treater.

Background

The traditional video signal switching, distributing, splicing and image processing system adopts independent processing equipment, then each equipment is connected through a high-definition cable to form a switching and splicing processing system, and in the transmission process, in order to ensure the compatibility of signals and the performance of the signals, a signal format converter and a signal extender are often required to be added.

Owing to adopt multiple independent processing apparatus or unit system, through various signal format conversion equipment, high definition cable etc. carry out integrated connection again, it is complicated to cause the system to assemble, and to the user, the operation of carrying out a signal needs a plurality of equipment of continuous control, complex operation, all very difficulty to user after sales training and debugging management, and in general installation and construction process, to every kind of signal, the connection of every way signal, the wiring, the debugging all is a huge engineering, need consume a large amount of manpower and material resources, also very complicated in daily debugging and maintenance, the utility model discloses solve to this technical problem.

SUMMERY OF THE UTILITY MODEL

The utility model provides a matrix concatenation treater need not to lay wire respectively to the signal of difference, greatly reduced user's use complexity, also greatly reduced the cost of a lot of video processing's engineering.

A matrix splicing processor comprises a signal input module for inputting video or audio signals, and a cross processing module which is used for cross switching of the signals and is connected with the input module through a TMDS signal, wherein the cross processing module is connected with a first video processing chip and a second video processing chip through the TMDS signal;

the first video processing chip and the second video processing chip are used for splicing videos and images and are respectively connected with the CPU through TMDS signals, the first video processing chip is connected with the first signal output module through the TMDS signals, and the second video processing chip is connected with the second signal output module through the TMDS signals.

Furthermore, the input module is further connected with an ARM processor and an audio logic switching chip, and the ARM processor and the audio logic switching chip are respectively connected with the first signal output module and the second signal output module.

Furthermore, the signal input module comprises eight HDM I input interfaces, and each interface can be connected to a 4K60 or HDCP signal.

Further, the cross processing module includes a matrix cross switching chip, and can cross-switch the signal and transmit the signal to the first video processing chip and the second video processing chip.

Furthermore, the first signal output module and the second signal output module respectively comprise four HDM I output interfaces.

The technical effects of the utility model are as follows:

(1) The cross processing module in the scheme can perform cross switching processing on the video signals, and transmit the signals to the video processing chip I and the video processing chip II for processing, the video processing chip I and the video processing chip II can perform operations such as splicing, color conversion, image amplification and reduction, rotation, key information extraction and the like on the video according to internal algorithms of the video processing chip I and the video processing chip II, and then transmit the signals to the output module I and the output module II, so that the use complexity of a user is reduced, and the cost of a lot of video processing projects is also reduced;

(2) In the scheme, the TMDS signals are adopted for differential transmission among the modules, so that good signal integrity can be maintained, the signal capability of the 4K60 18G bandwidth is realized, the impedance control and the wiring control are performed only by the wiring of a PCB (printed Circuit Board), and an additional chip is not required for conversion processing, so that the product cost is reduced, the difficulty of a generation process is reduced, and the reliability of signals is improved;

(3) All parts adopt a pure hardware architecture, so that the high-efficiency, high-speed, safe and stable operation of the equipment is ensured.

Drawings

Fig. 1 is a schematic connection diagram of the present invention.

Fig. 2 is a connection diagram of the ARM processor and the audio logic switching chip of the present invention.

Wherein the drawings are described as follows: 1. a signal input module; 2. an HDM I input interface; 3. a matrix cross switching chip; 4. a video processing chip I; 5. an HDM I output interface; 6. a first signal output module; 7. a second signal output module; 8. a video processing chip II; 9. an ARM processor; 10. and the audio logic switches the chip.

Detailed Description

The technical solution of the present invention will be described clearly and completely with reference to the following specific embodiments and accompanying drawings.

Referring to fig. 1, a matrix splicing processor includes a signal input module 1 for inputting video or audio signals, and a cross processing module for cross-switching signals and connected to the input module through TMDS signals, the cross processing module being connected to a video processing chip one 4 and a video processing chip two 8 through TMDS signals;

the video processing chip I4 and the video processing chip II 8 are used for splicing videos and images, seamless switching of signals and splicing functions are achieved, the video processing chip I4 is connected with the signal output module I6 through a TMDS signal, the video processing chip II 8 is connected with the signal output module II 7 through a TMDS signal, control between each module or each chip is achieved through unified connection and unified control through an I2C bus, real-time performance and reliability of a control process are guaranteed, and algorithms of video splicing and a video processor can be achieved through the CPU.

In the scheme, each part is arranged on one circuit board, and the circuit boards are placed in a single metal case, so that the electromagnetic compatibility and the stability of equipment operation can be ensured.

Referring to fig. 2, further, the input module is further connected to an ARM processor 9 and an audio logic switching chip 10, the ARM processor 9 and the audio logic switching chip 10 are respectively connected to the first signal output module 6 and the second signal output module 7, and each component having a connection relationship in the scheme can perform differential transmission by using a TMDS signal.

Further, the signal input module 1 includes eight HDMI input interfaces 2, and each interface can be connected to a signal of 4K60 and HDCP.

Further, the cross processing module comprises a matrix cross switching chip 3, which can cross-switch the signals and transmit the signals to the first video processing chip 4 and the second video processing chip 8.

Further, the first signal output module 6 and the second signal output module 7 respectively include four HDMI output interfaces 5.

The working process of the utility model is as follows:

each HDMI input interface 2 is respectively connected with a path of 4K60 and HDCP signals, the input signals are respectively converted into TMDS video signals, control signals and audio signals through the conversion and decoding of the input interface 2, then the TMDS video signals are transmitted to the matrix cross switching chip 3, the control signals are transmitted to the ARM processor 9, and the audio signals are transmitted to the audio logic switching chip 10;

after the video signals are selected by the cross matrix switching, the matrix cross switching chip 3 can output TMDS differential signals to the video processing chip I4 and the video processing chip II 8, the video can be spliced, color converted, amplified and reduced, rotated, key information extracted and the like through internal algorithms of the video processing chip I4 and the video processing chip II 8, then the processed video signals, control signals and audio signals are output to the HDMI output interfaces 5 respectively, and the HDMI output interfaces 5 can encode and pack the TMDS video signals, the control signals and the audio signals again to generate HDMI signals for output.

The above embodiments are only preferred embodiments of the present invention, and those skilled in the art can derive other embodiments from the above embodiments without creative efforts, so the protection scope of the present application is not only the above embodiments, but also the scope consistent with the technology and principle of the present application.

Claims

1. A matrix splicing processor is characterized by comprising a signal input module (1) for inputting video or audio signals, and a cross processing module which is used for cross switching signals and is connected with the input module (1) through TMDS signals, wherein the cross processing module is connected with a first video processing chip (4) and a second video processing chip (8) through the TMDS signals;

the video processing chip I (4) and the video processing chip II (8) are used for splicing videos and images and are respectively connected with the CPU through TMDS signals, the video processing chip I (4) is connected with the signal output module I (6) through the TMDS signals, and the video processing chip II (8) is connected with the signal output module II (7) through the TMDS signals.

2. The matrix splicing processor according to claim 1, wherein the input module (1) is further connected with an ARM processor (9) and an audio logic switching chip (10), and the ARM processor (9) and the audio logic switching chip (10) are respectively connected with a first signal output module (6) and are further respectively connected with a second signal output module (7).

3. The matrix splicing processor according to claim 2, wherein the signal input module (1) comprises eight HDMI input interfaces (2).

4. The matrix splicing processor according to claim 3, wherein the cross processing module comprises a matrix cross switching chip (3).

5. The matrix splicing processor according to claim 4, wherein the signal output module one (6) and the signal output module two (7) each comprise four HDMI output interfaces (5).