CN218648814U - Dual-frenquency 5G radio frequency front end module - Google Patents
Dual-frenquency 5G radio frequency front end module Download PDFInfo
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- CN218648814U CN218648814U CN202223045334.XU CN202223045334U CN218648814U CN 218648814 U CN218648814 U CN 218648814U CN 202223045334 U CN202223045334 U CN 202223045334U CN 218648814 U CN218648814 U CN 218648814U
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Abstract
The utility model discloses a dual-frenquency 5G radio frequency front end module, including transmission channel and receiving channel, transmission channel has two at least inputs, first change over switch and transmission link, receiving channel has two at least receiving terminals, second change over switch and two at least way receiving links, the transmission signal is through any input, through first change over switch, reach antenna switch behind the transmission link, and launch by the antenna that is connected with antenna switch, received signal is received by the antenna, through antenna switch, behind at least one receiving link and the second change over switch, reach at least one receiving terminal. The utility model discloses the problem that traditional n77/n79 dual-frenquency power amplifier chip brought has been improved.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to radio frequency amplification module chip.
Background
In the field of communications technology, the n77 frequency of 5G NR is 3300 to 4200MHz, and the n79 frequency is 4400MHz to 5000MHz. Because the frequencies of n77 and n79 are much higher than the frequency bands of 4G LTE, and the maximum transmission power of 26dBm of the antenna port of PC2 needs to be supported, the radio frequency power amplifier generally adopts a working voltage of 5V, and the development difficulty is reduced by respectively designing n77/n 79. At present, the sub6G n77/n79 5G NR rf front end amplifying and receiving module generally includes an independent n77 transmitting path, an independent n79 transmitting path, an independent n77 receiving path and an independent n79 receiving path, and performs path selection in cooperation with an antenna switch. Wherein the n77 transmitting path consists of an n77 power amplifier chip and an n77 transmitting filter and is connected with the antenna switch; the n79 transmitting path consists of an n79 power amplifier chip and an n79 transmitting filter and is connected with the antenna switch; the n77 receiving path consists of an n77 low noise amplifier and an n77 receiving filter and is connected with the antenna switch; the n79 receiving path consists of an n79 low noise amplifier and an n79 receiving filter and is connected with the antenna switch.
The defects of the scheme are as follows: 1. when the radio frequency power amplifier works under the voltage of 5V, the reliability and the service life of the radio frequency power amplifier are reduced sharply, and the failure probability in terminal application is much higher than that under the voltage of 3.4V; 2. the terminal is powered by a lithium battery, the highest voltage of the battery is 4.2V, an additional boost chip is needed to realize the 5V power supply voltage, and the cost of the terminal is increased; 3. the n77/79 transmitting and receiving circuits are independently designed, so that the miniaturization of the chip size is limited; 4. the n77/n79 design is independent, resulting in high chip cost. The object of the present invention is to propose to solve all or part of the above drawbacks.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a problem that traditional n77 n79 dual-frenquency power amplifier chip brought has been improved to dual-frenquency 5G radio frequency front end module.
In order to solve the technical problem, the utility model provides a dual-frenquency 5G radio frequency front end module, including transmission channel and receiving channel, transmission channel has two at least inputs, first change over switch and transmission link, receiving channel has two at least receiving terminals, second change over switch and two at least ways receiving links, and the transmission signal is through any the input is passed through first change over switch reachs antenna switch behind the transmission link, and by with the antenna that antenna switch is connected launches, the received signal quilt the antenna is received, the warp antenna switch, at least one the receiving link with behind the second change over switch, reachs at least one the receiving terminal.
Further, the transmission chain comprises a power amplifier and a transmission filter; the power amplifier is connected with the transmitting filter.
Furthermore, the transmitting filter adopts an IPD design form and is integrated on the first silicon-based chip in a wiring matching manner with the first substrate.
Furthermore, the power amplifier adopts a differential amplification circuit and is arranged on the gallium arsenide chip.
Further, the receiving chain comprises at least two low noise amplifiers and at least two receiving filters; the at least two low noise amplifiers are respectively connected with the at least two receiving filters.
Further, at least two of the low noise amplifiers and the second switch are integrated on a first SOI chip.
Furthermore, at least two receiving filters adopt an IPD design form, and are integrated on a second silicon substrate chip in a manner of being matched with a second substrate wire.
Further, the first switch and the CMOS controller are integrated on a third silicon substrate chip.
Further, the first switch is an SPDT switch, the second switch is a DPDT switch, and the antenna switch is a 3P3T switch.
Further, the antenna switch further comprises a coupler, and the coupler and the antenna switch are integrated on a second SOI chip.
Through the technical scheme, the utility model discloses following beneficial effect has:
the utility model provides a transmission signal only needs to arrive antenna switch through any input, behind first change over switch, transmission link to by the antenna that is connected with antenna switch launch, received signal is received by the antenna, behind antenna switch, at least one receiving link and second change over switch, reachs at least one receiving terminal. The terminal does not need a boost chip, and the cost of the terminal is reduced.
In addition, the throw numbers of the first change-over switch, the second change-over switch and the antenna switch are reduced, and the insertion loss of the first change-over switch, the second change-over switch and the antenna switch is reduced, so that the efficiency of the power amplifier is improved.
Furthermore, the ultra-wideband design of the transmitting channel and the receiving channel and the support of the 3300-5000 MHz full frequency band can help to miniaturize the chip size and reduce the chip cost.
In addition, the power amplifier adopts a low-voltage scheme, and the power requirement is realized at the voltage of 3.4V, so that the reliability and the service life of the power amplifier are improved.
Drawings
Fig. 1 is a schematic diagram of an overall structure of a dual-band 5G rf front-end module according to the present invention;
fig. 2 is a schematic diagram of a dual-band 5G rf front-end module according to the present invention;
fig. 3 is a schematic structural diagram of a transmitting filter in an IPD design form of a dual-band 5G rf front-end module according to the present invention;
fig. 4 is a schematic perspective view of a transmitting filter in an IPD design form of a dual-band 5G rf front-end module according to the present invention;
fig. 5 is a schematic structural diagram of a receiving filter in an IPD design form of a dual-band 5G rf front-end module according to the present invention;
fig. 6 is a schematic perspective view of a receiving filter in an IPD design form of a dual-band 5G rf front-end module according to the present invention.
Detailed Description
A more detailed description of a dual-band 5G radio frequency front end module of the present invention will now be described in conjunction with the schematic drawings, wherein there is shown a preferred embodiment of the present invention, it being understood that those skilled in the art may modify the invention herein described while still achieving the advantageous effects of the present invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.
The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more fully apparent from the following description and appended claims. It should be noted that the drawings are in simplified form and are not to precise scale, and are provided for convenience and clarity in order to facilitate the description of the embodiments of the present invention.
As shown in fig. 1-2, an embodiment of the present invention provides a dual-band 5G rf front-end module, which includes a transmitting channel and a receiving channel. The transmitting channel is provided with at least two input ends, a first change-over switch and a transmitting link, the receiving channel is provided with at least two receiving ends, a second change-over switch and at least two receiving links, a transmitting signal is input through any one of the input ends, passes through the first change-over switch, reaches the antenna switch after the transmitting link, is transmitted by an antenna connected with the antenna switch, is received by the antenna, and reaches at least one of the receiving ends after the antenna switch, at least one of the receiving links and the second change-over switch.
Specifically, the transmission channel has at least two input ends, a first switch and a transmission link.
Wherein the transmit chain comprises a power amplifier and a transmit filter; the power amplifier is connected with the transmitting filter; the first changeover switch is an SPDT switch, and the power amplifier can be connected to a predetermined input terminal by changing the state of the first changeover switch.
In order to miniaturize the size of the chip, in this embodiment, the transmission filter adopts an IPD design form, and is integrated on the first silicon-based chip in cooperation with the first substrate trace. The IPD design is as shown in fig. 3-4, and the first substrate trace is provided with a plurality of first rf inductors 20. A first MIM capacitor 10 is arranged on the first substrate routing; the first substrate trace is connected to the first MIM capacitor 10 by a first circular copper pillar 30, so as to connect the first radio frequency inductor 20 to the first MIM capacitor 10, thereby obtaining a desired transmit filter network. The number of the first rf inductors 20 and the first MIM capacitors 10 can be adjusted by those skilled in the art according to the actual requirement.
In addition, the power amplifier adopts a differential amplification circuit and is arranged on a gallium arsenide chip; and the first switch and the CMOS controller are integrated on a third silicon substrate chip, so that the effects of high integration and low cost can be realized.
The CMOS controller integrates MIPI, namely a Processor Interface of the Mobile Industry communicates with the main chip, received digital signals are converted into control signals of the chip, power is supplied to the amplifying circuit, and the conducting state of the selector switch is controlled.
In this embodiment, the receiving channel has at least two receiving ends, a second switch, and at least two receiving links. Specifically, the receiving chain comprises at least two low noise amplifiers and at least two receiving filters; the at least two low noise amplifiers are respectively connected with the at least two receiving filters.
As a preferred embodiment, the second switch is a DPDT switch, and the second switch and the at least two low noise amplifiers are both turned on when receiving MIMO, which is multiple input multiple output.
In order to miniaturize the chip size, in this embodiment, at least two of the low noise amplifiers and the second switch are integrated on a first SOI chip, and at least two of the receiving filters are in an IPD design form and integrated on a second silicon substrate chip in cooperation with a second substrate trace, so that the cost can be reduced. The IPD design is as shown in fig. 5-6, a plurality of second rf inductors 50 are disposed on the second substrate trace, a second MIM capacitor (disposed in the central cubic frame of fig. 6) is disposed on the second substrate trace, a part of the second rf inductors 50 of the second substrate trace is connected to the patch inductor 40, and the second substrate trace and the second MIM capacitor are connected by a second circular copper pillar 60, so that the second rf inductors 50 are connected to the second MIM capacitor, and a desired receiving filter network is obtained. The number of the patch inductors 40 may be set to six, and the number of the second rf inductors 50 may be two, that is, eight inductors in total, so that the number of the second MIM capacitors is at least eight. The number of the patch inductors 40, the second rf inductors 50, and the second MIM capacitors can be adjusted by those skilled in the art according to actual requirements. In addition, a person skilled in the art can consider a symmetric design according to the radio frequency path index of the receiving filter network.
In addition, the dual-frequency 5G radio frequency front-end module further comprises a coupler, and the coupler and the antenna switch are integrated on a second SOI chip. Wherein the antenna switch is a 3P3T switch.
In order to meet the system requirements, the input ends are n77 radio frequency and n79 radio frequency, the transmitting channel and the receiving channel support 3300-5000 MHZ full frequency bands, in addition, the power amplifier adopts a low-voltage scheme, and the power requirement is realized under the voltage of 3.4V, so that the reliability and the service life of the power amplifier are improved. The power amplifier adopts a broadband design, and is beneficial to inhibiting harmonic waves of an input end. In addition, the low noise amplifier and the receiving filter also adopt ultra wide band design and support the full frequency band of 3300-5000 MHz. Thereby helping to miniaturize the chip size and reduce the chip cost.
In the embodiment, the transmission signal is input through any input end, reaches the antenna switch after passing through the first change-over switch and the transmission link, is transmitted by the antenna connected with the antenna switch, is received by the antenna, and reaches at least one receiving end after passing through the antenna switch, the at least one receiving link and the second change-over switch, so that a boost chip is not needed for the terminal, and the cost of the terminal is reduced.
To sum up, compared with the prior art, the utility model, have following advantage:
the utility model provides a transmission signal only needs to arrive antenna switch through any input, behind first change over switch, transmission link to by the antenna that is connected with antenna switch launch, received signal is received by the antenna, behind antenna switch, at least one receiving link and second change over switch, reachs at least one receiving terminal. The terminal does not need a boost chip, so that the cost of the terminal is reduced; in addition, the throw numbers of the first change-over switch, the second change-over switch and the antenna switch are reduced, and the insertion loss of the first change-over switch, the second change-over switch and the antenna switch is reduced, so that the efficiency of the power amplifier is improved.
Furthermore, the ultra-wideband design of the transmitting channel and the receiving channel and the support of the 3300-5000 MHz full frequency band can help to miniaturize the chip size and reduce the chip cost.
In addition, the power amplifier adopts a low-voltage scheme, and the power requirement is realized at the voltage of 3.4V, so that the reliability and the service life of the power amplifier are improved.
It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. The utility model provides a dual-frenquency 5G radio frequency front end module, its characterized in that includes transmitting channel and receiving channel, transmitting channel has two at least input, first change over switch and transmission link, receiving channel has two at least receiving terminals, second change over switch and two at least receiving link, and the transmission signal passes through any the input is input, through first change over switch reachs antenna switch behind the transmission link, and by with the antenna that antenna switch is connected launches, the received signal quilt the antenna is received, the warp antenna switch, at least one receive link with behind the second change over switch, reachs at least one the receiving terminal.
2. The dual-band 5G radio frequency front end module of claim 1, wherein the transmit chain comprises a power amplifier and a transmit filter; the power amplifier is connected with the transmitting filter.
3. The dual-band 5G radio frequency front end module as claimed in claim 2, wherein said transmit filter is IPD design and integrated on the first silicon-based chip in cooperation with the first substrate trace.
4. The dual-band 5G rf front-end module of claim 2, wherein the power amplifier is implemented using a differential amplifier circuit and is disposed on a gaas chip.
5. The dual-band 5G rf front-end module of claim 1, wherein the receive chain comprises at least two low noise amplifiers and at least two receive filters; the at least two low noise amplifiers are respectively connected with the at least two receiving filters.
6. The dual-band 5G radio frequency front end module as claimed in claim 5, wherein at least two of said low noise amplifiers and said second switch are integrated on a first SOI chip.
7. The dual-band 5G radio frequency front end module of claim 5, wherein at least two of the receive filters are IPD designed and integrated on the second silicon-based chip in cooperation with the second substrate trace.
8. The dual-band 5G radio frequency front end module of claim 1, further comprising a CMOS controller, wherein the first switch and the CMOS controller are integrated on a third silicon substrate chip.
9. The dual-band 5G radio frequency front end module as claimed in claim 1, wherein the first switch is an SPDT switch, the second switch is a DPDT switch, and the antenna switch is a 3P3T switch.
10. The dual-band 5G radio frequency front-end module of claim 1, further comprising a coupler, the coupler and the antenna switch being integrated on a second SOI chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223045334.XU CN218648814U (en) | 2022-11-16 | 2022-11-16 | Dual-frenquency 5G radio frequency front end module |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202223045334.XU CN218648814U (en) | 2022-11-16 | 2022-11-16 | Dual-frenquency 5G radio frequency front end module |
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| CN218648814U true CN218648814U (en) | 2023-03-17 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117118475A (en) * | 2023-10-23 | 2023-11-24 | 南京朗立微集成电路有限公司 | Circuit supporting multiplexing of FX and RX channels of DPD and radio frequency chip |
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2022
- 2022-11-16 CN CN202223045334.XU patent/CN218648814U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117118475A (en) * | 2023-10-23 | 2023-11-24 | 南京朗立微集成电路有限公司 | Circuit supporting multiplexing of FX and RX channels of DPD and radio frequency chip |
| CN117118475B (en) * | 2023-10-23 | 2024-01-26 | 南京朗立微集成电路有限公司 | Circuit supporting multiplexing of FX and RX channels of DPD and radio frequency chip |
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